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At least 1,369 records · Page 76
All sourcesNASA NTRSDOE OSTI
DOE OSTI2012

Automated identification and indexing of dislocations in crystal interfaces

Here, we present a computational method for identifying partial and interfacial dislocations in atomistic models of crystals with defects. Our automated algorithm is based on a discrete Burgers circuit integral over the elastic displacement field and is not limited to specific lattices or dislocation types. Dislocations in grain boundaries and other interfaces are identified by mapping atomic bonds from the dislocated interface to an ideal template configuration of the coherent interface to reveal incompatible displacements induced by dislocations and to determine their Burgers vectors. Additionally, the algorithm generates a continuous line representation of each dislocation segment in the crystal and also identifies dislocation junctions.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2017

Development of an ADC radiation tolerance characterization system for the upgrade of the ATLAS LAr calorimeter

ATLAS LAr calorimeter will undergo its Phase-I upgrade during the long shutdown (LS2) in 2018, and a new LAr Trigger Digitizer Board (LTDB) will be designed and installed. Several commercial-off-the-shelf (COTS) multi-channel high-speed ADCs have been selected as possible backups of the radiation tolerant ADC ASICs for the LTDB. Here, to evaluate the radiation tolerance of these backup commercial ADCs, we developed an ADC radiation tolerance characterization system, which includes the ADC boards, data acquisition (DAQ) board, signal generator, external power supplies and a host computer. The ADC board is custom designed for different ADCs, with ADC drivers and clock distribution circuits integrated on board. The Xilinx ZC706 FPGA development board is used as a DAQ board. The data from the ADC are routed to the FPGA through the FMC (FPGA Mezzanine Card) connector, de-serialized and monitored by the FPGA, and then transmitted to the host computer through the Gigabit Ethernet. A software program has been developed with Python, and all the commands are sent to the DAQ board through Gigabit Ethernet by this program. Two ADC boards have been designed for the ADC, ADS52J90 from Texas Instruments and AD9249 from Analog Devices respectively. TID tests for both ADCs have been performed at BNL, and an SEE test for the ADS52J90 has been performed at Massachusetts General Hospital (MGH). Test results have been analyzed and presented. The test results demonstrate that this test system is very versatile, and works well for the radiation tolerance characterization of commercial multi-channel high-speed ADCs for the upgrade of the ATLAS LAr calorimeter. It is applicable to other collider physics experiments where radiation tolerance is required as well.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2016

Calibration of photoelastic modulator based dichrometers: maintaining constant phase across the spectrum

Photoelastic modulators can alter the polarization state of a beam of ultraviolet, visible or infrared photons by means of periodic stress-induced differences in the refractive index of a transparent material that forms the optical element of the device and is isotropic in the absence of stress. Furthermore, they have found widespread application in instruments that characterize or alter the polarization state of a beam in fields as diverse as astronomy, structural biology, materials science and ultraviolet lithography for the manufacture of nano-scale integrated circuits. Measurement of circular dichroism, the differential absorption of left- and right circularly polarized light, and of strain-induced birefringence of optical components are major applications. Instruments using synchrotron radiation and photoelastic modulators with CaF 2 optical elements have extended circular dichroism measurements down to wavelengths of about 130 nm in the vacuum ultraviolet. Maintaining a constant phase shift between two orthogonal polarization states across a spectrum requires that the amplitude of the modulated stress be changed as a function of wavelength. For commercially available photoelastic modulators, the voltage that controls the amplitude of modulation required to produce a specified phase shift, which is a surrogate for the stress modulation amplitude, has been shown to be an approximately linear function of wavelength in the spectral region where the optical element is transparent. But, extrapolations of such straight lines cross zero voltage at a non-zero wavelength, not at zero-wavelength. For modulators with calcium fluoride and fused silica optical elements, the zero-crossing wavelength is always in the spectral region where the optical element of the modulator strongly absorbs the incident radiation, and at a wavelength less than the longest-wavelength apparent resonance deduced from experimental values of the refractive index fit to the Sellmeier equation. Using a model that relates the refractive indices of a stressed optical element to the refractive index of its unstressed state, an expression for the modulator control voltage was derived that closely fits the experimental data. Our result provides a theoretical rational for the apparently linear constant-phase programming voltage, and thus provides theoretical backing for the calibration procedure frequently used for these modulators. Lastly there are other factors that can influence the calibration of a photoelastic modulator, including temperature and atmospheric pressure, are discussed briefly.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2018

Multi-element germanium detectors for synchrotron applications

In this paper, we have developed a series of monolithic multi-element germanium detectors, based on sensor arrays produced by the Forschungzentrum Julich, and on Application-specific integrated circuits (ASICs) developed at Brookhaven. Devices have been made with element counts ranging from 64 to 384. These detectors are being used at NSLS-II and APS for a range of diffraction experiments, both monochromatic and energy-dispersive. Compact and powerful readout systems have been developed, based on the new generation of FPGA system-on-chip devices, which provide closely coupled multi-core processors embedded in large gate arrays. Finally, we will discuss the technical details of the systems, and present some of the results from them.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2019

Development of FELIX based readout system for HV-CMOS sensor testbeam

The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration for the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. The HV-CMOS technology is a commercial integrated circuit process with the advantages of monolithic readout and fast charge collection. A front-end test platform of CaRIBOu (Control and Readout Itk BOard) and a testbeam Telescope based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, have been developed for the HV-CMOS sensor study and characterization in testbeam experiments. The Front-End LInk eXchange (FELIX) system is a newapproach to function as the gateway between detector front-end electronics and the commodity switched network in the ATLAS upgrade. A FELIX based readout system has been developed for both the CaRIBOu and the testbeam Telescope. It has been deployed successfully in the testbeam at theCERNSPS H8 beamline in August 2017. The test results show that the readout system is capable of sensor calibration and readout of a high-density pixel detector with high trigger rate in testbeam experiments.

47 OTHER INSTRUMENTATION↗
DOE OSTI2020

Investigation of ASIC-based signal readout electronics for LEGEND-1000

LEGEND, the Large Enriched Germanium Experiment for Neutrinoless ββ Decay, is a ton-scale experimental program to search for neutrinoless double beta (0νββ) decay in the isotope 76 Ge with an unprecedented sensitivity. Building on the success of the low-background 76 Ge-based GERDA and Majorana Demonstrator experiments, the LEGEND collaboration is targeting a signal discovery sensitivity beyond 10 28 yr on the decay half-life with approximately 10 t∙yr of exposure. Signal readout electronics in close proximity to the detectors plays a major role in maximizing the experiment's discovery sensitivity by reducing electronic noise and improving pulse shape analysis capabilities for the rejection of backgrounds. However, the proximity also poses unique challenges for the radiopurity of the electronics. Application-specific integrated circuit (ASIC) technology allows the implementation of the entire charge sensitive amplifier (CSA) into a single low-mass chip while improving the electronic noise and reducing the power consumption. In this work, we investigated the properties and electronic performance of a commercially available ASIC CSA, the XGLab CUBE preamplifier, together with a p-type point contact high-purity germanium detector. We show that low noise levels and excellent energy resolutions can be obtained with this readout. Moreover, we demonstrate the viability of pulse shape discrimination techniques for reducing background events.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

Design and calibration of an optically segmented single volume scatter camera for neutron imaging

The Optically Segmented Single Volume Scatter Camera (OS-SVSC) aims to image neutron sources for non-proliferation applications using the kinematic reconstruction of elastic double-scatter events. Our prototype system consists of 64 EJ-204 organic plastic scintillator bars, each measuring 5mm × 5mm × 200mm and individually wrapped in Teflon tape. The scintillator array is optically coupled to two silicon photomultiplier ArrayJ-60035 64P-PCB arrays, each comprised of 64 individual 6x6mm J-Series sensors arranged in an 8 × 8 array. We report on the design details, including component selections, mechanical design and assembly, and the electronics system. The described design leveraged existing off-the-shelf solutions to support the rapid development of a phase 1 prototype. Several valuable lessons were learned from component and system testing, including those related to the detector's mechanical structure and electrical crosstalk that we conclude originates in the commercial photodetector arrays and the associated custom breakout cards. We detail our calibration efforts, beginning with calibrations for the electronics, based on the IRS3D application-specific integrated circuits, and their associated timing resolutions, ranging from 3090ps. With electronics calibrations applied, energy and position calibrations were performed for a set of edge bars using 22 Na and 90 Sr, respectively, reporting an average resolution of 12.07±0.03mm for energy depositions between 900keVee and 1000keVee. We further demonstrate a position calibration method for the internal bars of the matrix using cosmic-ray muons as an alternative to emission sources that cannot easily access these bars, with an average measured resolution of 14.86+-0.29mm for depositions between 900keVee and 1000keVee. The coincident time resolution reported between pairs of bars measured up to 400ps from muon acquisitions. Energy and position calibration values measured with muons are consistent with those obtained using particle emission sources.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

Characterization of the CMS Endcap Timing Layer readout chip prototype with charge injection

We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge injection. The ASIC, named ETROC and developed in a 65 nm CMOS technology, reads out a 16× 16 pixel matrix of the Low-Gain Avalanche Detector (LGAD). The jitter contribution from ETROC is required to be below 40 ps to achieve the 50 ps overall time resolution per hit. The analog readout circuits in ETROC consist of the preamplifier and the discriminator. The preamplifier handles the LGAD charge signal with the most probable value of around 15 fC. The discriminator generates the digital pulse, which provides the Time-Of-Arrival (TOA, leading edge) and Time-Over-Threshold (TOT, pulse width) information. The prototype of ETROC (ETROC0) that implements a single channel of analog readout circuits has been evaluated with charge injection. The jitter of the analog readout circuits, measured from the discriminator's leading edge, is better than 16 ps for a charge larger than 15 fC with the sensor capacitance. The time walk resulting from different pulse heights can be corrected using the TOT measurement. The time resolution distribution has a standard deviation of 29 ps after the time-walk correction from the charge injection. At room temperature, the preamplifier's power consumption is measured to be 0.74 mW and 1.53 mW per pixel in the low- and high-power mode, respectively. Finally, the measured power consumption of the discriminator is 0.84 mW per pixel. With the ASIC alone or the LGAD sensor, The characterization performances fulfill the ETL's challenging requirements.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

Waveform processing using neural network algorithms on the front-end electronics

In a multi-channel radiation detector readout system, waveform sampling, digitization, and raw data transmission to the data acquisition system constitute a conventional processing chain. The deposited energy on the sensor is estimated by extracting peak amplitudes, area under pulse envelopes from the raw data, and starting times of signals or time of arrivals. However, such quantities can be estimated using machine learning algorithms on the front-end Application-Specific Integrated Circuits (ASICs), often termed as “edge computing”. Edge computation offers enormous benefits, especially when the analytical forms are not fully known or the registered waveform suffers from noise and imperfections of practical implementations. In this work, we aim to predict peak amplitude from a single waveform snippet whose rising and falling edges containing only 3 to 4 samples. We thoroughly studied two well-accepted neural network algorithms, Multi-Layer Perceptron (MLP) and Convolutional Neural Network (CNN) by varying their model sizes. Further, to better fit front-end electronics, neural network model reduction techniques, such as network pruning methods and variable-bit quantization approaches, were also studied. By combining pruning and quantization, our best performing model has the size of 1.5 KB, reduced from 16.6 KB of its full model counterpart. It can reach mean absolute error of 0.034 comparing to that of a naive baseline of 0.135. Such parameter-efficient and predictive neural network models established feasibility and practicality of their deployment on front-end ASICs.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

High spatial resolution direct conversion amorphous selenium X-ray detectors with monolithically integrated CMOS readout

Recent progress in the field of micron-scale spatial resolution direct conversion X-ray detectors for high-energy synchrotron light sources serve applications ranging from nondestructive and noninvasive microscopy techniques which provide insight into the structure and morphology of crystals, to medical diagnostic measurement devices. Amorphous selenium ( a -Se) as a wide-bandgap thermally evaporated photoconductor exhibits ultra-low thermal generation rates for dark carriers and has been extensively used in X-ray medical imaging. Being an amorphous material, it can further be deposited over large areas at room temperatures and at substantially lower costs as compared to crystalline semiconductors. Here, to address the demands for a high-energy and high spatial resolution X-ray detector for synchrotron light source applications, we have thermally evaporated a -Se on a Mixed-Mode Pixel Array Detector (MM-PAD) Application Specific Integrated Circuit (ASIC). The ASIC format consists of 128 × 128 square pixels each 150 μm on a side. A 200 μm a -Se layer was directly deposited on the ASIC followed by a metal top electrode. The completed detector assembly was tested with 45 kV Ag and 23 kV Cu X-ray tube sources. The detector fabrication, performances, Modulation Transfer Function (MTF) measurements, and simulations are reported.

36 MATERIALS SCIENCE↗
DOE OSTI2024

The SparkPix-S ASIC for the sparsified readout of 1 MHz frame-rate X-ray cameras at LCLS-II: pixel design and simulation results

Exploiting the “sparse” nature of the information in XPCS (X-ray Photon Correlation Spectroscopy) and XSVS (Speckle Visibility Spectroscopy) experiments, we present the SparkPix-S, a 3-sides buttable Application Specific Integrated Circuit (ASIC) based on a sparsified readout strategy for large-format hybrid detectors. The SparkPix-S architecture, based on the successful ePix family, will be composed as follows: a front-end 2-D matrix of 384×352 square pixels with 50 µm pitch is arranged to match the dimensions of a PIN Si-sensor matrix; charge readout, signal shaping and amplitude discrimination is performed at pixel-level, by means of a low-power (<18 µW) analog processor, which, in case of an event, negotiates access to an analog bus placed every other column; on the chip periphery (balcony), the information on each bus is digitized by an array of successive approximation analog-to-digital converters (SAR-ADCs) running at 10 Msps; on the digital back-end the global logic will generate the output data stream using low-voltage differential signalling (LVDS). A first prototype of the SparkPix-S, with a reduced matrix size of 96×96 pixels, is currently under production on a 130 nm CMOS technology. Simulated performance results show an equivalent noise charge <60 el. r.m.s. at 1 MHz repetition rate, with a maximum input energy of 60 keV and capability to discriminate charge signals with equivalent energy as low as 900 eV.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Embedded FPGA developments in 130 nm and 28 nm CMOS for machine learning in particle detector readout

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC along with the ease of FPGA configuration, particularly beneficial for the use case of machine learning in the data pipeline of next-generation collider experiments. An open-source framework called "FABulous" was used to design eFPGAs using 130 nm and 28 nm CMOS technology nodes, which were subsequently fabricated and verified through testing. The capability of an eFPGA to act as a front-end readout chip was assessed using simulation of high energy particles passing through a silicon pixel sensor. A machine learning-based classifier, designed for reduction of sensor data at the source, was synthesized and configured onto the eFPGA. A successful proof-of-concept was demonstrated through reproduction of the expected algorithm result on the eFPGA with perfect accuracy. Finally, further development of the eFPGA technology and its application to collider detector readout is discussed.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

Beam test performance studies of CMS Phase-2 Outer Tracker module prototypes

A new tracking detector will be installed as part of thePhase-2 upgrade of the CMS detector for the high-luminosity LHC era.This tracking detector includes the Inner Tracker, equipped withsilicon pixel sensor modules, and the Outer Tracker, consisting ofmodules with two parallel stacked silicon sensors. The Outer Trackerfront-end ASICs will be able to correlate hits from chargedparticles in these two sensors to perform on-module discriminationof transverse momenta (p$_{T}$). The p$_{T}$information is generated at a frequency of 40 MHz and will be usedin the Level-1 trigger decision of CMS. Prototypes of theso-called 2S modules were tested at the Test Beam Facility at DESYHamburg between 2019 and 2020. These modules use the finalfront-end ASIC, the CMS Binary Chip (CBC), and for the firsttime the Concentrator Integrated Circuit (CIC), optical readoutand on-module power conversion. In total, seven modules were tested,one of which was assembled with sensors irradiated with protons. Animportant aspect was to show that it is possible to read out modulessynchronously. A cluster hit efficiency of about 99.75 % wasachieved for all modules. The CBC p$_{T}$ discriminationmechanism has been verified to work together with the CIC andoptical readout. The measured module performance meets therequirements for operation in the upgraded CMS tracking detector.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Event-driven readout development: testing of the EDWARD65P1 chip with integrated event generators

Building on a prototype readout integrated circuit for segmented silicon sensors with the EDWARD event-driven readout architecture, the front-end in each pixel was replaced by a hardware generator to verify readout performance, ensuring no data loss, consistent priority handling, and speed verification. Here, this generator produces Poisson-distributed readout requests with individually tunable rates per pixel via a digitally controlled oscillator. The resulting EDWARD65P1 test ASIC is a 32×32 pixel matrix with a 100 μm pitch, equipped with digital event generators simulating radiation hits at user-defined rates. Test results for this new design are presented.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

The CMS Phase-2 Fast Beam Condition Monitor prototype test with beam

The Fast Beam Condition Monitor (FBCM) is a standalone luminometer for the High Luminosity LHC (HL-LHC) program of the CMS Experiment at CERN. The detector is under development and features a new, radiation-hard, front-end application-specific integrated circuit (ASIC) designed for beam monitoring applications. The achieved timing resolution of a few nanoseconds enables the measurement of both the luminosity and the beam-induced background. The ASIC, called FBCM23, features six channels with adjustable shaping times, enabling in-field fine-tuning. Each ASIC channel outputs a single binary asynchronous signal encoding time-of-arrival and time-over-threshold information. The FBCM is based on silicon-pad sensors, with two sensor designs presently being considered. This paper presents the results of tests of the FBCM detector prototype using both types of silicon sensors with hadron, muon, and electron beams. Irradiated FBCM23 ASICs and silicon-pad sensors were also tested to simulate the expected conditions near the end of the detector's lifetime in the HL-LHC radiation environment. Based on test results, direct bonding between the sensor and ASIC was chosen, and an optimal bias voltage and ASIC threshold for FBCM operation were proposed. The current design of the front-end test board was validated following the beam test and is now being used for the first front-end module, which is expected to be produced in summer 2025. These results represent a major step forward in validating the FBCM concept, first version of the firmware and establishing a reliable design path for the final detector.

Beam-line instrumentation (beam position and profi↗
DOE OSTI2017

From bidirectional rectifier to polarity-controllable transistor in black phosphorus by dual gate modulation

In complementary metal oxide semiconductor (CMOS) technology, well-defined unipolar transport in field-effect transistors (FETs) is a basic requirement for logic operations, which can be realized by controllable doping of the semiconductor with electrons (n-type) or holes (p-type). However, recent demonstration of polarity controllable transistors in 2D semiconductors provides a flexible way in circuit design with increased circuit integration density. Here we demonstrate the conversion of a bidirectional rectifier to a polarity-controllable transistor in black phosphorus (BP) by dual gate modulation. Electrical characterization of the BP bidirectional rectifier reveals a current rectification of ~35 at room temperature that increases to ~350 upon lowering the temperature to 110 K. Employing cross-linked PMMA as a top gate and combining it together with the global back gate of the SiO 2 substrate, well-defined unipolar transport (n- or p-type) in BP could get accessed. This successful realization of polarity-controllable transistor in BP provides an alternative design for development of BP logic electronics.

36 MATERIALS SCIENCE↗
DOE OSTI2017

High-resolution structural characterization and magnetic properties of epitaxial Ce-doped yttrium iron garnet thin films

Thin films of magnetic garnet materials, e.g. yttrium iron garnet (Y 3 Fe 5 O 12 , YIG), are useful for a variety of applications including microwave integrated circuits and spintronics. Moreover, substitution of rare earth ions, such as cerium, is known to enhance the magneto-optic Kerr effect (MOKE) as compared to pure YIG. Thin films of Ce 0.75 Y 2.25 Fe 5 O 12 (Ce:YIG) have been grown using the pulsed laser deposition (PLD) technique and their crystal structure examined using high resolution scanning transmission electron microscopy. Homogeneous substitution of Ce in YIG, without oxidation to form a separate CeO 2 phase, can be realized in a narrow process window with resulting enhancement of the MOKE signal. We investigated the thermally generated signal due to spin Seebeck effect for the optimally doped Ce:YIG films.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Smart pixel sensors: towards on-sensor filtering of pixel clusters with deep learning

Highly granular pixel detectors allow for increasingly precise measurements of charged particle tracks. Next-generation detectors require that pixel sizes will be further reduced, leading to unprecedented data rates exceeding those foreseen at the High- Luminosity Large Hadron Collider. Signal processing that handles data incoming at a rate of $\mathcal{O}$(40 MHz) and intelligently reduces the data within the pixelated region of the detector at rate will enhance physics performance at high luminosity and enable physics analyses that are not currently possible. Using the shape of charge clusters deposited in an array of small pixels, the physical properties of the traversing particle can be extracted with locally customized neural networks. In this first demonstration, we present a neural network that can be embedded into the on-sensor readout and filter out hits from low momentum tracks, reducing the detector's data volume by 57.1%–75.7%. The network is designed and simulated as a custom readout integrated circuit with 28 nm CMOS technology and is expected to operate at less than 300 μW with an area of less than 0.2 mm 2 . The temporal development of charge clusters is investigated to demonstrate possible future performance gains, and there is also a discussion of future algorithmic and technological improvements that could enhance efficiency, data reduction, and power per area.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗