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At least 1,351 records · Page 75

Modeling of Metal-Ferroelectric-Semiconductor Field Effect Transistors

The characteristics for a MFSFET (metal-ferroelectric-semiconductor field effect transistor) is very different than a conventional MOSFET and must be modeled differently. The drain current has a hysteresis shape with respect to the gate voltage. The position along the hysteresis curve is dependent on the last positive or negative polling of the ferroelectric material. The drain current also has a logarithmic decay after the last polling. A model has been developed to describe the MFSFET drain current for both gate voltage on and gate voltage off conditions. This model takes into account the hysteresis nature of the MFSFET and the time dependent decay. The model is based on the shape of the Fermi-Dirac function which has been modified to describe the MFSFET's drain current. This is different from the model proposed by Chen et. al. and that by Wu.

Duen Ho, Fat↗

Integrating Partial Polarization into a Metal-Ferroelectric-Semiconductor Field Effect Transistor Model

The ferroelectric channel in a Metal-Ferroelectric-Semiconductor Field Effect Transistor (MFSFET) can partially change its polarization when the gate voltage near the polarization threshold voltage. This causes the MFSFET Drain current to change with repeated pulses of the same gate voltage near the polarization threshold voltage. A previously developed model [11, based on the Fermi-Dirac function, assumed that for a given gate voltage and channel polarization, a sin-le Drain current value would be generated. A study has been done to characterize the effects of partial polarization on the Drain current of a MFSFET. These effects have been described mathematically and these equations have been incorporated into a more comprehensive mathematical model of the MFSFET. The model takes into account the hysteresis nature of the MFSFET and the time dependent decay as well as the effects of partial polarization. This model defines the Drain current based on calculating the degree of polarization from previous gate pulses, the present Gate voltage, and the amount of time since the last Gate volta-e pulse.

MacLeod, Todd C.↗

Copper-Based OHMIC Contracts for the Si/SiGe Heterojunction Bipolar Transistor Structure

Silicon based heterojunction bipolar transistors (HBT) with SiGe base are potentially important devices for high-speed and high-frequency microelectronics. These devices are particularly attractive as they can be fabricated using standard Si processing technology. However, in order to realize the full potential of devices fabricated in this material system, it is essential to be able to form low resistance ohmic contacts using low thermal budget process steps and have full compatibility with VLSI/ULSI processing. Therefore, a study was conducted in order to better understand the contact formation and to develop optimized low resistance contacts to layers with doping densities corresponding to the p-type SiGe base and n-type Si emitter regions of the HBTS. These as-grown doped layers were implanted with BF(sub 2) up to 1 X 10(exp 16)/CM(exp 2) and As up to 5 x 10(exp 15)/CM2, both at 30 keV for the p-type SiGe base and n-type Si emitter layers, respectively, in order to produce a low sheet resistance surface layer. Standard transfer length method (TLM) contact pads on both p and n type layers were deposited using an e-beam evaporated trilayer structure of Ti/CufTi/Al (25)A/1500A/250A/1000A). The TLM pads were delineated by a photoresist lift-off procedure. These contacts in the as-deposited state were ohmic, with specific contact resistances for the highest implant doses of the order of 10(exp -7) ohm-CM2 and lower.

Das, Kalyan↗

Toward Evolvable Hardware Chips: Experiments with a Programmable Transistor Array

Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm. We search for a hardware configuration can be performed using software models or, faster and more accurate, directly in reconfigurable hardware. Several experiments have demonstrated the possibility to automatically synthesize both digital and analog circuits. The paper introduces an approach to automated synthesis of CMOS circuits, based on evolution on a Programmable Transistor Array (PTA). The approach is illustrated with a software experiment showing evolutionary synthesis of a circuit with a desired DC characteristic. A hardware implementation of a test PTA chip is then described, and the same evolutionary experiment is performed on the chip demonstrating circuit synthesis/self-configuration directly in hardware.

Stoica, Adrian↗

RF Single Electron Transistor Readout Amplifiers for Superconducting Astronomical Detectors for X-Ray to Sub-mm Wavelengths

We report progress on using a new type of amplifier, the Radio-Frequency Single-Electron Transistor (RF-SET), to develop multi-channel sensor readout systems for fast and sensitive readout of high impedance cryogenic photodetectors such as Superconducting Tunnel Junctions and Single Quasiparticle Photon Counters. Although cryogenic, these detectors are desirable because of capabilities not other-wise attainable. However, high impedances and low output levels make low-noise, high-speed readouts challenging, and large format arrays would be facilitated by compact, low-power, on-chip integrated amplifiers. Well-suited for this application are RF-SETs, very high performance electrometers which use an rf readout technique to provide 100 MHz bandwidth. Small size, low power, and cryogenic operation allow direct integration with detectors, and using multiple rf carrier frequencies permits simultaneous readout of 20-50 amplifiers with a common electrical connection. We describe both the first 2-channel demonstration of this wavelength division multiplexing technique for RF-SETs, and Charge-Locked-Loop operation with 100 kHz of closed-loop bandwidth.

Stevenson, Thomas↗

Nano-Transistor Modeling: Two Dimensional Green's Function Method

Two quantum mechanical effects that impact the operation of nanoscale transistors are inversion layer energy quantization and ballistic transport. While the qualitative effects of these features are reasonably understood, a comprehensive study of device physics in two dimensions is lacking. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL (Drain Induced Barrier Lowering), and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI).

Svizhenko, Alexei↗

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistor

The threshold voltages of a carbon-nanotube (CNT) field-effect transistor (FET) are studied. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, and this makes the device characteristics quite unique. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and inversion and accumulation threshold voltages (V(sub Ti), and V(sub Ta)) are derived. V(sub Ti) of the CNTFETs has a much stronger doping dependence than that of the metal-oxide- semiconductor FETs, while V(sub Ta) of both devices depends weakly on doping with the same functional form.

Toshishige, Yamada↗

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistors

The threshold voltages of a carbon nanotube (CNT) field-effect transistor (FET) are derived and compared with those of the metal oxide-semiconductor (MOS) FETs. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, which is the CNT diameter direction, and this makes the CNTFET characteristics quite different from those in MOSFETs. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and it is shown that the familiar relations are still valid because of the macroscopic number of states available in the CNTs. This is in sharp contrast to the cases of quantum dots. Using these relations, we derive an inversion threshold voltage V(sub Ti) and an accumulation threshold voltage V(sub Ta) as a function of the Fermi level E(sub F) in the channel, where E(sub F) is a measure of channel doping. V(sub Ti) of the CNTFETs has a much stronger dependence than that of MOSFETs, while V(sub Ta)s of both CNTFETs and MOSFETs depend quite weakly on E(sub F) with the same functional form. This means the transition from normally-off mode to normally-on mode is much sharper in CNTFETs as the doping increases, and this property has to be taken into account in circuit design.

Yamada, Toshishige↗

Antenna-Coupled Superconducting Tunnel Junctions with Single-Electron Transistor Readout for Detection of Sub-mm Radiation

Antenna-coupled superconducting tunnel junction detectors have the potential for photon-counting sensitivity at sub-mm wavelengths. The device consists of an antenna structure to couple radiation into a small superconducting volume and cause quasiparticle excitations, and a single-electron transistor to measure currents through tunnel junction contacts to the absorber volume. We will describe optimization of device parameters, and recent results on fabrication techniques for producing devices with high yield for detector arrays. We will also present modeling of expected saturation power levels, antenna coupling, and rf multiplexing schemes.

Stevenson, T. R.↗

Simulation Model of A Ferroelectric Field Effect Transistor

An electronic simulation model has been developed of a ferroelectric field effect transistor (FFET). This model can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The model uses a previously developed algorithm that incorporates partial polarization as a basis for the design. The model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current has values matching actual FFET's, which were measured experimentally. The input and output resistance in the model is similar to that of the FFET. The model is valid for all frequencies below RF levels. A variety of different ferroelectric material characteristics can be modeled. The model can be used to design circuits using FFET'S with standard electrical simulation packages. The circuit can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The model is a drop in library that integrates seamlessly into a SPICE simulation. A comparison is made between the model and experimental data measured from an actual FFET.

MacLeod, Todd C.↗

Cryogenetically Cooled Field Effect Transistors for Low-Noise Systems

Recent tends in the design, fabrication and use of High-Electron-Mobility-Transistors (HEMT) in low noise amplifiers are reviewed. Systems employing these devices have achieved the lowest system noise for wavelengths greater than three millimeters with relatively modest cryogenic cooling requirements in a variety of ground and space based applications. System requirements which arise in employing such devices in imaging applications are contrasted with other leading coherent detector candidates at microwave wavelengths. Fundamental and practical limitations which arise in the context of microwave application of field effect devices at cryogenic temperatures will be discussed from a component and systems point of view.

Wollack, Edward J.↗

Switching Transistor

Westinghouse Electric Corporation's D60T transistors are used primarily as switching devices for controlling high power in electrical circuits. It enables reduction in the number and size of circuit components and promotes more efficient use of energy. Wide range of application from a popcorn popper to a radio frequency generator for solar cell production.

Source record↗

Basic Equations for the Modeling of Gallium Nitride (gan) High Electron Mobility Transistors (hemts)

Gallium nitride (GaN) is a most promising wide band-gap semiconductor for use in high-power microwave devices. It has functioned at 320 C, and higher values are well within theoretical limits. By combining four devices, 20 W has been developed at X-band. GaN High Electron Mobility Transistors (HEMTs) are unique in that the two-dimensional electron gas (2DEG) is supported not by intentional doping, but instead by polarization charge developed at the interface between the bulk GaN region and the AlGaN epitaxial layer. The polarization charge is composed of two parts: spontaneous and piezoelectric. This behavior is unlike other semiconductors, and for that reason, no commercially available modeling software exists. The theme of this document is to develop a self-consistent approach to developing the pertinent equations to be solved. A Space Act Agreement, "Effects in AlGaN/GaN HEMT Semiconductors" with Silvaco Data Systems to implement this approach into their existing software for III-V semiconductors, is in place (summer of 2002).

Freeman, Jon C.↗

High Mobility SiGe/Si Transistor Structures on Sapphire Substrates Using Ion Implantation

High mobility n-type SiGe/Si transistor structures have been fabricated on sapphire substrates by ion implanting phosphorus ions into strained 100 Angstrom thick silicon channels for the first time. The strained Si channels were sandwiched between Si(sub 0.7)Ge(sub 0.3) layers, which, in turn, were deposited on Si(sub 0.7)Ge(sub 0.3) virtual substrates and graded SiGe buffer layers. After the molecular beam epitaxy (MBE) film growth process was completed, ion thick silicon channels implantation and post-annealing were used to introduce donors. The phosphorous ions were preferentially located in the Si channel at a peak concentration of approximately 1x10(exp 18)/cu cm. Room temperature electron mobilities exceeding 750 sq cm/V-sec at carrier densities of 1x10(exp 12)/sq cm were measured. Electron concentration appears to be the key factor that determines mobility, with the highest mobility observed for electron densities in the 1 - 2x10(exp 12)/sq cm range.

Alterovitz, S. A.↗

Cryogenically Cooled Field Effect Transistors for Low-Noise Systems

Recent tends in the design, fabrication and use of High-Electron-Mobility-Transistors (HEMT) in low noise amplifiers are reviewed. Systems employing these devices have achieved the lowest system noise for wavelengths greater than three millimeters with relatively modest cryogenic cooling requirements in a variety of ground and space based applications. System requirements which arise in employing such devices in imaging applications are contrasted with other leading coherent detector candidates at microwave wavelengths. Fundamental and practical limitations which arise in the context of microwave application of field effect devices at cryogenic temperatures will be discussed from a component and systems point of view.

Wollack, Edward J.↗

Electrospun Polyaniline/Polyethylene Oxide Nanofiber Field Effect Transistor

We report on the observation of field effect transistor (FET) behavior in electrospun camphorsulfonic acid doped polyaniline(PANi)/polyethylene oxide(PE0) nanofibers. Saturation channel currents are observed at surprisingly low source/drain voltages. The hole mobility in the depletion regime is 1.4 x 10(exp -4) sq cm/V s while the 1-D charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating 1-D polymer FET's.

Pinto, N. J.↗

Field Effect Transistor Behavior in Electrospun Polyaniline/Polyethylene Oxide Nanofibers

Novel translators and logic devices based on nanotechnology concepts are under intense development. The potential for ultra-low power circuitry makes nanotechnology attractive for applications such as digital electronics and sensors. Furthermore, the ability to form devices on flexible substrates expands the range of applications where electronic circuitry can be introduced. For NASA, nonotechndogy offers opportunities for increased onboard data processing and thus autonomous decision-making ability, ad novel sensors that detect and respond to external stimuli with few oversight requirements. The goat of this work is to demonstrate transistor behavior in polyaniline/ polyethylene oxide nanofibers, thus creating a foundation for future logic devices.

Miranda, Felix A.↗