Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “wafer”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,333 records · Page 74

Isotopic study of oxygen diffusion in oxide coatings

Diffusion of oxygen in thin films of silicon dioxide was studied using oxygen isotopically enriched in oxygen of atomic mass 18 (O-18). This subject is of interest because thin films of dielectrics such as SiO2 are proposed for use as a protective coatings for solar mirrors in low Earth orbit, which is a strongly oxidizing environment. Films of this material were prepared with a direct current magnetron using reactive sputtering techniques. To produce (O-18)- enriched SiO2, a standard 3.5-in.-diameter silicon wafer was reactively sputtered using (O-18)-enriched (95 percent) oxygen as the plasma feed gas. The films were characterized using Rutherford backscattering and Secondary Ion Mass Spectrometer (SIMS) to establish stoichiometry and purity. Subsequently, the films were exposed to an air-derived oxygen plasma in a standard laboratory plasma reactor for durations of up to 10 hr. The concentration ratio of O-16 as a function of depth was determined using SIMS profiling and compared to a baseline, nonplasma exposed sample. A value for the diffusivity of oxygen near the surface of these films was obtained and found to be about 10(-15)sq cm/sec.

Gulino, Daniel A.↗

Position-sensitive CdTe detector using improved crystal growth method

The feasibility of developing a position-sensitive CdTe detector array for astronomical observations in the hard X-ray, soft gamma ray region is demonstrated. In principle, it was possible to improve the resolution capability for imaging measurements in this region by orders of magnitude over what is now possible through the use of CdTe detector arrays. The objective was to show that CdTe crystals of the quality, size and uniformity required for this application can be obtained with a new high pressure growth technique. The approach was to fabricate, characterize and analyze a 100 element square array and several single-element detectors using crystals from the new growth process. Results show that detectors fabricated from transversely sliced, 7 cm diameter wafers of CdTe exhibit efficient counting capability and a high degree of uniformity over their entire areas. A 100 element square array of 1 sq mm detectors was fabricated and operated.

Source record↗

Highly automated optical characterization with FTIR spectrometry

The procedure for evaluating the characteristics of II-VI semiconducting infrared sensor materials with a Fourier Transform Infrared (FTIR) spectrometer system will be discussed. While the method of mapping optical characteristics with a spectrometer has been employed previously, this system is highly automated compared to other systems where the optical transmission data are obtained using a FTIR system with a small stationary aperture in the optical path and moving the specimen behind the aperture. The hardware and software, including an algorithm developed for extracting cut-on wavelengths of spectra, as well as several example results, are described to illustrate the advanced level of the system. Additionally, data from transverse slices and longitudinal wafers of the aforementioned semiconductors will be used to show the accuracy of the system in predicting trends in materials such as shapes of growth interfaces and compositional uniformity.

Perry, G. L. E.↗

Metallic behavior of lanthanum disilicide

Polycrystalline thin films of LaSi2 were prepared by reaction of sputter-deposited lanthanum layers with silicon wafers. Samples of the low-temperature tetragonal and the high-temperature orthorhombic phases were separately obtained. The room-temperature intrinsic resistivities were 24 and 57 microohm cm for the low- and high-temperature structures, respectively. Although lanthanum disilicide had been previously reported to be a semiconductor, classical metallic behavior was found for both phases.

Long, Robert G.↗

Matrix-vector multiplication in thin photorefractive GaAs crystals

Optical matrix-vector multiplication using four-wave mixing in a thin photorefractive GaAs crystal is demonstrated. Using a thin wafer of GaAs offers the potential to integrate the encoding spatial light modulators directly on the wave-mixing medium.

Cheng, Li-Jen↗

Millimeter-wave diode-grid frequency doubler

Monolithic diode grids were fabricated on 2-cm square gallium-arsenide wafers in a proof-of-principle test of a quasi-optical varactor millimeter-wave frequency multiplier array concept. An equivalent circuit model based on a transmission-line analysis of plane wave illumination was applied to predict the array performance. The doubler experiments were performed under far-field illumination conditions. A second-harmonic conversion efficiency of 9.5 percent and output powers of 0.5 W were achieved at 66 GHz when the diode grid was pumped with a pulsed source at 33 GHz. This grid had 760 Schottky-barrier varactor diodes. The average series resistance was 27 ohms, the minimum capacitance was 18 fF at a reverse breakdown voltage of -3 V. The measurements indicate that the diode grid is a feasible device for generating watt-level powers at millimeter frequencies and that substantial improvement is possible by improving the diode breakdown voltage.

Jou, Christina F.↗

Oxidation of silicon with a 5 eV O(-) beam

A silicon wafer has been oxidized at room temperature in vacuum using a pure, ground-state beam of O(-) ions. The beam was of sufficiently low energy that no displacement damage or implantation was energetically possible. The resulting SiO2 films were analyzed with X-ray photoelectron spectroscopy. A logarithmic dependence of oxide thickness on dose was observed, with an extrapolated oxidation efficiency of unity for the clean silicon surface. A distinct initial oxidation phase was observed, with an anomalously high level of silicon suboxides. In addition, the valence-band offset between the silicon and the oxide was unusually small, suggesting a large interfacial dipole.

Hecht, M. H.↗

Experimental studies of adaptive structures for precision performance

An experimental study was made of the adaptive structure concept. Experimental data were obtained for a three-longeron, thirteen-bay truss-type test structure. This test structure can be softly suspended as well as rigidly clamped at the central bay. The load-carrying active member consists of a stack of concentric piezoelectric wafers, an eddy current displacement sensor, and a strain gage force sensor. A bridge (or compound) feedback technique developed in communication engineering is applied to the problem of active damping augmentation in adaptive structures. Using collocated force and velocity feedback around the active member, a desired output mechanical impedance can be implemented to maximize energy absorption by the active members. In addition, large gains can be implemented to linearize the active member's nonlinear behavior. Good agreements with linear finite element analysis was found for both static and dynamic structural responses. An 11 percent damping in the first bending mode was demonstrated in the closed-loop damping experiment.

Chen, G.-S.↗

CMOS Process Monitor

A CMOS Process Monitor, consisting of eight basic test structures, has been prepared to acquire key CMOS parameters to assist in VLSI wafer acceptance. The test structures can be probed using a 2 by N probe pad array and can be arranged to fit into either the interior or the scribe lane of an integrated circuit chip. In order to facilitate the general use of the monitor, a document is being prepared that describes its design, layout, measurement, and analysis. This paper describes the structures included in the monitor, the methodology used to create the monitor, and test results from the monitor.

Buehler, M. G.↗

Comparison of results from simple expressions for MOSFET parameter extraction

In this paper results are compared from a parameter extraction procedure applied to the linear, saturation, and subthreshold regions for enhancement-mode MOSFETs fabricated in a 3-micron CMOS process. The results indicate that the extracted parameters differ significantly depending on the extraction algorithm and the distribution of I-V data points. It was observed that KP values vary by 30 percent, VT values differ by 50 mV, and Delta L values differ by 1 micron. Thus for acceptance of wafers from foundries and for modeling purposes, the extraction method and data point distribution must be specified. In this paper measurement and extraction procedures that will allow a consistent evaluation of measured parameters are discussed.

Buehler, M. G.↗

Crystal growth of SiC for electronic applications

The development of SiC as a high temperature semiconductor material is discussed, focusing on the epitaxial growth of single crystal SiC films on inexpensive single crystal silicon wafers. Progress in the improvement of film morphology and the elimination of antiphase disorder is examined. Potential candidate materials for high temperature semiconductor devices are compared and SiC films are evaluated.

Matus, Lawrence G.↗

Epitaxial growth of InSb (111) on sapphire (0001)

Indium antimonide has been epitaxially grown directly on sapphire. Reflection high-energy electron diffraction, TEM, and SEM data are presented to show that the indium antimonide layer is epitaxial, has an abrupt interface with the sapphire, and grows in the 111-line direction. Mobility data show room-temperature mobilities as high as 10,000 sq cm/V s from some regions on the wafer.

Jamison, K. D.↗

Nucleation and growth of CrSi2 on Si(111)

The nucleation and growth of CrSi2 on Si(111) by MBE and solid-phase epitaxy (SPE), was investigated using SEM and TEM observations of 2-mm-thick layers grown under a variety of conditions, including the use of a CoSi2 buffer. During growth, the wafers were monitored in situ using reflection high-energy electron diffraction. Island growth was observed, with islands found to nucleate with three epitaxial orientations. The morphology of CrSi2 islands was found to be affected by the degree and direction of substrate misorientation, the growth technique, and the use of CoSi2 buffer. However, the reconstruction of the Si surface does not appear to be an important factor in controlling SPE growth.

Fathauer, R. W.↗

Interferometric Measurement Of Residual Stress

Stress averaged through thickness of plate measured nondestructively. Theory of elasticity combined with laser interferometric technique into technique for measurement of residual stresses in solid objects - usually in thin, nominally-flat plates. Measurements particularly useful in inspection of wafers of single-crystal silicon for making solar cells or integrated circuits, because stresses remaining after crystal-growing process cause buckling or fracture. Used to predict deflections of plates caused by known applied loads under specified boundary condition, or to infer applied loads that cause known deflections. Also used to relate known deflections to residual stresses equivalent to stresses produced by fictitious applied loads.

Danyluk, Steven↗

Ge/Si Integrated Circuit For Infrared Imaging

Proposed integrated circuit consists of focal-plane array of metal/germanium Schottky-barrier photodetectors on same chip with silicon-based circuits that processes signals from photodetectors. Made compatible with underlying silicon-based circuitry by growing germanium epitaxially on silicon circuit wafers. Metal deposited in ultrahigh vacuum immediately after growth of germanium. Combination of described techniques results in high-resolution infrared-imaging circuits of superior performance.

Fathauer, Robert W.↗

Self-Aligned Guard Rings For Schottky-Barrier Diodes

Proposed self-aligned guard ring increases active area of Schottky-barrier infrared detector. Concept developed for silicide Schottky-barrier diodes in which platinum silicide or iridium silicide Schottky-contacts provide cutoff wavelengths of about 6 or 10 micrometers. Grid of silicon dioxide doped with phosphorus etched on silicon wafer, and phosphorus from grid diffused into substrate, creating n-type guard rings. Silicide layers formed in open areas of grid. Overlap of guard rings and silicide layers small.

Lin, True-Lon↗

Electro-optical Probing Of Terahertz Integrated Circuits

Electro-optical probe developed to perform noncontact, nondestructive, and relatively noninvasive measurements of electric fields over broad spectrum at millimeter and shorter wavelengths in integrated circuits. Manipulated with conventional intregrated-circuit-wafer-probing equipment and operated without any special preparation of integrated circuits. Tip of probe small electro-optical crystal serving as proximity electric-field sensor.

Bhasin, K. B.↗

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Buehler, M. G.↗