Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “MEMORY DEVICES”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,333 records · Page 74

Effect of rare earth metal on the spin-orbit torque in magnetic heterostructures

We report the effect of the rare earth metal Gd on current-induced spin-orbit torques (SOTs) in perpendicularly magnetized Pt/Co/Gd heterostructures, characterized using harmonic measurements and spin-torque ferromagnetic resonance (ST-FMR). By varying the Gd metal layer thickness from 0 nm to 8 nm, harmonic measurements reveal a significant enhancement of the effective fields generated from the Slonczewski-like and field-like torques. ST-FMR measurements confirm an enhanced effective spin Hall angle and show a corresponding increase in the magnetic damping constant with increasing Gd thickness. These results suggest that Gd plays an active role in generating SOTs in these heterostructures. Our finding may lead to spin-orbitronics device application such as non-volatile magnetic random access memory, based on rare earth metals.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Argo NodeOS: Toward Unified Resource Management for Exascale

Exascale systems are expected to feature hundreds of thousands of compute nodes with hundreds of hardware threads and complex memory hierarchies with a mix of on-package and persistent memory modules. In this context, the Argo project is developing a new operating system for exascale machines. Targeting production workloads using workflows or coupled codes, we improve the Linux kernel on several fronts. We extend the memory management of Linux to be able to subdivide NUMA memory nodes, allowing better resource partitioning among processes running on the same node. We also add support for memory-mapped access to node- local, PCIe-attached NVRAM devices and introduce a new scheduling class targeted at parallel runtimes supporting user- level load balancing.

Perarnau, Swann↗

Population Count on Intel® CPU, GPU, and FPGA

Population count is a primitive used in many applications. Commodity processors have dedicated instructions for achieving high-performance population count. Motivated by the productivity of high-level synthesis and the importance of population count, in this paper we investigated the OpenCL implementations of population count algorithms, and evaluated their performance and resource utilizations on an FPGA. Based on the results, we select the most efficient implementation. Then we derived a reduction pattern from a representative application of population count. We parallelized the reduction with atomic functions, and optimized it with vectorized memory accesses, tree reduction, and compute-unit duplication. We evaluated the performance of the reduction kernel on an Intel (R) Xeon (R) CPU and an Intel (R) IrisT Pro integrated GPU, and an FPGA card that features an Intel (R) Arria (R) 10 FPGA. When DRAM memory bandwidth is comparable on the three computing platforms, the FPGA can achieve the highest kernel performance for large workload. On the other hand, we described performance bottlenecks on the FPGA. To make FPGAs more competitive in raw performance compared to high-performant CPU and GPU platforms, it is important to increase external memory bandwidth, minimize data movement between a host and a device, and reduce OpenCL runtime overhead on an FPGA.

heterogeneous computing↗

Preparing an Incompressible-Flow Fluid Dynamics Code for Exascale-Class Wind Energy Simulations

The U.S. Department of Energy has identified exascale-class wind farm simulation as critical to wind energy scientific discovery. A primary objective of the ExaWind project is to build high-performance, predictive computational fluid dynamics (CFD) tools that satisfy these modeling needs. GPU accelerators will serve as the computational thoroughbreds of next-generation, exascale-class supercomputers. Here, we report on our efforts in preparing the ExaWind unstructured mesh solver, Nalu-Wind, for exascale-class machines. For computing at this scale, a simple port of the incompressible-flow algorithms to GPUs is insufficient. To achieve high performance, one needs novel algorithms that are application aware, memory efficient, and optimized for the latest-generation GPU devices. The result of our efforts are unstructured-mesh simulations of wind turbines that can effectively leverage thousands of GPUs. In particular, we demonstrate a first-of-its-kind, incompressible-flow simulation using Algebraic Multigrid solvers that strong scales to more than 4000 GPUs on the Summit supercomputer.

algebraic multigrid↗

Prediction of Alpha-Particle-Immune Gate-All-Around Field-Effect Transistors (GAA-FET) Based SRAM Design

Alpha particles are known to be a major source of particles creating soft errors in semiconductor devices, such as content flipping in Static Random-Access Memory (SRAM). Recent advancements in transistor nodes have led to the introduction of Gate-All-Around Field Effect Transistors (GAA-FETs), which have better gate control, thus better electrostatics. Moreover, the introduction of bottom dielectric isolation (BDI) eliminates substrate leakage and thus is expected to enhance its radiation hardness. It is thus important to explore if one can design an SRAM that is completely radiation-hard to alpha particles. In this paper, using 3D Technology Computer-Aided-Design (TCAD) simulations, we show that it is possible to design an SRAM using GAA-FET technology so that it is immune to single alpha particle radiation error. In other words, with the design, there will be no single-event upset (SEU) due to alpha particles. We first use ab initio calculations in PHITS to show that there is a maximum linear energy transfer (LET), LET max , for the alpha particle in Si and Si x Ge 1-x . Based on that, by de signing a sub-7nm GAA-FET-based SRAM with BDI, we show that the SRAM does not flip even if the particle strike is in the worst-case scenario for LET > LET max .

42 ENGINEERING↗

Trends in solid state electronics, part 2

Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.

Gassaway, J. D.↗

Memory technology survey

The current status of semiconductor, magnetic, and optical memory technologies is described. Projections based on these research activities planned for the shot term are presented. Conceptual designs of specific memory buffer pplications employing bipola, CMOS, GaAs, and Magnetic Bubble devices are discussed.

Source record↗

Massively parallel processor computer

An apparatus for processing multidimensional data with strong spatial characteristics, such as raw image data, characterized by a large number of parallel data streams in an ordered array is described. It comprises a large number (e.g., 16,384 in a 128 x 128 array) of parallel processing elements operating simultaneously and independently on single bit slices of a corresponding array of incoming data streams under control of a single set of instructions. Each of the processing elements comprises a bidirectional data bus in communication with a register for storing single bit slices together with a random access memory unit and associated circuitry, including a binary counter/shift register device, for performing logical and arithmetical computations on the bit slices, and an I/O unit for interfacing the bidirectional data bus with the data stream source. The massively parallel processor architecture enables very high speed processing of large amounts of ordered parallel data, including spatial translation by shifting or sliding of bits vertically or horizontally to neighboring processing elements.

Fung, L. W.↗

High performance flight computer developed for deep space applications

The development of an advanced space flight computer for real time embedded deep space applications which embodies the lessons learned on Galileo and modern computer technology is described. The requirements are listed and the design implementation that meets those requirements is described. The development of SPACE-16 (Spaceborne Advanced Computing Engine) (where 16 designates the databus width) was initiated to support the MM2 (Marine Mark 2) project. The computer is based on a radiation hardened emulation of a modern 32 bit microprocessor and its family of support devices including a high performance floating point accelerator. Additional custom devices which include a coprocessor to improve input/output capabilities, a memory interface chip, and an additional support chip that provide management of all fault tolerant features, are described. Detailed supporting analyses and rationale which justifies specific design and architectural decisions are provided. The six chip types were designed and fabricated. Testing and evaluation of a brass/board was initiated.

Bunker, Robert L.↗

Mode shape analysis using a commercially available peak store video frame buffer

Time exposure photography, sometimes coupled with strobe illumination, is an accepted method for motion analysis that bypasses frame by frame analysis and resynthesis of data. Garden variety video cameras can now exploit this technique using a unique frame buffer that is a non-integrating memory that compares incoming data with that already stored. The device continuously outputs an analog video signal of the stored contents which can then be redigitized and analyzed using conventional equipment. Historically, photographic time exposures have been used to record the displacement envelope of harmonically oscillating structures to show mode shape. Mode shape analysis is crucial, for example, in aeroelastic testing of wind tunnel models. Aerodynamic, inertial, and elastic forces can couple together leading to catastrophic failure of a poorly designed aircraft. This paper will explore the usefulness of the peak store device as a videometric tool and in particular discuss methods for analyzing a targeted vibrating plate using the 'peak store' in conjunction with calibration methods familiar to the close-range videometry community. Results for the first three normal modes will be presented.

Snow, Walter L.↗

Evaluation of Radiation Effects in Flash Memories

Features of flash memories: Flash memories are non-volatile; that is they do not require power to retain the information in its memory. They can be erased and written to while the device is still in the circuit.

Radiation effects↗

IBM powerPC 405 SEU mitigation using processor voting techniques in Xilinx Virtex-I1 pro FPGA

Not until recently, Xilinx has developed a new field programmable gate array (FPGA) device family, Virtex-I1 Pro. In this single device, not only dies it have density logic cells (3K to125K), gigabit connectivity, on chip memory, digital clock management, but also it can have up to four IBM PowerPC 405 Processor hard cores, running up to 400MHz and 633 Mbps. To utilize this cutting edge device in space applications, a few Single Event Upset (SEU) mitigation techniques need to be implemented to a design for the device. At Jet Propulsion Laboratory (JPL), we have successfully demonstrated the feasibility of running multiple processors running in a lock step fashion to accomplish SEU mitigation and fault tolerance.

single event upset (SEU)↗

Passive method to measure strength of turbulence

Disclosed is a method to passively measure and calculate the strength of turbulence via the index of refraction structure constant C.sub.n.sup.2 from video imagery gathered by an imaging device, such as a video camera. Processing may occur with any type computing device utilizing a processor executing machine executable code stored on memory. This method significantly simplifies instrumentation requirements, reduces cost, and provides rapid data output. This method combines an angle of arrival methodology, which provides scale factors, with a new spatial/temporal frequency domain method. As part of the development process, video imagery from high speed cameras was collected and analyzed. The data was decimated to video rates such that statistics could be computed and used to confirm that this passive method accurately characterizes the atmospheric turbulence. C.sub.n.sup.2 accuracy from this method compared well with scintillometer data through two full orders of magnitude and more capability is expected beyond this verification.

O'Neill, Mary Morabito↗

Passive method to measure strength of turbulence

Disclosed is a method to passively measure and calculate the strength of turbulence via the index of refraction structure constant Cn2 from video imagery gathered by an imaging device, such as a video camera. Processing may occur with any type computing device utilizing a processor executing machine executable code stored on memory. This method significantly simplifies instrumentation requirements, reduces cost, and provides rapid data output. This method combines an angle of arrival methodology, which provides scale factors, with a new spatial/temporal frequency domain method. As part of the development process, video imagery from high speed cameras was collected and analyzed. The data was decimated to video rates such that statistics could be computed and used to confirm that this passive method accurately characterizes the atmospheric turbulence. Cn2 accuracy from this method compared well with scintillometer data through two full orders of magnitude and more capability is expected beyond this verification.

O'Neill, Mary Morabito↗

Nanoscale Electronic Inhomogeneity in In_2Se_3 Nanoribbons Revealed by Microwave Impedance Microscopy

Driven by interactions due to the charge, spin, orbital, and lattice degrees of freedom, nanoscale inhomogeneity has emerged as a new theme for materials with novel properties near multiphase boundaries. As vividly demonstrated in complex metal oxides and chalcogenides, these microscopic phases are of great scientific and technological importance for research in hightemperature superconductors, colossal magnetoresistance effect, phase-change memories, and domain switching operations. Direct imaging on dielectric properties of these local phases,however, presents a big challenge for existing scanning probe techniques. Here, we report the observation of electronic inhomogeneity in indium selenide (In{sub 2}Se{sub 3}) nanoribbons by near-field scanning microwave impedance microscopy. Multiple phases with local resistivity spanning six orders of magnitude are identified as the coexistence of superlattice, simple hexagonal lattice and amorphous structures with {approx}100nm inhomogeneous length scale, consistent with high-resolution transmission electron microscope studies. The atomic-force-microscope-compatible microwave probe is able to perform quantitative sub-surface electronic study in a noninvasive manner. Finally, the phase change memory function in In{sub 2}Se{sub 3} nanoribbon devices can be locally recorded with big signal of opposite signs.

36 MATERIALS SCIENCE↗

IMPACC: A Tightly Integrated MPI+OpenACC Framework Exploiting Shared Memory Parallelism

We propose IMPACC, an MPI+OpenACC framework for heterogeneous accelerator clusters. IMPACC tightly integrates MPI and OpenACC, while exploiting the shared memory parallelism in the target system. IMPACC dynamically adapts the input MPI+OpenACC applications on the target heterogeneous accelerator clusters to fully exploit target system-specific features. IMPACC provides the programmers with the unified virtual address space, automatic NUMA-friendly task-device mapping, efficient integrated communication routines, seamless streamlining of asynchronous executions, and transparent memory sharing. We have implemented IMPACC and evaluated its performance using three heterogeneous accelerator systems, including Titan supercomputer. Results show that IMPACC can achieve easier programming, higher performance, and better scalability than the current MPI+OpenACC model.

Kim, Jungwon↗

Topological spin memory of antiferromagnetically coupled skyrmion pairs in Co/Gd/Pt multilayers

Antiferromagnetically (AFM) coupled skyrmions offer potential advantages for spintronic devices, including reduced dipolar fields that may enable smaller skyrmion sizes and a reduction of the skyrmion Hall effect. However, the topological stability of AFM-coupled skyrmions subjected to dramatic spin deformation through low-temperature cycling has not been investigated. We report the discovery of a topological spin memory effect for AFM-coupled skyrmion pairs in [Co/Gd/Pt](10) multilayered films. Photoemission electron microscopy imaging shows that bubble skyrmions in the multilayer that are stable at room temperature evolve into complex in-plane spin textures as the temperature is lowered and reform completely when the sample is warmed back up. Simulations demonstrate that Dzyaloshinskii-Moriya interactions play a key role in this spin memory effect, and furthermore reveal that the topological charge is preserved throughout the dramatic spin texture rearrangement and recovery. These results highlight a key aspect of topological protection-the preservation of the topological properties under continuous deformation-and also provide a promising avenue for information encryption and recovery.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Blackcomb2: Hardware-Software Co-design for Nonvolatile Memory in Exascale Systems

The impending shift from DRAM and Flash to fast nonvolatile memory (NVM) provides a game-changing opportunity to rethink traditional system architectures; to address their energy inefficiencies; to leverage the new devices for greater performance; and to exploit the new capability of nonvolatility to enhance system resilience, even in the face of larger system scale and degraded reliability of components. Building on the accomplishments of the Blackcomb Project, funded in 2010, we propose to identify, evaluate, and optimize the most promising NVM hardware and software technologies, which are essential to provide the necessary memory capacity, performance, resilience, and energy efficiency in exascale systems. Capacity and energy are the key drivers. Today's pressing application requirements mandate exascale computing; the datasets and concurrency of these applications demand memory capacity that cannot be met by traditional memory technologies. Although charge-based DRAM will endure, experts foresee only modest DRAM capacity gains. And, as moving data between levels of the hierarchy, and storing and accessing data on disk consumes significant energy, a more energy efficient solution is required. We, therefore, posit that exascale systems will need high density, energy-efficient storage technologies, such as nonvolatile memory for access, transformation, and management of exascale data. To address these issues, in this renewal request, we propose continue the work of our vertically- integrated, focussed team, where our co-design is informed by proxies and interactions with DOE co-design centers. In software, we start by assuming that nonvolatility requires new abstractions and new infrastructure, allowing persistent objects, and delivering performance gains for _le systems and robustness through fast checkpointing. In architecture, we evaluate the tradeoffs of performance and energy by employing a scalable and accurate simulation system to analyze realistic proxy applications. Through this co-design process, we rethink the whole memory architecture, from the cell to the array to the device, with ECC, wearout management, and interfaces. Finally, we provide open-source software models of these NVM-based memory systems.

97 MATHEMATICS AND COMPUTING↗