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Results for “SWITCHING CIRCUIT”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,315 records · Page 73

All sources NASA NTRS DOE OSTI

NASA NTRS1988

Satellite ground-terminal user simulation

Realistic simulation of satellite communication systems and evaluation of satellite networking schemes require emulation of the systems's users. A laboratory model of a Ka-band satellite-switched time-division multiple-access (SS-TDMA) communication network, referred to as the System Integration, Test, and Evaluation (SITE) project, uses special bit-error-rate (BER) test sets to simulate the transmitting and receiving users of a communication network. The bit-error-rate test sets contain circuit boards that can be modified to create a variety of interfaces to satellite system ground terminals.

Shalkhauser, Mary Jo W.↗

NASA NTRS1990

Optical control of an 8-element Ka-band phased array using a high-speed optoelectronic interconnect

Optical distribution of control signals in electronically steered phased array antennas is being considered. A demonstration experiment is described in which a high speed hybrid GaAs optoelectronic integrated circuit (OEIC) was used to control an eight element phased array antenna. The OEIC, which accepts a serial optical control signal as input and converts it to 16 demultiplexed parallel outputs, was used to control the monolithic GaAs phase shifters of a Ka-band patch panel array antenna. Antenna pattern switching speeds of 2.25 microsec, limited by interface circuitry, were observed.

Richard, M. A.↗

NASA NTRS1991

Modular VLSI Reed-Solomon Decoder

Proposed Reed-Solomon decoder contains multiple very-large-scale integrated (VLSI) circuit chips of same type. Each chip contains sets of logic cells and subcells performing functions from all stages of decoding process. Full decoder assembled by concatenating chips, with selective utilization of cells in particular chips. Cost of development reduced by factor of 5. In addition, decoder programmable in field and switched between 8-bit and 10-bit symbol sizes.

Hsu, In-Shek↗

DOE OSTI2020

High-Frequency Signature-Based Fault Detection for Future MV Distribution Grids: Preprint

Increased deployment of Distributed Energy Resources (DERs) and microgrids are significantly changing the operation of distribution grid. Increasing penetration of power electronics based DERs also raise several operational problems such as protection coordination issues, voltage raise, recloser synchronization, stability, and frequency control. Legacy systems are designed for unidirectional power flow. Bidirectional power flows, and varying short circuit levels are some of the major challenges in implementing these legacy protection schemes for future power grid with high penetration of power electronics based DERs. Inverter based DER’s can contribute to a maximum of 2 p.u. fault current. Interconnection standards might require even lower fault current contribution. If these protection related challenges are not addressed, it will result in limiting the penetration of DERs in distribution feeders. In this paper, the feasibility of high frequency signature generated by transients is evaluated to identify and locate faults in a distribution system. The paper will discuss the need for an accurate line modeling approach to accurately capture the high frequency signatures. These high frequency signatures are naturally occurring electromagnetic transients for events such as switching events in the network, faults events, etc. This is different than that implemented in transmission systems as the proposed approach utilizes advanced signal processing techniques to retrieve valuable information from the high frequency signatures generated during faults and does not just rely on time delay measurements between reflections of the high frequency signals. In the full paper, information of a modified IEEE distribution feeder test system to accurately model the high frequency signatures will be provided. The distribution lines will be modeled using universal line modeling (ULM) technique in an electromagnetic transients program (EMTP) modeling platform. Different test cases will be simulated and these test cases will include different fault types, multiple fault locations, capacitor bank switching, etc. The feeder system modeled for these simulations will also include power electronics based DERs. Additionally, experimental results demonstrating the high frequency signatures generated due to a transient event in a medium voltage (13.8 kV) distribution line will also be presented in the full paper. Furthermore, the analysis combined with simulation and experimental results in the full paper will help demonstrate the feasibility and efficacy of the proposed protection scheme. The developed protection scheme will not just help solve problems generated by bidirectional current flow, varying short-circuit current capacity, but also help in proliferation of DERs in distribution systems.

41 EE - Solar Energy Technologies Office (EE-4S)↗

NASA NTRS1973

Induction motor control system with voltage controlled oscillator circuit

A voltage controlled oscillator circuit is reported in which there are employed first and second differential amplifiers. The first differential amplifier, being employed as an integrator, develops equal and opposite slopes proportional to an input voltage, and the second differential amplifier functions as a comparator to detect equal amplitude positive and negative selected limits and provides switching signals which gate a transistor switch. The integrating differential amplifier is switched between charging and discharging modes to provide an output of the first differential amplifier which upon the application of wave shaping provides a substantially sinusoidal output signal. A two phased version with a second integrator provides a second 90 deg phase shifted output for induction motor control.

Nola, F. J.↗

NASA NTRS2011

Swift BAT Loop Heat Pipe #0 Temperature Droop Problem and Solution After Its Primary Heater Controller Failure

The primary heater controller for Burst Alert Telescope (BAT) loop heat pipe (LHP) #0 failed on March 31, 2010. It has been disabled. The secondary heater circuit is operational. However the set point tolerance of the secondary heater controller is significantly out of specifications. A novel variable conductance heat pipe (VCHP) is used to pre-condition the LHP propylene liquid before it returns to the compensation chamber (CC). Due to the limit on the quantity of power switches, the LHP and VCHP temperatures are controlled by different channels of the same heater controller. For this reason, the VCHP heater controller channel is also out of specification. It caused larger tolerances in the temperature of the propylene liquid returning to the CC. As a result, there were intermittent temperature droops every 10-14 days at the coldest attitude during the eclipse. After the set point of the secondary heater controller was gradually increased from 8 C to 8.7 C, there was no temperature droop for over four months.

Choi, Michael K.↗

NASA NTRS2013

Single-Event Transient Testing of Low Dropout PNP Series Linear Voltage Regulators

As demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing

Adell, Philippe↗

NASA NTRS2013

Single-event transient testing of low dropout PNP series linear voltage regulators

Allen, Gregory↗

DOE OSTI2012

Integrating The Non-Electrical Worker Into The Electrical Safety Program

The intent of this paper is to demonstrate an electrical safety program that incorporates all workers into the program, not just the electrical workers. It is largely in response to a paper presented at the 2012 ESW by Lanny Floyd entitled "Facilitating Application of Electrical Safety Best Practices to "Other" Workers" which requested all attendees to review their electrical safety program to assure that non-electrical workers were protected as well as electrical workers. The referenced paper indicated that roughly 50% of electrical incidents involve workers whose primary function is not electrical in nature. It also encouraged all to "address electrical safety for all workers and not just workers whose job responsibilities involve working on or near energized electrical circuits." In this paper, a program which includes specific briefings to non-electrical workers as well as to workers who may need to perform their normal activities in proximity to energized electrical conductors is presented. The program uses a targeted approach to specific areas such as welding, excavating, rigging, chart reading, switching, cord and plug equipment and several other general areas to point out hazards that may exist and how to avoid them. NFPA 70E-2004 was incorporated into the program several years ago and with it the need to include the "other" workers became apparent. The site experience over the years supports the assertion that about half of the electrical incidents involve non-electrical workers and this prompted us to develop specific briefings to enhance the knowledge of the non-electrical worker regarding safe electrical practices. The promotion of "May is Electrical Safety Month" and the development of informative presentations which are delivered to the general site population as well as electrical workers have greatly improved the hazards awareness status of the general worker on site.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

DOE OSTI2012

Sequestration-based bistability enables tuning of the switching boundaries and design of a latch

Natural biological systems have evolved a diverse array of switches to realize their strategies for environmental response and development. Emerging applications of synthetic biology have begun to exploit such switches to achieve increasingly sophisticated designed behaviors. However, not all switch architectures allow facile design of the switching and memory properties. Furthermore, not all designs are built from components for which large families of variants exist, a requirement for building many orthogonal switch variants. Therefore, there is a critical need from genetic engineers for scalable strategies that yield custom bistable switches. Here, we use a sigma factor and its cognate anti-sigma factor to experimentally verify that ultrasensitivity from sequestration combined with positive feedback is sufficient to build a bistable switch. We show that sequestration allows us to predictably tune the switching boundaries, and we can easily tune our switch to function as a set–reset latch that can be toggled between two states by a pulse of inducer input.

59 BASIC BIOLOGICAL SCIENCES↗

NASA NTRS2010

TERRA Battery Thermal Control Anomaly - Simulation and Corrective Actions

The TERRA spacecraft was launched in December 1999 from Vandenberg Air Force Base, becoming the flagship of NASA's Earth Observing System program to gather data on how the planet's processes create climate. Originally planned as a 5 year mission, it still provides valuable science data after nearly 10 years on orbit. On October 13th, 2009 at 16:23z following a routine inclination maneuver, TERRA experienced a battery cell failure and a simultaneous failure of several battery heater control circuits used to maintain cell temperatures and gradients within the battery. With several cells nearing the minimum survival temperature, preventing the electrolyte from freezing was the first priority. After several reset attempts and power cycling of the control electronics failed to reestablish control authority on the primary side of the controller, it was switched to the redundant side, but anomalous performance again prevented full heater control of the battery cells. As the investigation into the cause of the anomaly and corrective action continued, a battery thermal model was developed to be used in determining the control ability remaining and to simulate and assess corrective actions. Although no thermal model or detailed reference data of the battery was available, sufficient information was found to allow a simplified model to be constructed, correlated against pre-anomaly telemetry, and used to simulate the thermal behavior at several points after the anomaly. It was then used to simulate subsequent corrective actions to assess their impact on cell temperatures. This paper describes the rapid development of this thermal model, including correlation to flight data before and after the anomaly., along with a comparative assessment of the analysis results used to interpret the telemetry to determine the extent of damage to the thermal control hardware, with near-term corrective actions and long-term operations plan to overcome the anomaly.

Grob, Eric W.↗

DOE OSTI2018

Impact of Accelerated StressTests on SiC MOSFET Precursor Parameters: Preprint

Incorporating SiC power MOSFETs is very attractive for advancing power electronic system performance, yet the system reliability with new devices remains in question. This work presents an overview of accelerated lifetime tests and the packaging and semiconductor failure mechanisms they excite. The experiments explained here includes High Temperature Gate Bias (HTGB), Switching Cycling, Power Cycling, and Thermal Cycling. These experiments stress different failure mechanisms, that show degradation in different device parameters including, but not limited to, threshold voltage and on-resistance. These four experiments help illustrate the spectrum between device and package degradation that can be used to design more reliable power electronic circuits.

33 ADVANCED PROPULSION SYSTEMS↗

NASA NTRS1973

Analysis and modeling of a family of two-transistor parallel inverters

A family of five static dc-to-square-wave inverters, each employing a square-loop magnetic core in conjunction with two switching transistors, is analyzed using piecewise-linear models for the nonlinear characteristics of the transistors, diodes, and saturable-core devices. Four of the inverters are analyzed in detail for the first time. These analyses show that, by proper choice of a frame of reference, each of the five quite differently appearing inverter circuits can be described by a common equivalent circuit. This equivalent circuit consists of a five-segment nonlinear resistor, a nonlinear saturable reactor, and a linear capacitor. Thus, by proper interpretation and identification of the parameters in the different circuits, the results of a detailed solution for one of the inverter circuits provide similar information and insight into the local and global behavior of each inverter in the family.

Lee, F. C. Y.↗

NASA NTRS1951

A Multiple-range Self-balancing Thermocouple Potentiometer

A multiple-range potentiometer circuit is described that provides automatic measurement of temperatures or temperature differences with any one of several thermocouple-material pairs. Techniques of automatic reference junction compensation, span adjustment, and zero suppression are described that permit rapid selection of range and wire material, without the necessity for restandardization, by setting of two external tap switches.

INSTRUMENTS, LABORATORY↗

DOE OSTI2011

Advanced High-Speed Framing Camera Development for Fast, Visible Imaging Experiments

The advances in high-voltage switching developed in this project allow a camera user to rapidly vary the number of output frames from 1 to 25. A high-voltage, variable-amplitude pulse train shifts the deflection location to the new frame location during the interlude between frames, making multiple frame counts and locations possible. The final deflection circuit deflects to five different frame positions per axis, including the center position, making for a total of 25 frames. To create the preset voltages, electronically adjustable {+-}500 V power supplies were chosen. Digital-to-analog converters provide digital control of the supplies. The power supplies are clamped to {+-}400 V so as not to exceed the voltage ratings of the transistors. A field-programmable gated array (FPGA) receives the trigger signal and calculates the combination of plate voltages for each frame. The interframe time and number of frames are specified by the user, but are limited by the camera electronics. The variable-frame circuit shifts the plate voltages of the first frame to those of the second frame during the user-specified interframe time. Designed around an electrostatic image tube, a framing camera images the light present during each frame (at the photocathode) onto the tube’s phosphor. The phosphor persistence allows the camera to display multiple frames on the phosphor at one time. During this persistence, a CCD camera is triggered and the analog image is collected digitally. The tube functions by converting photons to electrons at the negatively charged photocathode. The electrons move quickly toward the more positive charge of the phosphor. Two sets of deflection plates skew the electron’s path in horizontal and vertical (x axis and y axis, respectively) directions. Hence, each frame’s electrons bombard the phosphor surface at a controlled location defined by the voltages on the deflection plates. To prevent the phosphor from being exposed between frames, the image tube is gated off between exposures.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2020

Resonance Suppression based on Predictive Control of Grid-following Inverters with LCL Filter in Weak Grid Condition

This paper presents an effective resonance suppression control when grid interactive inverter with LCL filter experience weak grid conditions. The resonance suppression mechanism is based on finite-set model predictive control (FSMPC) with adaptive cost function to alter the controller objectives seamlessly. The large parasitic impedance and low short circuit ratio (SCR) of weak grid challenges the operation of gridconnected inverters. Specifically, the LCL filter resonance may get excited, resulting in collapse of the inverter operation. To address this issue, an effective active damping approach is implemented in the proposed control. In the proposed active damping scheme for resonance suppression, the feedback currents are switched based on the operating conditions of inverter. During the stiff grid conditions, grid current serves as feedback to the controller. While in the weak grid conditions, the inverter current is selected as feedback signal. The toggling action between these two feedback currents is determined by comparing moving RMS of grid current with threshold current as constraint in the cost function of the proposed MPC scheme. The threshold current for toggling action is based on the reference active and reactive power setpoints plus an acceptable band of variation. The theoretical analysis is verified by several case studies.

Umar, Muhammad Farooq↗

NASA NTRS1983

An improved push-pull voltage fed converter using a tapped output-filter inductor

A new concept of using a tapped output-filter inductor and an auxiliary commutating diode to reduce the likelihood of transformer core saturation in a push-pull, voltage-fed converter is presented. The linearized circuit model and transfer functions are derived with a hybrid approach using both state-space and circuit averaging. Operation of the new converter - including parasitic effects - is discussed, and a design equation for inductor tap ratio is established. It is predicted and experimentally confirmed that the new converter has more symmetrical transformer core operation, and the potential exits for lower transistor turnon current and reduced transistor voltage stress. These benefits reduce switching loss and enhance transistor reliability.

Wester, G. W.↗

DOE OSTI2017

Scalable polylithic on-package integratable apparatus and method

Described is an apparatus which comprises: a first die including: a processing core; a crossbar switch coupled to the processing core; and a first edge interface coupled to the crossbar switch; and a second die including: a first edge interface positioned at a periphery of the second die and coupled to the first edge interface of the first die, wherein the first edge interface of the first die and the first edge interface of the second die are positioned across each other; a clock synchronization circuit coupled to the second edge interface; and a memory interface coupled to the clock synchronization circuit.

42 ENGINEERING↗