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At least 1,297 records · Page 72

Automated Cache Performance Analysis And Optimization

While there is no lack of performance counter tools for coarse-grained measurement of cache activity, there is a critical lack of tools for relating data layout to cache behavior to application performance. Generally, any nontrivial optimizations are either not done at all, or are done ”by hand” requiring significant time and expertise. To the best of our knowledge no tool available to users measures the latency of memory reference instructions for particular addresses and makes this information available to users in an easy-to-use and intuitive way. In this project, we worked to enable the Open|SpeedShop performance analysis tool to gather memory reference latency information for specific instructions and memory addresses, and to gather and display this information in an easy-to-use and intuitive way to aid performance analysts in identifying problematic data structures in their codes. This tool was primarily designed for use in the supercomputer domain as well as grid, cluster, cloud-based parallel e-commerce, and engineering systems and middleware. Ultimately, we envision a tool to automate optimization of application cache layout and utilization in the Open|SpeedShop performance analysis tool. To commercialize this software, we worked to develop core capabilities for gathering enhanced memory usage performance data from applications and create and apply novel methods for automatic data structure layout optimizations, tailoring the overall approach to support existing supercomputer and cluster programming models and constraints. In this Phase I project, we focused on infrastructure necessary to gather performance data and present it in an intuitive way to users. With the advent of enhanced Precise Event-Based Sampling (PEBS) counters on recent Intel processor architectures and equivalent technology on AMD processors, we are now in a position to access memory reference information for particular addresses. Prior to the introduction of PEBS counters, cache behavior could only be measured reliably in the aggregate across tens or hundreds of thousands of instructions. With the newest iteration of PEBS technology, cache events can be tied to a tuple of instruction pointer, target address (for both loads and stores), memory hierarchy, and observed latency. With this information we can now begin asking questions regarding the efficiency of not only regions of code, but how these regions interact with particular data structures and how these interactions evolve over time. In the short term, this information will be vital for performance analysts understanding and optimizing the behavior of their codes for the memory hierarchy. In the future, we can begin to ask how data layouts might be changed to improve performance and, for a particular application, what the theoretical optimal performance might be. The overall benefit to be produced by this effort was a commercial quality easy-to- use and scalable performance tool that will allow both beginner and experienced parallel programmers to automatically tune their applications for optimal cache usage. Effective use of such a tool can literally save weeks of performance tuning effort. Easy to use. With the proposed innovations, finding and fixing memory performance issues would be more automated and hide most to all of the performance engineer expertise ”under the hood” of the Open|SpeedShop performance tool. One of the biggest public benefits from the proposed innovations is that it makes performance analysis more usable to a larger group of application developers. Intuitive reporting of results. The Open|SpeedShop performance analysis tool has a rich set of intuitive, yet detailed reports for presenting performance results to application developers. Our goal was to leverage this existing technology to present the results from our memory performance addition to Open|SpeedShop. Suitable for experts as well as novices. Application performance is getting more difficult to measure as the hardware platforms they run on become more complicated. This makes life difficult for the application developer, in that they need to know more about the hardware platform, including the memory system hierarchy, in order to understand the performance of their application. Some application developers are comfortable in that sceario, while others want to do their scientific research and not have to understand all the nuances in the hardware platform they are running their application on. Our proposed innovations were aimed to support both experts and novice performance analysts. Useful in many markets. The enhancement to Open|SpeedShop would appeal to a broader market space, as it will be useful in scientific, commercial, and cloud computing environments. Our goal was to use technology developed initially at the and Lawrence Livermore National Laboratory combined with the development and commercial software experience of the Argo Navis Technologies, LLC (ANT) to form a powerful combination to delivery these objectives.

97 MATHEMATICS AND COMPUTING↗

Giant Nonlinear Optical Response via Coherent Stacking of In-Plane Ferroelectric Layers

Thin ferroelectric materials hold great promise for compact nonvolatile memory and nonlinear optical and optoelectronic devices. Herein, an ultrathin in-plane ferroelectric material that exhibits a giant nonlinear optical effect, group-IV monochalcogenide SnSe, is reported. Nanometer-scale ferroelectric domains with ≈90°/270° twin boundaries or ≈180° domain walls are revealed in physical-vapor-deposited SnSe by lateral piezoresponse force microscopy. Atomic structure characterization reveals both parallel and antiparallel stacking of neighboring van der Waals ferroelectric layers, leading to ferroelectric or antiferroelectric ordering. Ferroelectric domains exhibit giant nonlinear optical activity due to coherent enhancement of second-harmonic fields and the as-resulted second-harmonic generation was observed to be 100 times more intense than monolayer WS 2 . This work demonstrates in-plane ferroelectric ordering and giant nonlinear optical activity in SnSe, which paves the way for applications in on-chip nonlinear optical components and nonvolatile memory devices.

36 MATERIALS SCIENCE↗

Probabilistic Neural Computing with Stochastic Devices

Abstract The brain has effectively proven a powerful inspiration for the development of computing architectures in which processing is tightly integrated with memory, communication is event‐driven, and analog computation can be performed at scale. These neuromorphic systems increasingly show an ability to improve the efficiency and speed of scientific computing and artificial intelligence applications. Herein, it is proposed that the brain's ubiquitous stochasticity represents an additional source of inspiration for expanding the reach of neuromorphic computing to probabilistic applications. To date, many efforts exploring probabilistic computing have focused primarily on one scale of the microelectronics stack, such as implementing probabilistic algorithms on deterministic hardware or developing probabilistic devices and circuits with the expectation that they will be leveraged by eventual probabilistic architectures. A co‐design vision is described by which large numbers of devices, such as magnetic tunnel junctions and tunnel diodes, can be operated in a stochastic regime and incorporated into a scalable neuromorphic architecture that can impact a number of probabilistic computing applications, such as Monte Carlo simulations and Bayesian neural networks. Finally, a framework is presented to categorize increasingly advanced hardware‐based probabilistic computing technologies.

Misra, Shashank↗

Magnetic Texture in Insulating Single Crystal High Entropy Oxide Spinel Films

Magnetic insulators are important materials for a range of next-generation memory and spintronic applications. Structural constraints in this class of devices generally require a clean heterointerface that allows effective magnetic coupling between the insulating layer and the conducting layer. However, there are relatively few examples of magnetic insulators that can be synthesized with surface qualities that would allow these smooth interfaces and precisely tuned interfacial magnetic exchange coupling, which might be applicable at room temperature. In this work, we demonstrate an example of how the configurational complexity in the magnetic insulator layer can be used to realize these properties. The entropy-assisted synthesis is used to create single-crystal (Mg 0.2 Ni 0.2 Fe 0.2 Co 0.2 Cu 0.2 )Fe 2 O 4 films on substrates spanning a range of strain states. These films show smooth surfaces, high resistivity, and strong magnetic responses at room temperature. Furthermore, local and global magnetic measurements further demonstrate how strain can be used to manipulate the magnetic texture and anisotropy. These findings provide insight into how precise magnetic responses can be designed using compositionally complex materials that may find application in next-generation magnetic devices.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Heterostructures based on inorganic and organic van der Waals systems

The two-dimensional limit of layered materials has recently been realized through the use of van der Waals (vdW) heterostructures composed of weakly interacting layers. In this paper, we describe two different classes of vdW heterostructures: inorganic vdW heterostructures prepared by co-lamination and restacking; and organic-inorganic hetero-epitaxy created by physical vapor deposition of organic molecule crystals on an inorganic vdW substrate. Both types of heterostructures exhibit atomically clean vdW interfaces. Employing such vdW heterostructures, we have demonstrated various novel devices, including graphene/hexagonal boron nitride (hBN) and MoS{sub 2} heterostructures for memory devices; graphene/MoS{sub 2}/WSe{sub 2}/graphene vertical p-n junctions for photovoltaic devices, and organic crystals on hBN with graphene electrodes for high-performance transistors.

36 MATERIALS SCIENCE↗

Formation of multilayered magnetic nanotracks with perpendicular anisotropy via deoxidization using ion irradiation on ultraviolet-imprinted intaglio nanostructures

We proposed a method to fabricate perpendicular magnetic nanotracks in the cobalt oxide/palladium multilayer films using UV-nanoimprinting lithography and low-energy hydrogen-ion irradiation. This is a method to magnetize UV-imprinted intaglio nanotracks via low-energy hydrogen ion irradiation, resulting the irradiated region are magnetically separated from the non-irradiated region. Multilayered magnetic nanotracks with a line width of 140 nm, which were fabricated by this parallel process without additional dry etching process, exhibited a saturation magnetization of 290 emu cm{sup −3} and a coercivity of 2 kOe. This study demonstrates a cost-effective mass production of multilayered perpendicular magnetic nanotracks and offers the possibility to achieve high density storage and memory devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A fast, matrix-based method to perform omnidirectional pressure integration

Abstract Experimentally-measured pressure fields play an important role in understanding many fluid dynamics problems. Unfortunately, pressure fields are difficult to measure directly with non-invasive, spatially resolved diagnostics, and calculations of pressure from velocity have proven sensitive to error in the data. Omnidirectional line integration methods are usually more accurate and robust to these effects as compared to implicit Poisson equations, but have seen slower uptake due to the higher computational and memory costs, particularly in 3D domains. This paper demonstrates how omnidirectional line integration approaches can be converted to a matrix inversion problem. This novel formulation uses an iterative approach so that the boundary conditions are updated each step, preserving the convergence behavior of omnidirectional schemes while also keeping the computational efficiency of Poisson solvers. This method is implemented in Matlab and also as a GPU-accelerated code in CUDA-C++. The behavior of the new method is demonstrated on 2D and 3D synthetic and experimental data. Three-dimensional grid sizes of up to 125 million grid points are tractable with this method, opening exciting opportunities to perform volumetric pressure field estimation from 3D PIV measurements.

42 ENGINEERING↗

Connect the Dots: In Situ 4-D Seismic Monitoring of CO 2 Storage With Spatio-Temporal CNNs

4-D seismic imaging has been widely used in CO 2 sequestration projects to monitor the fluid flow in the volumetric subsurface region that is not sampled by wells. Ideally, real-time monitoring and near-future forecasting would provide site operators with great insights to understand the dynamics of the subsurface reservoir and assess any potential risks. However, due to obstacles such as high deployment cost, availability of acquisition equipment, exclusion zones around surface structures, only very sparse seismic imaging data can be obtained during monitoring. That leads to an unavoidable and growing knowledge gap over time. The operator needs to understand the fluid flow throughout the project lifetime and the seismic data are only available at a limited number of times. This is insufficient for understanding reservoir behavior. To overcome those challenges, we have developed spatio-temporal neural-network-based models that can produce high-fidelity interpolated or extrapolated images effectively and efficiently. Specifically, our models are built on an autoencoder, and incorporate the long short-term memory (LSTM) structure with a new loss function regularized by optical flow. We validate the performance of our models using real 4-D post-stack seismic imaging data acquired at the Sleipner CO 2 sequestration field. We employ two different strategies in evaluating our models. Numerically, we compare our models with different baseline approaches using classic pixel-based metrics. We also conduct a blind survey and collect a total of 20 responses from domain experts to evaluate the quality of data generated by our models. Finally, via both numerical and expert evaluation, we conclude that our models can produce high-quality 2-D/3-D seismic imaging data at a reasonable cost, offering the possibility of real-time monitoring or even near-future forecasting of the CO 2 storage reservoir.

4-D seismic imaging↗

A GPU-accelerated and Monte Carlo-based intensity modulated proton therapy optimization system

Purpose: Conventional spot scanning intensity modulated proton therapy (IMPT) treatment planning systems (TPSs) optimize proton spot weights based on analytical dose calculations. These analytical dose calculations have been shown to have severe limitations in heterogeneous materials. Monte Carlo (MC) methods do not have these limitations; however, MC-based systems have been of limited clinical use due to the large number of beam spots in IMPT and the extremely long calculation time of traditional MC techniques. In this work, the authors present a clinically applicable IMPT TPS that utilizes a very fast MC calculation. Methods: An in-house graphics processing unit (GPU)-based MC dose calculation engine was employed to generate the dose influence map for each proton spot. With the MC generated influence map, a modified least-squares optimization method was used to achieve the desired dose volume histograms (DVHs). The intrinsic CT image resolution was adopted for voxelization in simulation and optimization to preserve spatial resolution. The optimizations were computed on a multi-GPU framework to mitigate the memory limitation issues for the large dose influence maps that resulted from maintaining the intrinsic CT resolution. The effects of tail cutoff and starting condition were studied and minimized in this work. Results: For relatively large and complex three-field head and neck cases, i.e., >100 000 spots with a target volume of ∼1000 cm{sup 3} and multiple surrounding critical structures, the optimization together with the initial MC dose influence map calculation was done in a clinically viable time frame (less than 30 min) on a GPU cluster consisting of 24 Nvidia GeForce GTX Titan cards. The in-house MC TPS plans were comparable to a commercial TPS plans based on DVH comparisons. Conclusions: A MC-based treatment planning system was developed. The treatment planning can be performed in a clinically viable time frame on a hardware system costing around 45 000 dollars. The fast calculation and optimization make the system easily expandable to robust and multicriteria optimization.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

A Predictor-Corrector Strategy for Adaptivity in Dynamical Low-Rank Approximations

Here, in this paper, we present a predictor-corrector strategy for constructing rank-adaptive, dynamical low-rank approximations (DLRAs) of matrix-valued ODE systems. The strategy is a compromise between (i) low-rank step-truncation approaches that alternately evolve and compress solutions and (ii) strict DLRA approaches that augment the low-rank manifold using subspaces generated locally in time by the DLRA integrator. The strategy is based on an analysis of the error between a forward temporal update into the ambient full-rank space, which is typically computed in a step-truncation approach before recompressing, and the standard DLRA update, which is forced to live in a low-rank manifold. We use this error, without requiring its full-rank representation, to correct the DLRA solution. A key ingredient for maintaining a low-rank representation of the error is a randomized SVD, which introduces some degree of stochastic variability into the implementation. The strategy is formulated and implemented in the context of discontinuous Galerkin spatial discretizations of PDEs and applied to several versions of DLRA methods found in the literature as well as a new variant. Numerical experiments comparing the predictor-corrector strategy to other methods demonstrate robustness to overcome shortcomings of step truncation or strict DLRA approaches: The former may require more memory than is strictly needed, while the latter may miss transients solution features that cannot be recovered. The effect of randomization, tolerances, and other implementation parameters is also explored.

97 MATHEMATICS AND COMPUTING↗

Optimizing Tensor Contractions in CCSD(T) for Efficient Execution on GPUs

Tensor contractions are higher dimensional analogs of matrix multiplications, used in many computational contexts such as high order models in quantum chemistry, deep learning, nite element methods etc. In contrast to the wide availability of high-performance libraries for matrix multiplication on GPUs, the same is not true for tensor contractions. In this paper, we address the optimization of a set of symmetrized tensor contractions that form the computational bottleneck in the CCSD(T) coupled-cluster method in computational chemistry suites like NWChem. Some of the challenges in optimizing tensor contractions that arise in practice from the variety of dimensionalities and shapes for tensors include effective mapping of the high-dimensional iteration space to threads, choice of data buffering in shared-memory and registers, and tile sizes for multi-level tiling. Furthermore, in the case of symmetrized tensor contractions in CCSD(T), it is also a challenge to fuse contractions to reduce data movement cost by exploiting reuse of intermediate tensors. In this paper, we developed an efficient GPU implementation of the tensor contractions in CCSD(T) using shared-memory buffering, register tiling, loop fusion and register transpose. Experimental results demonstrate significant improvement over the current state-of-the-art.

Kim, Jinsung↗

Simulations of transition and turbulence on the Navier-Stokes computer

The Navier-Stokes Computer (NSC) consists of multiple local memory parallel processors interconnected in a hypercube network. Efficient implementation of algorithms on the NSC thus requires the effective utilization of both the coarse and fine grain paralelism inherent in the architectural design. The basic approach to implementing an algorithm on the NSC is presented herein. The particular finite-difference algorithm considered was developed for performing transition and turbulence simulations by direct solution of the time-dependent incompressible Navier-Stokes equations. The suitability of this algorithm for performing simulations of the isotropic turbulence problem is verified from computations performed on a Cray 2. Projected timing results for the algorithm on the NSC itself are presented for both the isotropic turbulence and laminar turbulent transition problems.

Krist, S. E.↗

Digital tracking loops for a programmable digital modem

In this paper, an analysis and hardware emulation of the tracking loops for a very flexible programmable digital modem (PDM) will be presented. The modem is capable of being programmed for 2, 4, 8, 16-PSK, 16-QAM, MSK, and Offset-QPSK modulation schemes over a range of data rates from 2.34 to 300 Mbps with programmable spectral occupancy from 1.2 to 1.8 times the symbol rate; these operational parameters are executable in burst or continuous mode. All of the critical processing in both the modulator and demodulator is done at baseband with very high-speed digital hardware and memory. Quadrature analog front-ends are used for translation between baseband and the IF center frequency. The modulator is based on a table lookup approach, where precomputed samples are stored in memory and clocked out according to the incoming data pattern. The sample values are predistorted to counteract the effects of the other filtering functions in the link as well as any transmission impairments. The demodulator architecture was adapted from a joint estimator-detector (JED) mathematical analysis. Its structure is applicable to most signalling formats that can be represented in a two-dimensional space. The JED realization uses interdependent, mutually aiding tracking loops with post-detection data feedback. To expedite and provide for more reliable synchronization, initial estimates for these loops are computed in a parallel acquisition processor. The cornerstone of the demodulator realization is the pre-averager received data filter which allows operation over a broad range of data rates without any hardware changes and greatly simplifies the implementation complexity. The emulation results confirmed tracking loop operation over the entire range of operational parameters listed above, as well as the capability of achieving and maintaining synchronization at BER's in excess of 10(exp -1). The emulation results also showed very close agreement with the tracking loop analysis, and validated the resolution apportionment of the various hardware elements in the tracking loops.

Poklemba, John J.↗

RighTime: A real time clock correcting program for MS-DOS-based computer systems

A computer program is described which effectively eliminates the misgivings of the DOS system clock in PC/AT-class computers. RighTime is a small, sophisticated memory-resident program that automatically corrects both the DOS system clock and the hardware 'CMOS' real time clock (RTC) in real time. RighTime learns what corrections are required without operator interaction beyond the occasional accurate time set. Both warm (power on) and cool (power off) errors are corrected, usually yielding better than one part per million accuracy in the typical desktop computer with no additional hardware, and RighTime increases the system clock resolution from approximately 0.0549 second to 0.01 second. Program tools are also available which allow visualization of RighTime's actions, verification of its performance, display of its history log, and which provide data for graphing of the system clock behavior. The program has found application in a wide variety of industries, including astronomy, satellite tracking, communications, broadcasting, transportation, public utilities, manufacturing, medicine, and the military.

Becker, G. Thomas↗

Initial SEE Testing of Maestro

We have reported on initial SEE sensitivity of the full 49-core Maestro device. Supporting the low-level structures and qualitative system observation goals of phase 1 of testing. Observed sensitivities found to be consistent with Boeing predictions. Highlighted by the L1 data cache sensitivity which drives the rates on the current Maestro device. Presented details to the hardware and software setups that show where the limitations - highlighting future work. Key future work includes testing with memory and IO ports.

cache sensitivity↗

NASA Goddard Space Flight Center’s Compendium of Radiation Effects Test Results

Total ionizing dose, displacement damage dose, and single event effects testing were performed to characterize and determine the suitability of candidate electronics for NASA space utilization. Devices tested include FETs, flash memory, FPGAs, optoelectronics, digital, analog, and bipolar devices.

Single Event Effects (SEE)↗

NASA Goddard Space Flight Center’s Compendium of Radiation Effects Test Results

Total ionizing dose, displacement damage dose, and single event effects testing were performed to characterize and determine the suitability of candidate electronics for NASA space utilization. Devices tested include FETs, flash memory, FPGAs, optoelectronics, digital, analog, and bipolar devices.

Single Event Effects (SEE)↗

A fast, memory efficient and robust sparse preconditioner based on a multifrontal approach with applications to finite‐element matrices

Summary In this article, we introduce a fast, memory efficient and robust sparse preconditioner that is based on a direct factorization scheme for sparse matrices arising from the finite‐element discretization of elliptic partial differential equations. We use a fast (but approximate) multifrontal approach as a preconditioner and use an iterative scheme to achieve a desired accuracy. This approach combines the advantages of direct and iterative schemes to arrive at a fast, robust, and accurate preconditioner. We will show that this approach is faster (∼2×) and more memory efficient (∼2–3×) than a conventional direct multifrontal approach. Furthermore, we will demonstrate that this preconditioner is both faster and more effective than other preconditioners such as the incomplete LU preconditioner. Specific speedups depend on the matrix size and improve as the size of the matrix increases. The preconditioner can be applied to both structured and unstructured meshes in a similar manner. We build on our previous work and utilize the fact that dense frontal and update matrices, in the multifrontal algorithm, can be represented as hierarchically off‐diagonal low‐rank matrices. Using this idea, we replace all large dense matrix operations in the multifrontal elimination process with O ( N ) hierarchically off‐diagonal low‐rank operations to arrive at a faster and more memory efficient factorization scheme. We then use this direct factorization method at low accuracies as a preconditioner and apply it to various real‐life engineering test cases. Copyright © 2016 John Wiley & Sons, Ltd.

Aminfar, AmirHossein↗