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At least 1,297 records · Page 72

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Barry, R. C.↗

Systems and methods for reconfiguring input devices

A system includes an input device having first and second input members configured to be activated by a user. The input device is configured to generate activation signals associated with activation of the first and second input members, and each of the first and second input members are associated with an input function. A processor is coupled to the input device and configured to receive the activation signals. A memory coupled to the processor, and includes a reconfiguration module configured to store the input functions assigned to the first and second input members and, upon execution of the processor, to reconfigure the input functions assigned to the input members when the first input member is inoperable.

Lancaster, Jeff↗

Self-Assembled Layered Supercell Structure of Bi2AlMnO6 with Strong Room-Temperature Multiferroic Properties.

Room-temperature (RT) multiferroics, possessing ferroelectricity and ferromagnetism simultaneously at RT, hold great promise in miniaturized devices including sensors, actuators, transducers, and multi-state memories. In this work, we report a novel 2D layered RT multiferroic system with self-assembled layered supercell structure consisting of two mismatch-layered sub-lattices of [Bi 3 O 3+δ ] and [MO 2 ] 1.84 (M=Al/Mn, simply named as BAMO), i.e., alternative layered stacking of two mutually incommensurate sublattices made of a three-layer-thick Bi-O slab and a one-layer-thick Al/Mn-O octahedra slab along the out-of-plane direction. Strong room-temperature multiferroic responses, e.g., ferromagnetic and ferroelectric properties, have been demonstrated and attributed to the highly anisotropic 2D nature of the non-ferromagnetic and ferromagnetic sublattices which are highly mismatched. The work demonstrates an alternative design approach for new 2D layered oxide materials that hold promises as single-phase multiferroics, 2D oxides with tunable bandgaps, and beyond.

36 MATERIALS SCIENCE↗

Feasibility Study of Millimeter Wave Radars For Safeguards Applications

Containment and surveillance are fundamental measures in nuclear safeguards. Techniques such as video surveillance and laser curtain for containment provide effective monitoring in areas where maintaining continuity of knowledge is required. These systems, however, can be susceptible to loss of monitoring capabilities under certain environmental conditions such as poor visibility (i.e. low light conditions, smoke, fog, etc.) or extended power loss past the duration that the backup power system is designed for. Brookhaven National Laboratory has been investigating the feasibility of millimeter waves (mmWave) as a new perimeter seal in which radio frequency waves in the range of 60-64 GHz are used to detect and monitor objects of interest. Signals in this frequency range are not susceptible to environmental conditions. For proof-of-concept tests, mmWave sensors from Texas Instruments (TI), specificallyIWR6843, are used in a test bed at BNL's Waste Management facility to simulate the operations at nuclear facilities. The unique design of TI mmWave sensors requires less memory and power consumption compared to counterpart systems. These devices are capable of exporting 3D point-cloud data, which is visualized graphically and compared to videos recorded at the same time to validate the performance of the mmWave sensor. A set of experiments were planned to test the feasibility of the mmWave in this application, including monitoring static containers in a storage area and detecting intrusions at the boundaries of the area. In addition, the experiments also identify potential blind spots relative to sensor position and utilize multiple operating sensors simultaneously to reduce or eliminate such blind spots. The optimal positioning of multiple sensors was determined for the experimental room configuration. In this paper, we will discuss the details of this novel perimeter sealing concept and present the test results.

98 NUCLEAR DISARMAMENT, SAFEGUARDS, AND PHYSICAL P↗

Weaves as an Interconnection Fabric for ASIM's and Nanosatellites

Many of the micromachines under consideration require computer support, indeed, one of the appeals of this technology is the ability to intermix mechanical, optical, analog, and digital devices on the same substrate. The amount of computer power is rarely an issue, the sticking point is the complexity of the software required to make effective use of these devices. Micromachines are the nano-technologist's equivalent of 'golden screws'. In other words, they will be piece parts in larger assemblages. For example, a nano-satellite may be composed of stacked silicon wafers where each wafer contains hundreds to thousands of micromachines, digital controllers, general purpose computers, memories, and high-speed bus interconnects. Comparatively few of these devices will be custom designed, most will be stock parts selected from libraries and catalogs. The novelty will lie in the interconnections. For example, a digital accelerometer may be a component part in an adaptive suspension, a monitoring element embedded in the wrapper of a package, or a portion of the smart skin of a launch vehicle. In each case, this device must inter-operate with other devices and probes for the purposes of command, control, and communication. We propose a software technology called 'weaves' that will permit large collections of micromachines and their attendant computers to freely intercommunicate while preserving modularity, transparency, and flexibility. Weaves are composed of networks of communicating software components. The network, and the components comprising it, may be changed even while the software, and the devices it controls, are executing. This unusual degree of software plasticity permits micromachines to dynamically adapt the software to changing conditions and allows system engineers to rapidly and inexpensively develop special purpose software by assembling stock software components in custom configurations.

Gorlick, Michael M.↗

Integrating Commercial Off-The-Shelf (COTS) graphics and extended memory packages with CLIPS

This paper addresses the question of how to mix CLIPS with graphics and how to overcome PC's memory limitations by using the extended memory available in the computer. By adding graphics and extended memory capabilities, CLIPS can be converted into a complete and powerful system development tool, on the other most economical and popular computer platform. New models of PCs have amazing processing capabilities and graphic resolutions that cannot be ignored and should be used to the fullest of their resources. CLIPS is a powerful expert system development tool, but it cannot be complete without the support of a graphics package needed to create user interfaces and general purpose graphics, or without enough memory to handle large knowledge bases. Now, a well known limitation on the PC's is the usage of real memory which limits CLIPS to use only 640 Kb of real memory, but now that problem can be solved by developing a version of CLIPS that uses extended memory. The user has access of up to 16 MB of memory on 80286 based computers and, practically, all the available memory (4 GB) on computers that use the 80386 processor. So if we give CLIPS a self-configuring graphics package that will automatically detect the graphics hardware and pointing device present in the computer, and we add the availability of the extended memory that exists in the computer (with no special hardware needed), the user will be able to create more powerful systems at a fraction of the cost and on the most popular, portable, and economic platform available such as the PC platform.

Callegari, Andres C.↗

CMOS imager for pointing and tracking applications

Systems and techniques to realize pointing and tracking applications with CMOS imaging devices. In general, in one implementation, the technique includes: sampling multiple rows and multiple columns of an active pixel sensor array into a memory array (e.g., an on-chip memory array), and reading out the multiple rows and multiple columns sampled in the memory array to provide image data with reduced motion artifact. Various operation modes may be provided, including TDS, CDS, CQS, a tracking mode to read out multiple windows, and/or a mode employing a sample-first-read-later readout scheme. The tracking mode can take advantage of a diagonal switch array. The diagonal switch array, the active pixel sensor array and the memory array can be integrated onto a single imager chip with a controller. This imager device can be part of a larger imaging system for both space-based applications and terrestrial applications.

Pain, Bedabrata↗

Charge Transport Characteristics of Molecular Electronic Junctions Studied by Transition Voltage Spectroscopy

The field of molecular electronics is prompted by tremendous opportunities for using a single-molecule and molecular monolayers as active components in integrated circuits. Until now, a wide range of molecular devices exhibiting characteristic functions, such as diodes, transistors, switches, and memory, have been demonstrated. However, a full understanding of the crucial factors that affect charge transport through molecular electronic junctions should yet be accomplished. Remarkably, recent advances in transition voltage spectroscopy (TVS) elucidate that it can provide key quantities for probing the transport characteristics of the junctions, including, for example, the position of the frontier molecular orbital energy relative to the electrode Fermi level and the strength of the molecule–electrode interactions. These parameters are known to be highly associated with charge transport behaviors in molecular systems and can then be used in the design of molecule-based devices with rationally tuned electronic properties. This article highlights the fundamental principle of TVS and then demonstrates its major applications to study the charge transport properties of molecular electronic junctions.

36 MATERIALS SCIENCE↗

Improvement of Vertical Diode Properties by N-type Plasma Doping for Low-Power Phase Change Non-Volatile Memory (NVM)

Using PH{sub 3} N-type plasma doing (PLAD), the device characteristics of high performance vertical switch diode for 50 nm phase-change NVM have been studied. Compared to the conventional beam line ion implantation, there are improvements of diode breakdown voltage (B.V.) and isolation B.V., respectively 20% and 41% by N-type PLAD doping due to the higher doping level and shallower profile in N+ region. It also shows excellent off-leakage properties less than 10 pA/cell without decreasing the Ion. From the results of this study, N-type PLAD has been demonstrated to be effective for vertical diode electrical properties as well as for high productivity.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Single Event Testing of SDRAM, DDR2 and DDR3 Memories

SEE test results are presented for SDRAM, DDR2, and DDR3. No tested devices exhibited SEL. SBUs were observed, but no MBUs were observed in data words. SEFI data were taken at low and high speed.

Guertin, Steven M.↗

GPU Data Access on Complex Geometries for D3Q19 Lattice Boltzmann Method

GPU performance of the lattice Boltzmann method (LBM) depends heavily on memory access patterns. When LBM is advanced with GPUs on complex computational domains, geometric data is typically accessed indirectly, and lattice data is typically accessed lexicographically in the Structure of Array (SoA) layout. Although there are a variety of existing access patterns beyond the typical choices, no study has yet examined the relative efficacy between them. Here, we compare a suite of memory access schemes via empirical testing and performance modeling. We find strong evidence that semi-direct addressing is the superior addressing scheme for the majority of cases examined: Semi-direct addressing increases computational speed and often reduces memory consumption. For lattice layout, we find that the Collected Structure of Arrays (CSoA) layout outperforms the SoA layout. When compared to state-of-the-art practices, our recommended addressing modifications lead to performance gains between 10-40% across different complex geometries, fluid volume fractions, and resolutions. The modifications also lead to a decrease in memory consumption by as much as 17%. Having discovered these improvements, we examine a highly resolved arterial geometry on a leadership class system. On this system we present the first near-optimal strong results for LBM with arterial geometries run on GPUs. We also demonstrate that the above recommendations remain valid for large scale, many device simulations, which leads to an increased computational speed and average memory usage reductions. To understand these observations, we employ performance modeling which reveals that semi-direct methods outperform indirect methods due to a reduced number of total loads/stores in memory, and that CSoA outperforms SoA and bundling due to improved caching behavior.

Herschlag, Gregory↗

Self‐Strain Suppression of the Metal‐to‐Insulator Transition in Phase‐Change Oxide Devices

Strongly correlated materials exhibiting phase transitions which can be controlled through external stimuli, such as electric fields, are promising for future computing technologies beyond conventional semiconductor transistors. Devices that take advantage of structural phase transitions have inherent built‐in memory, reminiscent of synapses and neurons, and are thus natural candidates for neuromorphic computing. Of particular interest are phase‐change oxides, which allow for control over the metal‐to‐insulator transition. Here, X‐ray nano‐diffraction structural imaging of micro‐devices fabricated with the archetypal phase‐change material vanadium sesquioxide (V 2 O 3 ) is reported. The devices contain a Ga ion‐irradiated region where the metal‐to‐insulator transition critical temperature is lowered, a useful feature for controlling neuron‐like spiking behavior. Results show that strain, induced by crystal lattice mismatch between the pristine and irradiated material, leads to a suppression of the metal‐to‐insulator‐transition. Suppression occurs within the irradiated region or along its edges, depending on the defect‐distribution and the size of the region. The observed self‐straining effect can extend to other phase‐change oxides and dominate as device dimensions are reduced and become too small to dissipate strain within the irradiated region. The findings are important for phase engineering in phase‐change devices and highlight the necessity to study phase transitions at the nanoscale.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Impacts to FeRAM design arising from interfacial dielectric layers and wake up modulation in ferroelectric hafnium zirconium oxide

As ferroelectric hafnium zirconium oxide (HZO) becomes more widely utilized in ferroelectric microelectronics, integration impacts of intentional and non-intentional dielectric interfaces and their effects upon the ferroelectric film wake up and circuit parameters become important to understand. In this work, the effect of the addition of a linear dielectric aluminum oxide, Al 2 O 3 , below a ferroelectric Hf 0.58 Zr 0.42 O 2 film in a capacitor structure for FeRAM applications with NbN electrodes was measured. Depolarization fields resulting from the linear dielectric is observed to induce a reduction of the remanent polarization of the ferroelectric. Addition of the aluminum oxide also impacts the wake up of the HZO with respect to the cycling voltage applied. Intricately linked to the design of a FeRAM 1C/1T cell, the metal-ferroelectric-insulator-metal (MFIM) devices are observed to significantly shift charge related to the read states based on aluminum oxide thickness and wake up cycling voltage. As a result, a 33% reduction in the separation of read states is measured, which complicates how a memory cell is designed and illustrates the importance of clean interfaces in devices.

30 DIRECT ENERGY CONVERSION↗

NVMalloc: Exposing an Aggregate SSD Store as a Memory Partition in Extreme-Scale Machines

DRAM is a precious resource in extreme-scale machines and is increasingly becoming scarce, mainly due to the growing number of cores per node. On future multi-petaflop and exaflop machines, the memory pressure is likely to be so severe that we need to rethink our memory usage models. Fortunately, the advent of non-volatile memory (NVM) offers a unique opportunity in this space. Current NVM offerings possess several desirable properties, such as low cost and power efficiency, but suffer from high latency and lifetime issues. We need rich techniques to be able to use them alongside DRAM. In this paper, we propose a novel approach for exploiting NVM as a secondary memory partition so that applications can explicitly allocate and manipulate memory regions therein. More specifically, we propose an NVMalloc library with a suite of services that enables applications to access a distributed NVM storage system. We have devised ways within NVMalloc so that the storage system, built from compute node-local NVM devices, can be accessed in a byte-addressable fashion using the memory mapped I/O interface. Our approach has the potential to re-energize out-of-core computations on large-scale machines by having applications allocate certain variables through NVMalloc, thereby increasing the overall memory capacity available. Our evaluation on a 128-core cluster shows that NVMalloc enables applications to compute problem sizes larger than the physical memory in a cost-effective manner. It can bring more performance/efficiency gain with increased computation time between NVM memory accesses or increased data access locality. In addition, our results suggest that while NVMalloc enables transparent access to NVM-resident variables, the explicit control it provides is crucial to optimize application performance.

Computer Science↗

NVMalloc: Exposing an Aggregate SSD Store as a Memory Partition in Extreme-Scale Machines

DRAM is a precious resource in extreme-scale machines and is increasingly becoming scarce, mainly due to the growing number of cores per node. On future multi-petaflop and exaflop machines, the memory pressure is likely to be so severe that we need to rethink our memory usage models. Fortunately, the advent of non-volatile memory (NVM) offers a unique opportunity in this space. Current NVM offerings possess several desirable properties, such as low cost and power efficiency, but suffer from high latency and lifetime issues. We need rich techniques to be able to use them alongside DRAM. In this talk, we present a novel approach for exploiting NVM as a secondary memory partition so that applications can explicitly allocate and manipulate memory regions therein. More specifically, we propose an NVMalloc library with a suite of services that enables applications to access a distributed NVM storage system. We have devised ways within NVMalloc so that the storage system, built from compute node-local NVM devices, can be accessed in a byte-addressable fashion using the memory mapped I/O interface. Our approach has the potential to re-energize out-of-core computations on largescale machines by having applications allocate certain variables through NVMalloc, thereby increasing the overall memory capacity available. Our evaluation on a 128-core cluster shows that NVMalloc enables applications to compute problem sizes larger than the physical memory in a cost-effective manner. It can bring more performance/efficiency gain with increased computation time between NVM memory accesses or increased data access locality. In addition, our results suggest that while NVMalloc enables transparent access to NVM-resident variables, the explicit control it provides is crucial to optimize application performance.

99 GENERAL AND MISCELLANEOUS↗

The effect of a Ta oxygen scavenger layer on HfO 2 -based resistive switching behavior: Thermodynamic stability, electronic structure, and low-bias transport

Reversible resistive switching between high-resistance and low-resistance states in metal-oxide-metal heterostructures makes them very interesting for applications in random access memories. While recent experimental work has shown that inserting a metallic "oxygen scavenger layer'' between the positive electrode and oxide improves device performance, the fundamental understanding of how the scavenger layer modifies the heterostructure properties is lacking. We use density functional theory to calculate thermodynamic properties and conductance of TiN/HfO 2 /TiN heterostructures with and without a Ta scavenger layer. First, we show that Ta insertion lowers the formation energy of low-resistance states. Second, while the Ta scavenger layer reduces the Schottky barrier height in the high-resistance state by modifying the interface charge at the oxide-electrode interface, the heterostructure maintains a high resistance ratio between high-and low-resistance states. Lastly, we show that the low-bias conductance of device on-states becomes much less sensitive to the spatial distribution of oxygen removed from the HfO 2 in the presence of the Ta layer. By providing a fundamental understanding of the observed improvements with scavenger layers, we open a path to engineer interfaces with oxygen scavenger layers to control and enhance device performance. In turn, this may enable the realization of a non-volatile low-power memory technology with concomitant reduction in energy consumption by consumer electronics and offering significant benefits to society.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Simulation program of nonlinearities applied to telecommunication systems

In any satellite communication system, the problems of distorsion created by nonlinear devices or systems must be considered. The subject of this paper is the use of the Fast Fourier Transform (F.F.T.) in the prediction of the intermodulation performance of amplifiers, mixers, filters. A nonlinear memory-less model is chosen to simulate amplitude and phase nonlinearities of the device in the simulation program written in FORTRAN 4. The experimentally observed nonlinearity parameters of a low noise 3.7-4.2 GHz amplifier are related to the gain and phase coefficients of Fourier Service Series. The measured results are compared with those calculated from the simulation in the cases where the input signal is composed of two, three carriers and noise power density.

Thomas, C.↗