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At least 1,261 records · Page 70

Dual Input AND Gate Fabricated From a Single Channel Poly (3-Hexylthiophene) Thin Film Field Effect Transistor

A regio-regular poly (3-hexylthiophene) (RRP3HT) thin film transistor having a split-gate architecture has been fabricated on a doped silicon/silicon nitride substrate and characterized. This device demonstrates AND logic functionality. The device functionality was controlled by applying either 0 or -10 V to each of the gate electrodes. When -10 V was simultaneously applied to both gates, the device was conductive (ON), while any other combination of gate voltages rendered the device resistive (OFF). The p-type carrier charge mobility was about 5x10(exp -4) per square centimeter per V-sec. The low mobility is attributed to the sharp contours of the RRP3HT film due to substrate non-planarity. A significant advantage of this architecture is that AND logic devices with multiple inputs can be fabricated using a single RRP3HT channel with multiple gates.

Pinto, N. J.↗

Removal and Replacement of Primary Metal in Ferroan Lodranite MAC 88177

Collectively, acapulcoites and lodranites form a clan of primitive achondrites generally thought to have originated from the same parent body on the basis of similarities in petrology, mineral compositions, bulk compositions, cosmic ray exposure ages and oxygen isotope compositions, although considerable variation in some of these parameters has shown that the parent body was not entirely uniform. The presence of relict chondrules in several acapulcoites indicates that all were likely derived from chondrite-like precursor materials. The transition from acapulcoite to lodranite is gradual and corresponds to increasing metamorphic grade. Lodranites are generally coarser grained, but petrographic distinction between the two groups can also be made by modal abundances of troilite and plagioclase. Depletion of both these phases and incompatible lithophile trace elements in lodranites is consistent with their restitic origin formed by greater than 10% extraction of basaltic melt. Magnesian lodranites (e.g. Gibson, GRA 95209, Y-75274, Y-8002), some of which might also be considered transitional acapulcoites, have mineral and chemical compositions consistent with derivation by thermal metamorphism and partial melt extraction from acapulcoites, as would seem logical if samples represented different grades of metamorphism along a linear evolution trend. Ferromagnesian silicates in these lodranites tend to be displaced toward lower fe# (opx fe# 4-6) than the distribution observed in acapulcoites (opx fe# 6-11). A subset of lodranites, termed ferroan lodranites (e.g. FRO 90011, LEW 88280, Lodran, MAC 88177, Y-74357, Y- 791491/Y-791493), have ferromagnesian silicate minerals that are too Fe-rich (fe#>10) to have formed as simple restites from any known acapulcoite. Like silicates, metal-sulfide systematics of the ferroan lodranites are also inconsistent with a simple restitic origin. Logically, restitic lodranites should have been depleted in FeS during extraction of partial melts, since melting of the metal-sulfide system initiates at lower temperatures than melting of silicates. Yet, puzzingly, ferroan lodranites contain significant quantities (1.9-5.3 modal%) of troilite, indicating either (1) metal sulfide partial melts were retained during basaltic melt extraction or (2) later infusion of metal sulfide melts has occurred. In this study, we use trace siderophile elements in metals to assess the relative importance of each in creating the observed troilite enrichment.

Herrin, J. S.↗

The Effectiveness of TAG or Guard-Gates in SET Suppression Using Delay and Dual-Rail Configurations at 0.35 microns

Design options for decreasing the susceptibility of integrated circuits to Single Event Upset (SEU) fall into two categories: (1) increasing the critical charge to cause an upset at a particular node, and (2) employing redundancy to mask or correct errors. With decreasing device sizes on an Integrated Circuit (IC), the amount of charge required to represent a logic state has steadily reduced. Critical charge methods such as increasing drive strength or increasing the time required to change state as in capacitive or resistive hardening or delay based approaches extract a steadily increasing penalty as a percentage of device resources and performance. Dual redundancy is commonly assumed only to provide error detection with Triple Modular Redundancy (TMR) required for correction, but less well known methods employ dual redundancy to achieve full error correction by voting two inputs with a prior state to resolve ambiguity. This requires special circuits such as the Whitaker latch [1], or the guard-gate [2] which some of us have called a Transition AND Gate (TAG) [3]. A 2-input guard gate is shown in Figure 1. It is similar to a Muller Completion Element [4] and relies on capacitance at node "out" to retain the prior state when inputs disagree, while eliminating any output buffer which would be susceptible to radiation strikes. This paper experimentally compares delay based and dual rail flip-flop designs wherein both types of circuits employ guard-gates to optimize layout and performance, and draws conclusions about design criteria and suitability of each option. In both cases a design goal is protection against Single Event Transients (SET) in combinational logic as well as SEU in the storage elements. For the delay based design, it is also a goal to allow asynchronous clear or preset inputs on the storage elements, which are often not available in radiation tolerant designs.

Shuler, Robert L.↗

A Taxonomy of Fallacies in System Safety Arguments

Safety cases are gaining acceptance as assurance vehicles for safety-related systems. A safety case documents the evidence and argument that a system is safe to operate; however, logical fallacies in the underlying argument may undermine a system s safety claims. Removing these fallacies is essential to reduce the risk of safety-related system failure. We present a taxonomy of common fallacies in safety arguments that is intended to assist safety professionals in avoiding and detecting fallacious reasoning in the arguments they develop and review. The taxonomy derives from a survey of general argument fallacies and a separate survey of fallacies in real-world safety arguments. Our taxonomy is specific to safety argumentation, and it is targeted at professionals who work with safety arguments but may lack formal training in logic or argumentation. We discuss the rationale for the selection and categorization of fallacies in the taxonomy. In addition to its applications to the development and review of safety cases, our taxonomy could also support the analysis of system failures and promote the development of more robust safety case patterns.

Greenwell, William S.↗

An introduction to the Gilgamesh PIM architecture

The focus of the work conducted is on a class of structures made possible by the merger of logic and memory. Processing In Memory (PIM) extends the design space much farther by closely associating the logic with the memory interface to realize innovative structures never previously possible and thus exposing entirely new opportunities for computer architecture.

Gilgamesh PIM CMOS↗

Three-Dimensional Deformable Grid Electromagnetic Particle-in-cell for Parallel Computers

We describe a new parallel, non-orthogonal grid, three-dimensional electromagnetic particle-in-cell (EMPIC) code based on a finite-volume formulation. This code uses a logically Cartesian grid of deformable hexahedral cells, a discrete surface integral (DSI) algorithm to calculate the electromagnetic field, and a hybrid logical-physical space algorithm to push particles.

Cartesian grid Grid Electromagnetic electromagneti↗

Taking evolutionary circuit design from experimentation to implementation: some useful techniques and a silicon demonstration

Current techniques in evolutionary synthesis of analogue and digital circuits designed at transistor level have focused on achieving the desired functional response, without paying sufficient attention to issues needed for a practical implementation of the resulting solution. No silicon fabrication of circuits with topologies designed by evolution has been done before, leaving open questions on the feasibility of the evolutionary circuit design approach, as well as on how high-performance, robust, or portable such designs could be when implemented in hardware. It is argued that moving from evolutionary 'design-for experimentation' to 'design-for-implementation' requires, beyond inclusion in the fitness function of measures indicative of circuit evaluation factors such as power consumption and robustness to temperature variations, the addition of certain evaluation techniques that are not common in conventional design. Several such techniques that were found to be useful in evolving designs for implementation are presented; some are general, and some are particular to the problem domain of transistor-level logic design, used here as a target application. The example used here is a multifunction NAND/NOR logic gate circuit, for which evolution obtained a creative circuit topology more compact than what has been achieved by multiplexing a NAND and a NOR gate. The circuit was fabricated in a 0.5 mum CMOS technology and silicon tests showed good correspondence with the simulations.

digital circuits designs↗

Test Capability Enhancements to the NASA Langley 8-Foot High Temperature Tunnel

The NASA Langley 8-Foot High Temperature Tunnel produces true enthalpy environments simulating flight from Mach 4 to Mach 7, primarily for airbreathing propulsion and aerothermal/thermo-structural testing. Flow conditions are achieved through a methane-air heater and nozzles producing aerodynamic Mach numbers of 4, 5 or 7 and have exit diameters of 8 feet or 4.5 feet. The 12-ft long free-jet test section, housed inside a 26-ft vacuum sphere, accommodates large test articles. Recently, the facility underwent significant upgrades to support hydrocarbon fueled scramjet engine testing and to expand flight simulation capability. The upgrades were required to meet engine system development and flight clearance verification requirements originally defined by the joint NASA-Air Force X-43C Hypersonic Flight Demonstrator Project and now the Air Force X-51A Program. Enhancements to the 8-Ft. HTT were made in four areas: 1) hydrocarbon fuel delivery; 2) flight simulation capability; 3) controls and communication; and 4) data acquisition/processing. The upgrades include the addition of systems to supply ethylene and liquid JP-7 to test articles; a Mach 5 nozzle with dynamic pressure simulation capability up to 3200 psf, the addition of a real-time model angle-of-attack system; a new programmable logic controller sub-system to improve process controls and communication with model controls; the addition of MIL-STD-1553B and high speed data acquisition systems and a classified data processing environment. These additions represent a significant increase to the already unique test capability and flexibility of the facility, and complement the existing array of test support hardware such as a model injection system, radiant heaters, six-component force measurement system, and optical flow field visualization hardware. The new systems support complex test programs that require sophisticated test sequences and precise management of process fluids. Furthermore, the new systems, such as the real-time angle of attack system and the new programmable logic controller enhance the test efficiency of the facility. The motivation for the upgrades and the expanded capabilities is described here.

Harvin, S. F.↗

Micro-Inspector Avionics Module (MAM): A Self-Contained Low Power, Reconfigurable Avionics Platform for Small Spacecrafts and Instruments

This paper describes development of a radiation tolerant, low power, reconfigurable avionics module aimed at meeting the avionics needs of the JPL Micro-Inspector spacecraft. This module represents a complete avionics system, consisting of two PowerPC 405 CPUs embedded within a reconfigurable FPGA fabric of over 8 Million logic gates, 64MB of EDAC protected Flash storage and 128MB of EDAC protected DDR SDRAM or SDRAM memories, along with FPGA SEU mitigation logic, and all necessary power conversion. Processor SEU mitigation is achieved by running the two processors in a lock-step and compare configuration. All of these building blocks are integrated into a double sided circuit board that takes as little as 6 square inches of board space. This module can be embedded into a user system as part of a bigger circuit assembly or as a self contained module. This module is being developed as part of a JPL led Micro-Inspector Program, funded by NASA ESMD aimed at producing a 10Kg micro spacecraft.

configurable↗

Robust Fuzzy Controllers Using FPGAs

Electro-mechanical device controllers typically come in one of three forms, proportional (P), Proportional Derivative (PD), and Proportional Integral Derivative (PID). Two methods of control are discussed in this paper; they are (1) the classical technique that requires an in-depth mathematical use of poles and zeros, and (2) the fuzzy logic (FL) technique that is similar to the way humans think and make decisions. FL controllers are used in multiple industries; examples include control engineering, computer vision, pattern recognition, statistics, and data analysis. Presented is a study on the development of a PD motor controller written in very high speed hardware description language (VHDL), and implemented in FL. Four distinct abstractions compose the FL controller, they are the fuzzifier, the rule-base, the fuzzy inference system (FIS), and the defuzzifier. FL is similar to, but different from, Boolean logic; where the output value may be equal to 0 or 1, but it could also be equal to any decimal value between them. This controller is unique because of its VHDL implementation, which uses integer mathematics. To compensate for VHDL's inability to synthesis floating point numbers, a scale factor equal to 10(sup (N/4) is utilized; where N is equal to data word size. The scaling factor shifts the decimal digits to the left of the decimal point for increased precision. PD controllers are ideal for use with servo motors, where position control is effective. This paper discusses control methods for motion-base platforms where a constant velocity equivalent to a spectral resolution of 0.25 cm(exp -1) is required; however, the control capability of this controller extends to various other platforms.

Monroe, Author Gene S., Jr.↗

Propulsion Health Management System Development for Affordable and Reliable Operation of Space Exploration Systems

The constraints of future Exploration Missions will require unique integrated system health management capabilities throughout the mission. An ambitious launch schedule, human-rating requirements, long quiescent periods, limited human access for repair or replacement, and long communication delays, all require an integrated approach to health management that can span distinct, yet interdependent vehicle subsystems, anticipate failure states, provide autonomous remediation and support the Exploration Mission from beginning to end. Propulsion is a critical part of any space exploration mission, and monitoring the health of the propulsion system is an integral part of assuring mission safety and success. Health management is a somewhat ubiquitous technology that encompasses a large spectrum of physical components and logical processes. For this reason, it is essential to develop a systematic plan for propulsion health management system development. This paper provides a high-level perspective of propulsion health management systems, and describes a logical approach for the future planning and early development that are crucial to planned space exploration programs. It also presents an overall approach, or roadmap, for propulsion health management system development and a discussion of the associated roadblocks and challenges.

Melcher, Kevin J.↗

NIRSS Upgrades: Final Report

This year we were able to further the NIRSS program by re-writing the data ingest and display code from LabVIEW to C++ and Java. This was leveraged by a University of Colorado Computer Science Department Senior Project. The upgrade made the display more portable and upgradeable. Comparisons with research aircraft flights conducted during AIRS-2 were also done and demonstrate reasonable skill in determining cloud altitudes and liquid water distribution. Improvements can still be made to the cloud and liquid logic. The icing hazard index was not evaluated here since that represents work in progress and needs to be made compatible with the new CIP-Severity algorithm. CIP is the Current Icing Potential product that uses a combination decision tree/fuzzy logic algorithm to combine numerical weather model output with operational sensor data (NEXRAD, GOES, METARs and voice pilot reports) to produce an hourly icing diagnosis across the CONUS. The new severity algorithm seeks to diagnose liquid water production through rising, cooling air, and depletion by ice processes. The information used by CIP is very different from that ingested by NIRSS but some common ground does exist. Additionally, the role of NIRSS and the information it both needs and provides needs to be determined in context of the Next Generation Air Traffic System (NGATS). The Weather Integrated Products Team has a plan for an Initial Operating Capability (IOC) to take place in 2012. NIRSS is not explicitly a part of that IOC but should be considered as a follow-on as part of the development path to a 2025 full capability.

Politovich, Marcia K.↗

Starter circuit for an ion engine

A starter circuit particularly suitable for a plasma of an ion engine for a spacecraft includes a power supply having an output inductor with a tap. A switch is coupled to the tap. The switch has a control input. A pulse control logic circuit is coupled to said control input, said pulse control logic circuit controlling said switch to an off state to generate a high voltage discharge.

Cardwell, Jr., Gilbert I.↗

Video event trigger and tracking system using fuzzy comparators

A video observation method and apparatus, the apparatus having a frame storage mechanism, a dividing mechanism, a plurality of fuzzy comparators and a trigger signal mechanism. The frame storage mechanism stores at least one non-current video frame of a viewing field. The dividing mechanism divides a current video frame of the viewing field and the at least one non-current video frame into a plurality of corresponding trigger sections. The plurality of fuzzy comparators each compare and detect a fuzzy logic difference between one trigger section of the current video frame and the corresponding trigger sections of the at least one non-current video frame, the number of fuzzy comparators being selected so that every trigger section of the current video frame is compared. The trigger signal mechanism provides a trigger signal when a fuzzy logic difference is detected between any of the corresponding current and non-current trigger sections. A video observation mechanism and data reducing mechanism may be included with the above apparatus or alone with only a frame storage mechanism, a single generic comparator and a trigger signal mechanism. The video observation mechanism provides a video data stream, wherein each pixel of each frame of a viewing field is provided as multiple bits of data. The data reducing mechanism reduces each set of multiple bits of data which correspond to each pixel to one bit of binary data based on whether the pixel has a level of grey which is above or below a threshold level of grey.

Williams, Glenn L.↗

Starter circuit for an ion engine

A starter circuit particularly suitable for a plasma of an ion engine for a spacecraft includes a power supply having an output inductor with a tap. A switch is coupled to the tap. The switch has a control input. A pulse control logic circuit is coupled to said control input, said pulse control logic circuit controlling said switch to an off state to generate a high voltage discharge.

Cardwell, Jr., Gilbert I.↗

Reconfigurable data path processor

A reconfigurable data path processor comprises a plurality of independent processing elements. Each of the processing elements advantageously comprising an identical architecture. Each processing element comprises a plurality of data processing means for generating a potential output. Each processor is also capable of through-putting an input as a potential output with little or no processing. Each processing element comprises a conditional multiplexer having a first conditional multiplexer input, a second conditional multiplexer input and a conditional multiplexer output. A first potential output value is transmitted to the first conditional multiplexer input, and a second potential output value is transmitted to the second conditional multiplexer output. The conditional multiplexer couples either the first conditional multiplexer input or the second conditional multiplexer input to the conditional multiplexer output, according to an output control command. The output control command is generated by processing a set of arithmetic status-bits through a logical mask. The conditional multiplexer output is coupled to a first processing element output. A first set of arithmetic bits are generated according to the processing of the first processable value. A second set of arithmetic bits may be generated from a second processing operation. The selection of the arithmetic status-bits is performed by an arithmetic-status bit multiplexer selects the desired set of arithmetic status bits from among the first and second set of arithmetic status bits. The conditional multiplexer evaluates the select arithmetic status bits according to logical mask defining an algorithm for evaluating the arithmetic status bits.

Donohoe, Gregory↗

Active damping of spacecraft structural appendage vibrations

An active vibration damper system, for bending in two orthogonal directions and torsion, in each of three mutually perpendicular axes is located at the extremities of the flexible appendages of a space platform. The system components for each axis includes: an accelerometer, filtering and signal processing apparatus, and a DC motor-inertia wheel torquer. The motor torquer, when driven by a voltage proportional to the relative vibration tip velocity, produces a reaction torque for opposing and therefore damping a specific modal velocity of vibration. The relative tip velocity is obtained by integrating the difference between the signal output from the accelerometer located at the end of the appendage with the output of a usually carried accelerometer located on a relatively rigid body portion of the space platform. A selector switch, with sequential stepping logic or highest modal vibration energy logic, steps to another modal tip velocity channel and receives a signal voltage to damp another vibration mode. In this manner, several vibration modes can be damped with a single sensor/actuator pair. When a three axis damper is located on each of the major appendages of the platform, then all of the system vibration modes can be effectively damped.

Fedor, Joseph V.↗

EKG and ultrasonoscope display

A system is disclosed which permits simultaneous display of an EKG waveform in real time in conjunction with a two-dimensional cross-sectional image of the heart, so that the EKG waveform can be directly compared with dimensional changes in the heart. The apparatus of the invention includes an ultrasonoscope for producing a C-scan cross-sectional image of the heart. An EKG monitor circuit along with EKG logic circuitry is combined with the ultrasonoscope circuitry to produce on the same oscilloscope screen a continuous vertical trace showing the EKG waveform simultaneously with the heart image. The logic circuitry controls the oscilloscope display such that the display of both heart and EKG waveforms occurs on a real time basis.

Lee, Robert D.↗