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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7

All sources NASA NTRS DOE OSTI

NASA NTRS1981

CMOS RAM cosmic-ray-induced-error-rate analysis

A significant number of spacecraft operational anomalies are believed to be associated with cosmic-ray-induced soft errors in the LSI memories. Test programs using a cyclotron to simulate cosmic rays have established conclusively that many common commercial memory types are vulnerable to heavy-ion upset. A description is given of the methodology and the results of a detailed analysis for predicting the bit-error rate in an assumed space environment for CMOS memory devices. Results are presented for three types of commercially available CMOS 1,024-bit RAMs. It was found that the HM6508 is susceptible to single-ion induced latchup from argon and krypton ions. The HS6508 and HS6508RH and the CDP1821 apparently are not susceptible to single-ion induced latchup.

Pickel, J. C.↗

NASA NTRS1997

Memory Golf Clubs

Memory Corporation's investigation of shape memory effect, stemming from Marshall Space Flight Center contracts to study materials for the space station, has aided in the development of Zeemet, a proprietary, high-damping shape memory alloy for the golf industry. The Nicklaus Golf Company has created a new line of golf clubs using Zeemet inserts. Its superelastic and high damping attributes translate into more spin on the ball, greater control, and a solid feel.

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NASA NTRS1975

Main memory unit

The development of a main memory unit (MMU) for the space ultrareliable module computer (SUMC) model HTC is discussed. The design, fabrication, and test of basic memory modules (BMM) which were to be used in the design and construction of the MMU are described. The BMM was designed from state-of-the-art technologies which included large scale integration devices mounted and interconnected on a substrate to form a functional module to be utilized in the MMU development. A SUMC memory system design study is discussed which addressed itself to the BMM design and analysis to be conducted to determine the most efficient organization of the BMM in order to establish such modularity features as: word length expandability without redesign, high reliability, and fault tolerance. One MMU was designed, fabricated, tested, and delivered which will be electrical and mechanically compatible with the hybrid technology computer (HTC) model of the SUMC family of computers. The MMU will contain a storage capacity of 8196 36 bit words which includes a parity bit for each 8 bit byte of data.

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NASA NTRS2009

Ultra-Lightweight Self-Deployable Nanocomposite Structure for Habitat Applications

A document discusses self-deployable, rigidized structures that are ultra-lightweight and have gas barrier properties, space durability, and high impact resistance. Developed here are microcellular-foamed sandwich structures made from nanocomposite shape memory polymers (SMPs) with Cold-Hibernated Elastic Memory (CHEM) deployed technique for space structural components including space habitats. This type of foam sandwich also does not suffer from the toxicity problems of conventional foams, and has higher mechanical properties than those processed with conventional techniques. This design can be compacted into a very small volume for launch. Once deployed, the microcellular structure can use the heat from the Sun to recover 98 to 100 percent of its shape.

Tan, Seng C.↗

NASA NTRS2003

In-Flight Observations of Long-Term Single Event Effect(SEE)Performance on Orbview-2 and Xray Timing Explorer(XTE)Solid State Recorders (SSR)

This paper presents Single Event Effect (SEE) in-flight data on Solid State Recorders (SSR) that have been collected over a long period of time for two NASA spacecraft: Orbview-2 and XTE. SEE flight data on solid-state memories give an opportunity to study the behavior in space of SEE sensitive commercial devices. The actual Single Event Upset (SEU) rates can be compared with the calculated rates based on environment models and ground test data. The SEE mitigation schemes can also be evaluated in actual implementation. A significant amount of data has already been published concerning observed SEE effects on memories in space. However, most of the data presented cover either a short period of time or a small number of devices. The data presented here has been collected on a large number of devices during several years. This allows statistically significant information about the effect of space weather fluctuations on SEU rates, and the effectiveness of SEE countermeasures used to be analyzed. Only Orbview-2 data is presented in this summary. XTE data will be included in the final paper.

Poivey, Christian↗

NASA NTRS1991

Prediction of error rates in dose-imprinted memories on board CRRES by two different methods

An analysis of the expected space radiation effects on the single event upset (SEU) properties of CMOS/bulk memories onboard the Combined Release and Radiation Effects Satellite (CRRES) is presented. Dose-imprint data from ground test irradiations of identical devices are applied to the predictions of cosmic-ray-induced space upset rates in the memories onboard the spacecraft. The calculations take into account the effect of total dose on the SEU sensitivity of the devices as the dose accumulates in orbit. Estimates of error rates, which involved an arbitrary selection of a single pair of threshold linear energy transfer (LET) and asymptotic cross-section values, were compared to the results of an integration over the cross-section curves versus LET. The integration gave lower upset rates than the use of the selected values of the SEU parameters. Since the integration approach is more accurate and eliminates the need for an arbitrary definition of threshold LET and asymptotic cross section, it is recommended for all error rate predictions where experimental sigma-versus-LET curves are available.

Brucker, G. J.↗

NASA NTRS1986

Run-time implementation issues for real-time embedded Ada

A motivating factor in the development of Ada as the department of defense standard language was the high cost of embedded system software development. It was with embedded system requirements in mind that many of the features of the language were incorporated. Yet it is the designers of embedded systems that seem to comprise the majority of the Ada community dissatisfied with the language. There are a variety of reasons for this dissatisfaction, but many seem to be related in some way to the Ada run-time support system. Some of the areas in which the inconsistencies were found to have the greatest impact on performance from the standpoint of real-time systems are presented. In particular, a large part of the duties of the tasking supervisor are subject to the design decisions of the implementer. These include scheduling, rendezvous, delay processing, and task activation and termination. Some of the more general issues presented include time and space efficiencies, generic expansions, memory management, pragmas, and tracing features. As validated compilers become available for bare computer targets, it is important for a designer to be aware that, at least for many real-time issues, all validated Ada compilers are not created equal.

Maule, Ruth A.↗

NASA NTRS2001

The Efficiency of Various Computers and Optimizations in Performing Finite Element Computations

With the advent of computers with many processors, it becomes unclear how to best exploit this advantage. For example, matrices can be inverted by applying several processors to each vector operation, or one processor can be applied to each matrix. The former approach has diminishing returns beyond a handful of processors, but how many processors depends on the computer architecture. Applying one processor to each matrix is feasible with enough ram memory and scratch disk space, but the speed at which this is done is found to vary by a factor of three depending on how it is done. The cost of the computer must also be taken into account. A computer with many processors and fast interprocessor communication is much more expensive than the same computer and processors with slow interprocessor communication. Consequently, for problems that require several matrices to be inverted, the best speed per dollar for computers is found to be several small workstations that are networked together, such as in a Beowulf cluster. Since these machines typically have two processors per node, each matrix is most efficiently inverted with no more than two processors assigned to it.

Marcus, Martin H.↗

NASA NTRS2005

Parallel Rendering of Large Time-Varying Volume Data

Interactive visualization of large time-varying 3D volume datasets has been and still is a great challenge to the modem computational world. It stretches the limits of the memory capacity, the disk space, the network bandwidth and the CPU speed of a conventional computer. In this SURF project, we propose to develop a parallel volume rendering program on SGI's Prism, a cluster computer equipped with state-of-the-art graphic hardware. The proposed program combines both parallel computing and hardware rendering in order to achieve an interactive rendering rate. We use 3D texture mapping and a hardware shader to implement 3D volume rendering on each workstation. We use SGI's VisServer to enable remote rendering using Prism's graphic hardware. And last, we will integrate this new program with ParVox, a parallel distributed visualization system developed at JPL. At the end of the project, we Will demonstrate remote interactive visualization using this new hardware volume renderer on JPL's Prism System using a time-varying dataset from selected JPL applications.

Garbutt, Alexander E.↗

NASA NTRS1998

64Mb COTS DRAMs: A Variety of SEE Responses

Advanced commercial DRAMs are particularly attractive to designers for space applications needing large memory arrays due to resulting savings in mass, volume, and power.

(MCMs)↗

NASA NTRS2010

Memories and NASA Spacecraft: A Description of Memories, Radiation Failure Modes, and System Design Considerations

As NASA has evolved it's usage of spaceflight computing, memory applications have followed as well. In this slide presentation, the history of NASA's memories from magnetic core and tape recorders to current semiconductor approaches is discussed. There is a brief description of current functional memory usage in NASA space systems followed by a description of potential radiation-induced failure modes along with considerations for reliable system design.

LaBel, Kenneth A.↗

NASA NTRS2010

Memory Overview - Technologies and Needs

As NASA has evolved it's usage of spaceflight computing, memory applications have followed as well. In this talk, we will discuss the history of NASA's memories from magnetic core and tape recorders to current semiconductor approaches. We will briefly describe current functional memory usage in NASA space systems followed by a description of potential radiation-induced failure modes along with considerations for reliable system design.

LaBel, Kenneth A.↗

NASA NTRS2011

Sptrace

Sptrace is a general-purpose space utilization tracing system that is conceptually similar to the commercial Purify product used to detect leaks and other memory usage errors. It is designed to monitor space utilization in any sort of heap, i.e., a region of data storage on some device (nominally memory; possibly shared and possibly persistent) with a flat address space. This software can trace usage of shared and/or non-volatile storage in addition to private RAM (random access memory). Sptrace is implemented as a set of C function calls that are invoked from within the software that is being examined. The function calls fall into two broad classes: (1) functions that are embedded within the heap management software [e.g., JPL's SDR (Simple Data Recorder) and PSM (Personal Space Management) systems] to enable heap usage analysis by populating a virtual time-sequenced log of usage activity, and (2) reporting functions that are embedded within the application program whose behavior is suspect. For ease of use, these functions may be wrapped privately inside public functions offered by the heap management software. Sptrace can be used for VxWorks or RTEMS realtime systems as easily as for Linux or OS/X systems.

Burleigh, Scott C.↗

NASA NTRS2000

Ultra-High Density Holographic Memory Module with Solid-State Architecture

NASA's terrestrial. space, and deep-space missions require technology that allows storing. retrieving, and processing a large volume of information. Holographic memory offers high-density data storage with parallel access and high throughput. Several methods exist for data multiplexing based on the fundamental principles of volume hologram selectivity. We recently demonstrated that a spatial (amplitude-phase) encoding of the reference wave (SERW) looks promising as a way to increase the storage density. The SERW hologram offers a method other than traditional methods of selectivity, such as spatial de-correlation between recorded and reconstruction fields, In this report we present the experimental results of the SERW-hologram memory module with solid-state architecture, which is of particular interest for space operations.

Markov, Vladimir B.↗

NASA NTRS2001

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

Bell, L. D.↗

NASA NTRS2001

A radiation - tolerant, low - power non - volatile memory based on silicon nanocrystal quantum dots.

Green, M. L.↗

NASA NTRS2001

A Parallel Cartesian Approach for External Aerodynamics of Vehicles with Complex Geometry

This workshop paper presents the current status in the development of a new approach for the solution of the Euler equations on Cartesian meshes with embedded boundaries in three dimensions on distributed and shared memory architectures. The approach uses adaptively refined Cartesian hexahedra to fill the computational domain. Where these cells intersect the geometry, they are cut by the boundary into arbitrarily shaped polyhedra which receive special treatment by the solver. The presentation documents a newly developed multilevel upwind solver based on a flexible domain-decomposition strategy. One novel aspect of the work is its use of space-filling curves (SFC) for memory efficient on-the-fly parallelization, dynamic re-partitioning and automatic coarse mesh generation. Within each subdomain the approach employs a variety reordering techniques so that relevant data are on the same page in memory permitting high-performance on cache-based processors. Details of the on-the-fly SFC based partitioning are presented as are construction rules for the automatic coarse mesh generation. After describing the approach, the paper uses model problems and 3- D configurations to both verify and validate the solver. The model problems demonstrate that second-order accuracy is maintained despite the presence of the irregular cut-cells in the mesh. In addition, it examines both parallel efficiency and convergence behavior. These investigations demonstrate a parallel speed-up in excess of 28 on 32 processors of an SGI Origin 2000 system and confirm that mesh partitioning has no effect on convergence behavior.

Aftosmis, M. J.↗

NASA NTRS2017

Options for Radiation Tolerant High-Performance Memory

Memory technologies were reviewed for radiation effects performance in order to determine the most cost-efficient target for a possible memory investment targeted at creating a memory component of general applicability for space use. TID and SEL trends that had indicated improvement in intrinsic performance based on scaling cannot be trusted. SEE hardening of memory arrays is prohibitive in terms of cell-level power and area requirements. Radiation-hardened cells and custom controllers are recommended for future memory developments.

Some, Raphael↗