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At least 127 records · Page 7

Ultra-high Bandwidth, Ultra-high Dynamic Range X-Ray Shock Characterization via Photonic Integrated Circuit

Nuclear weapon component assessment tests at the Z Machine rely on accurate X-ray yield measurements for model validation, design and analysis of component survivability, and source optimization. Yield measurement devices currently used do not provide the requisite certainty to enable accurate and efficient data analysis of test results, which leads to an increase in Z-shots required for evaluation, longer device development times, and higher operation costs. Additionally, current X-ray flux detectors lack high temporal resolution at the tails. Similarly, shock measurement techniques used for component assessment often lack the ability to spatially resolve wave behavior thereby limiting the ability to measure shock propagation dynamics needed to design the next generation of ND components. Here we present the development of a photonic micro-calorimeter and shock sensor consisting of meter-long waveguide spirals that are optomechanically coupled to X-ray absorbing layers to characterize yield and shock propagation at nanosecond timescales.

42 ENGINEERING↗

AI-Powered Knowledge Graphs for Neuromorphic and Energy-Efficient Computing

The surge in scientific literature obscures breakthroughs and hinders the discovery of new research paths. We propose an artificial intelligence (AI) powered framework using large language models (LLMs) and knowledge graphs (KGs) to automate parts of scientific discovery, focusing on energy-efficient AI circuits. Our hybrid approach combines LLMs, structured data, and ontology-based reasoning to construct a comprehensive knowledge graph that integrates insights across computational neuroscience, spiking neuron models, learning rules, architectural motifs, and neuromorphic device technologies. This multi-domain representation enables the generation of hypotheses that connect biological function with implementable, energy-efficient hardware architectures. Using KG embeddings and graph neural networks, the framework generates hypotheses for novel circuits, validates them through optimization on exascale HPC systems, and with tools like SuperNeuro and Fugu, the most promising designs will be prototyped in hardware. This open-source system aims to accelerate discoveries and bridging neuroscience with hardware innovation, drive collaboration, and unlock new opportunities in low-power AI computing.

Gautam, Ashish [ORNL]↗

A Reconfigurable Neural Network ASIC for Detector Front-End Data Compression at the HL-LHC

Despite advances in the programmable logic capabilities of modern trigger systems, a significant bottleneck remains in the amount of data to be transported from the detector to off-detector logic where trigger decisions are made. We demonstrate that a neural network (NN) autoencoder model can be implemented in a radiation-tolerant application-specific integrated circuit (ASIC) to perform lossy data compression alleviating the data transmission problem while preserving critical information of the detector energy profile. For our application, we consider the high-granularity calorimeter from the Compact Muon Solenoid (CMS) experiment at the CERN Large Hadron Collider. The advantage of the machine learning approach is in the flexibility and configurability of the algorithm. By changing the NN weights, a unique data compression algorithm can be deployed for each sensor in different detector regions and changing detector or collider conditions. To meet area, performance, and power constraints, we perform quantization-aware training to create an optimized NN hardware implementation. The design is achieved through the use of high-level synthesis tools and the hls4ml framework and was processed through synthesis and physical layout flows based on a low-power (LP)-CMOS 65-nm technology node. The flow anticipates 200 Mrad of ionizing radiation to select gates and reports a total area of 3.6 mm 2 and consumes 95 mW of power. The simulated energy consumption per inference is 2.4 nJ. Furthermore, this is the first radiation-tolerant on-detector ASIC implementation of an NN that has been designed for particle physics applications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

The Biolink Implantable Telemetry System

Most biotelemetry applications deal with the moderated data rates of biological signals. Few people have studied the problem of transcutaneous data transmission at the rates required by NASA's Life Sciences-Advanced BioTelemetry System (LS-ABTS). Implanted telemetry eliminate the problems associated with wire breaking the skin, and permits experiments with awake and unrestrained subjects. Our goal is to build a low-power 174-216MHz Radio Frequency (RF) transmitter suitable for short range biosensor and implantable use. The BioLink Implantable Telemetry System (BITS) is composed of three major units: an Analog Data Module (ADM), a Telemetry Transmitter Module (TTM), and a Command Receiver Module (CRM). BioLink incorporates novel low-power techniques to implement a monolithic digital RF transmitter operating at 100kbps, using quadrature phase shift keying (QPSK) modulation in the 174-216MHz ISM band. As the ADM will be specific for each application, we focused on solving the problems associated with a monolithic implementation of the TTM and CRM, and this is the emphasis of this report. A system architecture based on a Frequency-Locked Loop (FLL) Frequency Synthesizer is presented, and a novel differential frequency that eliminates the need for a frequency divider is also shown. A self sizing phase modulation scheme suitable for low power implementation was also developed. A full system-level simulation of the FLL was performed and loop filter parameters were determined. The implantable antenna has been designed, simulated and constructed. An implant package compatible with the ABTS requirements is also being proposed. Extensive work performed at 200MHz in 0.5um complementary metal oxide semiconductors (CMOS) showed the feasibility of integrating the RF transmitter circuits in a single chip. The Hajimiri phase noise model was used to optimize the Voltage Controlled Oscillator (VCO) for minimum power consumption. Two test chips were fabricated in a 0.5pm, 3V CMOS process. Measured phase noise for a 1.5mW, 200MHz ring oscillator VCO is -80dBc/Hz at 100KHZ offset, showing good agreement with the theory. We also propose a novel superregenerative receiver architecture for implementing the command receiver. The superregenerative receiver's simplicity, low cost, and low power consumption has made it the receiver of choice for short-distance data communications, remote control and home automation. We present the design of a superregenerative AM receiver implemented in a 0.5um CMOS technology that operates at 433.92MHz and dissipates only 300uW. Further work entails detailed transistor-level design of the FLL and superregenerative receiver and a monolithic implementation of an implantable transceiver in 0.5um CMOS technology.

Betancourt-Zamora, Rafael J.↗

Accurate Time-Dependent Traveling-Wave Tube Model Developed for Computational Bit-Error-Rate Testing

The phenomenal growth of the satellite communications industry has created a large demand for traveling-wave tubes (TWT's) operating with unprecedented specifications requiring the design and production of many novel devices in record time. To achieve this, the TWT industry heavily relies on computational modeling. However, the TWT industry's computational modeling capabilities need to be improved because there are often discrepancies between measured TWT data and that predicted by conventional two-dimensional helical TWT interaction codes. This limits the analysis and design of novel devices or TWT's with parameters differing from what is conventionally manufactured. In addition, the inaccuracy of current computational tools limits achievable TWT performance because optimized designs require highly accurate models. To address these concerns, a fully three-dimensional, time-dependent, helical TWT interaction model was developed using the electromagnetic particle-in-cell code MAFIA (Solution of MAxwell's equations by the Finite-Integration-Algorithm). The model includes a short section of helical slow-wave circuit with excitation fed by radiofrequency input/output couplers, and an electron beam contained by periodic permanent magnet focusing. A cutaway view of several turns of the three-dimensional helical slow-wave circuit with input/output couplers is shown. This has been shown to be more accurate than conventionally used two-dimensional models. The growth of the communications industry has also imposed a demand for increased data rates for the transmission of large volumes of data. To achieve increased data rates, complex modulation and multiple access techniques are employed requiring minimum distortion of the signal as it is passed through the TWT. Thus, intersymbol interference (ISI) becomes a major consideration, as well as suspected causes such as reflections within the TWT. To experimentally investigate effects of the physical TWT on ISI would be prohibitively expensive, as it would require manufacturing numerous amplifiers, in addition to acquiring the required digital hardware. As an alternative, the time-domain TWT interaction model developed here provides the capability to establish a computational test bench where ISI or bit error rate can be simulated as a function of TWT operating parameters and component geometries. Intermodulation products, harmonic generation, and backward waves can also be monitored with the model for similar correlations. The advancements in computational capabilities and corresponding potential improvements in TWT performance may prove to be the enabling technologies for realizing unprecedented data rates for near real time transmission of the increasingly larger volumes of data demanded by planned commercial and Government satellite communications applications. This work is in support of the Cross Enterprise Technology Development Program in Headquarters' Advanced Technology & Mission Studies Division and the Air Force Office of Scientific Research Small Business Technology Transfer programs.

Kory, Carol L.↗

Optimization in the design of a 12 gigahertz low cost ground receiving system for broadcast satellites. Volume 1: System design, performance, and cost analysis

The technical and economical feasibility of using the 12 GHz band for broadcasting from satellites were examined. Among the assigned frequency bands for broadcast satellites, the 12 GHz band system offers the most channels. It also has the least interference on and from the terrestrial communication links. The system design and analysis are carried out on the basis of a decision analysis model. Technical difficulties in achieving low-cost 12 GHz ground receivers are solved by making use of a die cast aluminum packaging, a hybrid integrated circuit mixer, a cavity stabilized Gunn oscillator and other state-of-the-art microwave technologies for the receiver front-end. A working model was designed and tested, which used frequency modulation. A final design for the 2.6 GHz system ground receiver is also presented. The cost of the ground-terminal was analyzed and minimized for a given figure-of-merit (a ratio of receiving antenna gain to receiver system noise temperature). The results were used to analyze the performance and cost of the whole satellite system.

Ohkubo, K.↗

Modelling and control coordination scheme of a wind‐to‐hydrogen set for future renewable‐based power systems

New challenges regarding system stability and efficiency arise when power systems operate with a high penetration level of inverter‐based renewable sources (IBRSs) and few synchronous generators. Since IBRSs have been on the rise, to secure the stable operation of future power systems, IBRSs will be required to support systems without having to rely on remaining synchronous generators. Also, to efficiently manage the uncertainty of renewable production, power‐to‐gas technology can provide the required flexibility. This study proposes modelling and a control coordination scheme (CCS) of a wind‐to‐hydrogen (W2H) set to optimise electricity production from a variable‐speed wind turbine generator (WTG) while helping balance between supply and demand in a system. To achieve this, a grid‐forming (GFM) inverter‐based WTG is modelled and a set of electrolyser and fuel cell is integrated at the DC circuit of a GFM‐WTG to be coordinated. Furthermore, the CCS offers an opportunity to reduce the investment cost for deploying a W2H set by utilising the control capabilities of a WTG and reducing the need for an additional device. The performance of the proposed W2H set with the CCS was verified considering the variations in system load and wind speed by using Power System Computer Aided Design (PSCAD)/ElectroMagnetic Transients including Direct Current (EMTDC).

Kim, Jinho↗

Modeling and analysis of cascade solar cells

A brief review is given of the present status of the development of cascade solar cells. It is known that photovoltaic efficiencies can be improved through this development. The designs and calculations of the multijunction cells, however, are quite complicated. The main goal is to find a method which is a compromise between accuracy and simplicity for modeling a cascade solar cell. Three approaches are presently under way, among them (1) equivalent circuit approach, (2) numerical approach, and (3) analytical approach. Here, the first and the second approaches are discussed. The equivalent circuit approach using SPICE (Simulation Program, Integrated Circuit Emphasis) to the cascade cells and the cascade-cell array is highlighted. The methods of extracting parameters for modeling are discussed.

Ho, F. D.↗

Modeling from Local to Subsystem Level Effects in Analog and Digital Circuits Due to Space Induced Single Event Transients

Single Event Transients in analog and digital electronics from space generated high energetic nuclear particles can disrupt either temporarily and sometimes permanently the functionality and performance of electronics in space vehicles. This work first provides some insights into the modeling of SET in electronic circuits that can be used in SPICE-like simulators. The work is then directed to present methodologies, one of which was developed by this author, for the assessment of SET at different levels of integration in electronics, from the circuit level to the subsystem level.

State Transistion Model.↗

1985 Annual Conference on Nuclear and Space Radiation Effects, 22nd, Monterey, CA, July 22-24, 1985, Proceedings

Basic mechanisms of radiation effects in structures and materials are discussed, taking into account the time dependence of interface state production, process dependent build-up of interface states in irradiated N-channel MOSFETs, bias annealing of radiation and bias induced positive charges in n- and p-type MOS capacitors, hole removal in thin-gate MOSFETs by tunneling, and activation energies of oxide charge recovery in SOS or SOI structures after an ionizing pulse. Other topics investigated are related to radiation effects in devices, radiation effects in integrated circuits, spacecraft charging and space radiation effects, single-event phenomena, hardness assurance and radiation sources, SGEMP/IEMP phenomena, EMP phenomena, and dosimetry and energy-dependent effects. Attention is given to a model of the plasma wake generated by a large object, gate charge collection and induced drain current in GaAs FETs, simulation of charge collection in a multilayer device, and time dependent dose enhancement effects on integrated circuit transient response mechanisms.

Jones, C. W.↗

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

Today's launch vehicles complex electronic and avionics systems heavily utilize Field Programmable Gate Array (FPGA) integrated circuits (IC) for their superb speed and reconfiguration capabilities. Consequently, FPGAs are prevalent ICs in communication protocols such as MILSTD- 1553B and in control signal commands such as in solenoid valve actuations. This paper will identify reliability concerns and high level guidelines to estimate FPGA total failure rates in a launch vehicle application. The paper will discuss hardware, hardware description language, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC. The hardware description language portion will discuss the high level FPGA programming languages and software/code reliability growth. The radiation portion will discuss FPGA susceptibility to space environment radiation.

Al Hassan, Mohammad↗

Estimating Rates Of Single-Event Upsets

Mathematical model yields estimates of upper and lower bounds on rates of single-event upsets (SEU's) in logic circuits. SEU's are reversible changes in logic states, caused by single high-energy ions. Energetic ions passed through device along tracks perpendicular to surface, to determine parameters of model. Used to estimate rates caused by ions of various energies incident at arbitrary angles. Useful in design of integrated circuits as high-density memories for minimal susceptibility to bit errors.

Zoutendyk, John A.↗

Optimizing costs of VLSI circuits

Report analyzes costs of developing and producing low-production-volume, customized VLSI (very large-scale, integrated) circuits. Relationship is developed between IC cost and electronic system cost using IC cost models based on design/fabrication approach. Emphasis is on development of understanding between cost and volume for custom circuits to be used by NASA. Reliability is major cost component in models. Report is divided into five sections and includes four appendices with useful reference literature.

Cook, K. B., Jr.↗

Accelerators for critical experiments involving single-particle upset in solid-state microcircuits

Charged-particle interactions in microelectronic circuit chips (integrated circuits) present a particularly insidious problem for solid-state electronic systems due to the generation of soft errors or single-particle event upset (SEU) by either cosmic rays or other radiation sources. Particle accelerators are used to provide both light and heavy ions in order to assess the propensity of integrated circuit chips for SEU. Critical aspects of this assessment involve the ability to analytically model SEU for the prediction of error rates in known radiation environments. In order to accurately model SEU, the measurement and prediction of energy deposition in the form of an electron-hole plasma generated along an ion track is of paramount importance. This requires the use of accelerators which allow for ease in both energy control (change of energy) and change of ion species. This and other aspects of ion-beam control and diagnostics (e.g., uniformity and flux) are of critical concern for the experimental verification of theoretical SEU models.

Zoutendyk, J. A.↗

Full-Wave Analysis Of MMICs Using A Generalized Yee Algorithm

Improved method of temporal analysis of propagation of electro-magnetic waves in monolithic microwave integrated circuits (MMICs) implemented by generalized version of traditional Yee algorithm. Provides more accurate mathematical modeling for analysis and design of MMICs. Based on unstructured and otherwise irregular grids. Grids readily fitted to conductive and dielectric circuit elements having realistically complex three-dimensional shapes. Better for modeling important and geometrically complex phenomena like fringing fields.

Lansing, Faiza S.↗

Design and performance of a high-Tc superconductor coplanar waveguide filter

The design of a coplanar waveguide low-pass filter made of YBa2Cu3O(7-delta) (YBCO) on an LaAlO3 substrate is described. Measurements were incorporated into simple models for microwave CAD analysis to develop a final design. The patterned and packaged coplanar waveguide low-pass filter of YBCO, with dimensions suited for integrated circuits, exhibited measured insertion losses when cooled in liquid nitrogen superior to those of a similarly cooled thin-film copper filter throughout the 0 to 9.5 GHz passband. Coplanar waveguide models for use with thin-film normal metal (with thickness either greater or less than the skin depth) and YBCO are discussed and used to compare the losses of the measured YBCO and copper circuits.

Chew, Wilbert↗

DC Modeling of 4H-SiC JFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460 °C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6μm (for recently fabricated Gen. 11 ICs) limits on mission relevant circuit capabilities [1]. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies to reduce the SiC JFET channel length while maintaining turn-off behavior (Fig. 1a) needed to realize 500 °C circuit operation. The first fabrication strategy uses a shallow self-align nitrogen implant (Figure 1b) along the device's top surface but not below the gate combined with a high-dose phosphorous implant directly below the source and drain contacts. For the second fabrication strategy (Figure 1c), the high-dose phosphorous implants extended from below the contacts all the way up to the gate edges. Simulations guided gate length reductions without significant degradation in the turn-off performance. In total 12 SiC JFET variants implementing using the different fabrication strategies, gate lengths, and n-channel epilayer thickness were implemented in our simulation framework implemented in COMSOL. Since the COMSOL database does not have the material properties for 4H-SiC, these parameters were taken from the literature and implemented in COMSOL. The empirical models [2] for incomplete ionization, Auger recombination, low field mobility, and Shockley-Read-Hall recombination were implemented to account for material-specific device behavior.

4H-SiC JFET↗

Field Programmable Gate Array Failure Rate Estimation Guidelines for Launch Vehicle Fault Tree Models

Today's launch vehicles complex electronic and avionic systems heavily utilize the Field Programmable Gate Array (FPGA) integrated circuit (IC). FPGAs are prevalent ICs in communication protocols such as MIL-STD-1553B, and in control signal commands such as in solenoid/servo valves actuations. This paper will demonstrate guidelines to estimate FPGA failure rates for a launch vehicle, the guidelines will account for hardware, firmware, and radiation induced failures. The hardware contribution of the approach accounts for physical failures of the IC, FPGA memory and clock. The firmware portion will provide guidelines on the high level FPGA programming language and ways to account for software/code reliability growth. The radiation portion will provide guidelines on environment susceptibility as well as guidelines on tailoring other launch vehicle programs historical data to a specific launch vehicle.

Al Hassan, Mohammad↗