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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS1974

Design, processing, and testing of LSI arrays for space station

The development of a beam-leaded low power, high performance metal-oxide-semiconductor (MOS), 256-bit random access memory (RAM) was reported. Previous success with the aluminum-gate current-sense version and a silicon-gate voltage-sense version led to the present effort to make a beam-leaded silicon-gate RAM. Some problems unique to the silicon-on-sapphire beam-lead process development are presented. Beam-leaded SOS TA5388 devices using a Si3N4 passivation layer were shown to have good electrical parameters.

Schneider, W. C.↗
NASA NTRS1974

Design, processing, and testing of LSI arrays for space station

At wafer probe, units of the TA6567 circuit, a beam leaded COS/MOS/SOS 256-bit RAM, were demonstrated to be functionally perfect. An aluminum gate current-sense version and a silicon-gate voltage-sense version of this memory were developed. Initial base line data for the beam lead SOS process using the TA5388 circuit show the stability of the dc device characteristics through the beam lead processing.

Schneider, W. C.↗
NASA NTRS1975

Design, processing, and testing of LSI arrays for space station

Data for the beam-leaded silicon-on-sapphire (SOS) process using the TA5388 dual-complementary pair plus inverted circuit show the stability of the dc device characteristics through the complete beam-lead processing and packaging steps. A more complex circuit, the TA6567 - a silicon-gate, voltage-sense BL/CMOS/SOS 256-bit RAM, has also been made that was functionally perfect at wafer probe. Efforts to increase the yield of this circuit and to obtain electrically perfect packaged units are discussed.

Schneider, W. C.↗
NASA NTRS1976

Design, processing, and testing of LSI arrays for space station

The work on the Process Analysis Structure was continued with the layout being completed, the 100X and 10X artwork being finalized, and the process and test sequences being prepared. Test programs were written for computer-controlled integrated-circuit testing and data reduction.

Ipri, A. C.↗
NASA NTRS1979

Design, processing and testing of LSI arrays: Hybrid microelectronics task

Mathematical cost factors were generated for both hybrid microcircuit and printed wiring board packaging methods. A mathematical cost model was created for analysis of microcircuit fabrication costs. The costing factors were refined and reduced to formulae for computerization. Efficient methods were investigated for low cost packaging of LSI devices as a function of density and reliability. Technical problem areas such as wafer bumping, inner/outer leading bonding, testing on tape, and tape processing, were investigated.

Himmel, R. P.↗
NASA NTRS1979

Design, processing and testing of LSI arrays, hybrid microelectronics task

Mathematical cost models previously developed for hybrid microelectronic subsystems were refined and expanded. Rework terms related to substrate fabrication, nonrecurring developmental and manufacturing operations, and prototype production are included. Sample computer programs were written to demonstrate hybrid microelectric applications of these cost models. Computer programs were generated to calculate and analyze values for the total microelectronics costs. Large scale integrated (LST) chips utilizing tape chip carrier technology were studied. The feasibility of interconnecting arrays of LSU chips utilizing tape chip carrier and semiautomatic wire bonding technology was demonstrated.

Himmel, R. P.↗
NASA NTRS1987

Lunar fiberglass: Properties and process design

A Clemson University ceramic engineering design for a lunar fiberglass plant is presented. The properties of glass fibers and metal-matrix composites are examined. Lunar geology is also discussed. A raw material and site are selected based on this information. A detailed plant design is presented, and summer experiments to be carried out at Johnson Space Center are reviewed.

Dalton, Robert↗