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At least 127 records · Page 7

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DOE OSTI2024

T-Type Modular DC Circuit Breaker (T-Breaker) for Future DC Networks

The developed T-Type Modular DC Circuit Breaker (T-Breaker) technology offers an all-in-one solution to challenges in DC networks. This includes swift fault detection and protection, power transient stability, and power quality improvement, achieved through the utilization of wide bandgap (WBG) power semiconductors and energy storage devices. The T-Breaker not only facilitates rapid fault current detection and interruption but also implements fault current limiting through active insertion of storage devices or by operating WBG devices in the saturation region. Additionally, with the assistance of energy storage devices, potential overvoltage issues on power devices induced by control signal misalignment can be mitigated. The T-Breaker can be regulated to perform shunt current injection/absorption using the vertical arm and series voltage insertion via the horizontal arm, thereby enhancing DC system stability during voltage or load power fluctuation transients. The OSU team and Raytheon team actively worked together on designing, fabricating, assembling, and testing of two T-Breaker prototypes. The first prototype is rated at 1 kV, 500 A with half-bridge (unipolar) structure to validate the T-Breaker concept. The second prototype is rated at 20 kV, 50 A with full-bridge (bipolar) topology which can reach an efficiency of 99.977%, realize a power density of 60.2 MW/m3, and eliminate the 500-A fault current with a fault response time of around 20 µs. The prototypes show great feasibility of adopting this technology in multiple applications including electrified aircraft, super charging stations, data centers, etc.

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2022

Wide bandgap optical switch circuit breaker

A high-voltage switch is adapted for use as a medium-voltage direct current circuit breaker, which provides a low-cost, small-footprint device to mitigate system faults. In one example, a method for operating a wideband optical device includes illuminating the wide bandgap optical device with a light within a first range of wavelengths and a first average intensity, allowing a current to propagate therethrough without substantial absorption of the current, illuminating the wide bandgap optical device with light within the first range of wavelengths and a second average intensity that is lower than the first average intensity to allow a sustained current flow though the wide bandgap optical device, and illuminating the wide bandgap optical device with light within a second range of wavelengths to stop or substantially restrict propagation of the current through the wide gap material.

Voss, Lars F.↗

DOE OSTI2024

Wide bandgap optical switch circuit breaker for controlling propagation of current therethrough a wide bandgap optical device

Voss, Lars F.↗

DOE OSTI2025

Simulations of the fault current limiting operation of a long-length REBCO CORC ® superconducting cable cooled by helium gas

Conductor-on-round-core (CORC®) cables composed of rare-earth-barium-copper-oxide high-temperature superconducting (HTS) tapes are of great interest for power transmission applications due to their many advantages such as high power density, light weight, and low loss. Closed circulation loops of cryogenic helium gas can be used to cool HTS cables down to low temperatures to significantly improve their current-carrying capacity. Coupled circuit-electromagnetic-thermal finite element simulations implemented in the COMSOL Multiphysics package were developed, validated, and then used for simulating the fault current limiting (FCL) performance and the cooling processes of an 8-layer CORC® cable cooled with a flow of cryogenic helium gas. In the simulations, the temperature dependence of the electrical and thermal properties of all component materials is implemented for improved accuracy. To overcome computational challenges caused by the considerable difference in geometrical scales (i.e. few-µm-thick HTS layers versus 10 m-long HTS cable), the model is divided into two separate simulations. The first simulation is performed on the transverse cross-section of the cable to calculate the electric field, heating power and temperature rise in each component of a CORC® cable during FCL operation. The heating power calculated in the first simulation is transferred to the second model to simulate the cooling of a 10 m-long cable after the fault is cleared. The effect of the helium gas flow rate on the cooling process is also investigated to develop strategic approaches for optimizing cooling systems for HTS cables with FCL capability. The simulations indicated that a 40 ms fault with a voltage drop of 20 V m −1 along the cable can result in a temperature increase from 60 K to about 165 K inside the cable, and it takes about 500 s to cool the cable back to nearly 60 K with a flow of cold helium gas at a rate of 5 g s −1 .

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2022

Compressor is A Sensor: A Universal Refrigerant Charge Fault Detection and Diagnostics Method Based on Pump Down Operation

The primary goal of this report is to develop a universal charge fault detection method that requires only a few experimental data with high prediction accuracy. Currently, pump-down operations is typical practices by HVAC technicians when they need to open the refrigerant circuit to make a repair. In addition, compressors have a built-in low-pressure cut-off protection function, and the compressor performance maps are commonly available from manufacturers. The new charge fault detection and diagnostics method innovatively utilizes the typical pump down operation, the compressor’s low-pressure cut-off protection, and the compressor performance map. It does not require any geometry information of heat exchangers, refrigerant lines, or charge buffers.

42 ENGINEERING↗

DOE OSTI2024

Modular DC circuit breaker with integrated energy storage for future DC networks

A T-breaker is an all-in-one solution for dc microgrid fault protection, power flow control, and power quality improvement. A T-breaker features a modular multilevel “T” structure with integrated energy storage devices. The two horizontal arms of the T-breaker realize fault current breaking, load voltage compensation, and power flow control; and the vertical arm of the T-breaker realizes shunt compensation. The configuration provides excellent voltage scalability and relaxes the requirements on the switching signal synchronization during fault transients. The local energy storage in sub-modules eases the fault energy dissipation requirement placed on the traditionally-adopted surge arrestors. The modular multilevel structure also offers immense control flexibility for all types of targeted functions of the provided T-breaker.

Wang, Jin↗

DOE OSTI2023

A review of crosstalk polymorphic circuits and their scalability

Using a control variable, the functionality of Polymorphic circuits can be modified, making them adaptable and useful for reconfiguring circuit behavior — all the way from gate level to system level. State-of-the art polymorphic circuits are based on custom non-linear circuit design or emerging devices such as ambipolar FET, configurable magnetic devices etc. While some of these approaches are inefficient in performance, others involve exotic devices. The Crosstalk computing based polymorphic circuits offer a fresh perspective. In Crosstalk, the interconnect interference between nanoscale metal lines is intentionally engineered to exhibit the programmable Boolean logic behavior. This approach relies on the coupling between metal lines and not on the transistors for computing, resulting in better scalability, security by obscurity, and fault tolerance by reconfiguration. Our novel approach is backed by the mathematical formulation that conveys the rationale to generalize and achieve a wide variety of polymorphic circuits. Our experiments, including design, simulation, and Power Performance Area (PPA) characterization results indicate that crosstalk circuits provide significant improvement in transistor count (about 3x), switching energy (2x), and speed (1.5x) for polymorphic logic circuits. In the best-case scenario, the transistor count reduction is 5x. This paper presents Crosstalk computing’s fundamentals, polymorphism and the scalability aspects to compete/co-exist with CMOS for digital logic implementations below 10 nm. Our scalability study uses Open Source 7 nm PDK, considers all process variation aspects and accommodates worst-case scenarios. The study results for various benchmark circuits show that the Crosstalk technology is a viable alternative to CMOS for digital logic implementations below 10 nm, having 48% density, 57% power, and 10% performance gains over equivalent CMOS counterparts. Finally, we compare Crosstalk Polymorphic Circuit design technique with similar approaches described in related works and discuss its features and constraints.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2026

Simulating plasma wave propagation on a superconducting quantum chip

Quantum computers may one day enable the efficient simulation of strongly coupled plasmas that lie beyond the reach of classical computation in regimes where quantum effects are important and the scale separation is large. Here, in this article, we take a first step toward efficient simulation of quantum plasmas by demonstrating linear plasma wave propagation on a superconducting quantum chip. Using high-fidelity and highly expressive device-native gates, combined with an error-mitigation technique, we simulate the scattering of laser pulses from inhomogeneous plasmas. Our approach is made feasible by the identification of a suitable local spin model whose excitations mimic plasma waves, and whose circuit implementation requires a lower gate count than other proposed approaches that would require a future fault-tolerant quantum computer. This work opens avenues to study more complicated phenomena that cannot be simulated efficiently on classical computers, such as nonlinear quantum dynamics when strongly coupled plasmas are driven out of equilibrium.

general physics↗

DOE OSTI2023

Mid-circuit correction of correlated phase errors using an array of spectator qubits

Scaling up invariably error-prone quantum processors is a formidable challenge. Although quantum error correction ultimately promises fault-tolerant operation, the required qubit overhead and error thresholds are daunting. In a complementary proposal, colocated, auxiliary “spectator” qubits act as in situ probes of noise and enable real-time, coherent corrections of data qubit errors. We used an array of cesium spectator qubits to correct correlated phase errors on an array of rubidium data qubits. By combining in-sequence readout, data processing, and feedforward operations, these correlated errors were suppressed within the execution of the quantum circuit. The protocol is broadly applicable to quantum information platforms and establishes key tools for scaling neutral-atom quantum processors: mid-circuit readout of atom arrays, real-time processing and feedforward, and coherent mid-circuit reloading of atomic qubits.

Science & Technology - Other Topics↗

DOE OSTI2022

Advanced Sensor Deployment for Distribution System State Estimation and Fault Identification: Preprint

Distribution systems are currently facing steep operational challenges as a result of the rapidly increasing integration of renewables and other distributed energy resources (DERs)at both the primary and secondary circuit levels. Distribution utilities and system operators have traditionally had some visibility of their primary circuits using low-frequency supervisory control and data acquisition systems, and they have had very poor if not zero visibility of the secondary circuits where the presence of DERs is constantly increasing. Therefore, this paper presents simulation studies to demonstrate the benefits of an advanced, high-fidelity sensor technology, called as the Meta-Alert System (MAS), developed by Electrical Grid Monitoring Ltd. (EGM), on the distribution grid. First, a reliable model of the EGM sensors is developed, and then two use cases - distribution system state estimation (DSSE) and fault identification - are simulated to evaluate the performance of the MAS technology. Simulation results on the Electric Power Research Institute J1feeder demonstrate that the MAS can effectively participate in system-level DSSE programs and can detect and locate faults faster than traditional distribution protection schemes.

distribution system monitoring↗

DOE OSTI2021

A quantum algorithm for string matching

Algorithms that search for a pattern within a larger data-set appear ubiquitously in text and image processing. Here, we present an explicit, circuit-level implementation of a quantum pattern-matching algorithm that matches a search string (pattern) of length M inside a longer text of length N. Our algorithm has a time complexity of $\tildeO$($\sqrt{N}$), while the space complexity remains modest at O(N+ M). We report the quantum gate counts relevant for both pre-fault-tolerant and fault-tolerant regimes.

Physics↗

DOE OSTI2024

Scalable Circuit Cutting and Scheduling in a Resource-constrained and Distributed Quantum System

Despite quantum computing's rapid development, current systems remain limited in practical applications due to their limited qubit count and quality. Various technologies, such as superconducting, trapped ions, and neutral atom quantum computing technologies are progressing towards a fault tolerant era, however they all face a diverse set of challenges in scalability and control. Recent efforts have focused on multi-node quantum systems that connect multiple smaller quantum devices to execute larger circuits. Future demonstrations hope to use quantum channels to couple systems, however current demonstrations can leverage classical communication with circuit cutting techniques. This involves cutting large circuits into smaller subcircuits and reconstructing them post-execution. However, existing cutting methods are hindered by lengthy search times as the number of qubits and gates increases. Additionally, they often fail to effectively utilize the resources of various worker configurations in a multi-node system. To address these challenges, we introduce FitCut, a novel approach that transforms quantum circuits into weighted graphs and utilizes a community-based, bottom-up approach to cut circuits according to resource constraints, e.g., qubit counts, on each worker. FitCut also includes a scheduling algorithm that optimizes resource utilization across workers. Implemented with Qiskit and evaluated extensively, FitCut significantly outperforms the Qiskit Circuit Knitting Toolbox, reducing time costs by factors ranging from 3 to 2000 and improving resource utilization rates by up to 3.88 times on the worker side, achieving a system-wide improvement of 2.86 times.

Kan, Shuwen [Fordham University]↗

DOE OSTI2020

High-Frequency Signature-Based Fault Detection for Future MV Distribution Grids: Preprint

Increased deployment of Distributed Energy Resources (DERs) and microgrids are significantly changing the operation of distribution grid. Increasing penetration of power electronics based DERs also raise several operational problems such as protection coordination issues, voltage raise, recloser synchronization, stability, and frequency control. Legacy systems are designed for unidirectional power flow. Bidirectional power flows, and varying short circuit levels are some of the major challenges in implementing these legacy protection schemes for future power grid with high penetration of power electronics based DERs. Inverter based DER’s can contribute to a maximum of 2 p.u. fault current. Interconnection standards might require even lower fault current contribution. If these protection related challenges are not addressed, it will result in limiting the penetration of DERs in distribution feeders. In this paper, the feasibility of high frequency signature generated by transients is evaluated to identify and locate faults in a distribution system. The paper will discuss the need for an accurate line modeling approach to accurately capture the high frequency signatures. These high frequency signatures are naturally occurring electromagnetic transients for events such as switching events in the network, faults events, etc. This is different than that implemented in transmission systems as the proposed approach utilizes advanced signal processing techniques to retrieve valuable information from the high frequency signatures generated during faults and does not just rely on time delay measurements between reflections of the high frequency signals. In the full paper, information of a modified IEEE distribution feeder test system to accurately model the high frequency signatures will be provided. The distribution lines will be modeled using universal line modeling (ULM) technique in an electromagnetic transients program (EMTP) modeling platform. Different test cases will be simulated and these test cases will include different fault types, multiple fault locations, capacitor bank switching, etc. The feeder system modeled for these simulations will also include power electronics based DERs. Additionally, experimental results demonstrating the high frequency signatures generated due to a transient event in a medium voltage (13.8 kV) distribution line will also be presented in the full paper. Furthermore, the analysis combined with simulation and experimental results in the full paper will help demonstrate the feasibility and efficacy of the proposed protection scheme. The developed protection scheme will not just help solve problems generated by bidirectional current flow, varying short-circuit current capacity, but also help in proliferation of DERs in distribution systems.

41 EE - Solar Energy Technologies Office (EE-4S)↗

DOE OSTI2024

Adaptive Fault Current-Limiting Control of MMC for Protection of Multiterminal HVDC Systems

A crucial requirement of the protection system for multi-terminal high-voltage DC (MTDC) transmission is that it is capable of selectively isolating the faulty area from the healthy part of the network using DC circuit breakers (DCCBs), while ensuring continuous operation of converter stations in the healthy part of the network. But in the half-bridge modular multilevel converters (HB-MMCs) based MTDC system, since HB-MMCs do not have fault current absorption capability, when a DC fault occurs, the rising fault currents can quickly reach the blocking threshold within a few milliseconds and disrupt the operation of the MMCs in the healthy part. To facilitate fault-ride-through capability of MTDC system, large DC reactors are often considered in series with DCCBs to reduce the rate of rise of the fault current and prevent blocking the MMCs in the healthy part of the DC networks; however, large DC reactors prohibitively increase the cost of the system, introduce stability issues and can create post-fault oscillations. This paper presents an adaptive fault current-limiting control method for MMCs to avoid their blocking and enable the continuous operation of the healthy part of MTDC systems. The method contains two parts: The first part is based on circulating current feedforward control, which emulates virtual reactors in each arm of an MMC, and is immediately activated when the fault current starts to increase to reduce the rate of rise of the fault current. The second part temporarily bypasses all the submodules when the fault current exceeds a preset threshold, complementing the fault current-limiting effect of the first part. Neither part requires fault detection signals, and they are automatically activated during faults. Simulation case studies of a four-terminal bipolar MMC-based high-voltage DC system are presented to demonstrate the effectiveness of the proposed control methods.

active fault current limiting↗

DOE OSTI2021

TQEA: Temporal Quantum Error Analysis

For the last few years quantum computers have captured researchers’ interest in solving complicated problems in finance, chemistry, machine learning, and many other NP problems. Quantum computing benefits from parallel computation, entanglement, and calculation speedup compared to classical computing. Even though the operations and number of qubits in quantum computers are limited, previous research showed that using quantum computers can be beneficial. These benefits gained researchers’ interest to work on the improvement of quantum computers and overcome the limitations by building more advanced quantum computers with fault tolerance capability, more physical qubits, and better operational gates. In practice, Quantum applications would be translated into Quantum Circuits and each circuit can contain one or many entanglements (s), single qubits operations, and readouts. The importance of running Quantum applications with controlled errors or without errors is critical to the desired result from Quantum readout. In this paper, we study the characteristics of superconducting quantum machines along with the previously proposed methods of Quantum error detection/correction and in order to build a better error model we propose a temporal method for analyzing the the behavior of qubits errors (T1 and T2), frequency of operation, entanglement errors, and readout errors. In order to detect and predict the behavior of each machine, we use simple exponential smoothing analysis on heuristic calibration data. Finally, based on observation, we show that based on frequency, qubits, readout and single operation errors we can build a temporal based model to study and predict the outcome of runs on each Quantum machine.

Baheri, Betis↗

DOE OSTI2023

Logical quantum processor based on reconfigurable atom arrays

Suppressing errors is the central challenge for useful quantum computing, requiring quantum error correction (QEC) for large-scale processing. However, the overhead in the realization of error-corrected ‘logical’ qubits, in which information is encoded across many physical qubits for redundancy, poses substantial challenges to large-scale logical quantum computing. Here we report the realization of a programmable quantum processor based on encoded logical qubits operating with up to 280 physical qubits. Using logical-level control and a zoned architecture in reconfigurable neutral-atom arrays, our system combines high two-qubit gate fidelities, arbitrary connectivity, as well as fully programmable single-qubit rotations and mid-circuit readout. Operating this logical processor with various types of encoding, we demonstrate improvement of a two-qubit logic gate by scaling surface-code distance from d = 3 to d = 7, preparation of colour-code qubits with break-even fidelities, fault-tolerant creation of logical Greenberger–Horne–Zeilinger (GHZ) states and feedforward entanglement teleportation, as well as operation of 40 colour-code qubits. Finally, using 3D [[8,3,2]] code blocks, we realize computationally complex sampling circuits with up to 48 logical qubits entangled with hypercube connectivity with 228 logical two-qubit gates and 48 logical CCZ gates. We find that this logical encoding substantially improves algorithmic performance with error detection, outperforming physical-qubit fidelities at both cross-entropy benchmarking and quantum simulations of fast scrambling. These results herald the advent of early error-corrected quantum computation and chart a path towards large-scale logical processors.

74 ATOMIC AND MOLECULAR PHYSICS↗

DOE OSTI2026

Leveraging Qubit Loss Detection in Fault-Tolerant Quantum Algorithms

Qubit loss errors constitute a dominant source of noise in many quantum hardware systems, particularly in neutral-atom quantum computers. We develop a theoretical framework to effectively detect and correct loss errors in logical algorithms and leverage such loss information in decoding. Considering general quantum error correction codes and logical circuits, we introduce a delayed-erasure decoder for experimentally motivated error models which leverages information from delayed loss detection to accurately correct loss errors, even when the precise moment of the error is unknown. Using this decoder, we identify strategies for detecting and correcting loss errors based on the logical circuit structure. For deep circuits prior to logical measurement, we explore methods to integrate loss detection into syndrome extraction with minimal overhead, identifying optimal strategies depending on the qubit loss fraction in the noise and hardware capabilities. In contrast, we find that many key algorithmic subroutines involve frequent gate teleportation, shortening the circuit depth before logical measurement and naturally replacing qubits with no additional experimental overhead. We simulate this setting using a toy model algorithm for small-angle synthesis and find a significant performance improvement as the loss fraction increases. These results provide a path forward for advancing large-scale fault-tolerant quantum computation in systems with loss error detection.

atoms↗

DOE OSTI2026

Efficient Simulation of Logical Magic State Preparation Protocols

Developing space- and time-efficient logical magic state preparation (MSP) protocols will likely be an essential step toward building a large-scale fault-tolerant quantum computer. Motivated by this need, we introduce a scalable method for simulating logical MSP protocols under the standard circuit-level noise model. When applied to protocols based on code-switching, magic state cultivation, and magic state distillation, our method yields a complexity polynomial in (i) the number of qubits and (ii) the nonstabilizerness, e.g., stabilizer rank or Pauli rank, of the target encoded magic state. The efficiency of our simulation method is rooted in a curious fact: every circuit-level Pauli error in these protocols propagates to a Clifford error at the end. This property is satisfied by a large family of protocols, including those that repeatedly measure a transversal Clifford that squares to a Pauli. We provide a proof-of-principle numerical simulation that prepares a magic state using such logical Clifford measurements. Our work enables practical simulation of logical MSP protocols without resorting to approximations or resource-intensive state-vector simulations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗