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At least 127 records · Page 7

Design Space Issues for Intrinsic Evolvable Hardware

This paper discuss the problem of increased programming time for intrinsic evolvable hardware (EHW) as the complexity of the circuit grows. We develop equations for the size of the population, n, and the number of generations required for the population to converge, ngen, based on L, the length of the programming string. We show that the processing time of the computer becomes negligible for intrinsic EHW since the selection/crossover/mutation steps are only done once per generation, suggesting there is room for use of more complex evolutionary algorithms m intrinsic EHW. F i y , we review the state of the practice and discuss the notion of a system design approach for intrinsic EHW.

Hereford, James↗

Differential Ligation Alters Electronic State and Coupling Signals of Iron-Sulfur Clusters in Flavin-Based Electron Bifurcation

Flavin-based electron bifurcation (FBEB) is employed by microorganisms for controlling pools of redox equivalents by reversibly splitting electron pairs into high- and low-energy levels from an initial midpoint potential. Our ability to harness this phenomenon is crucial for biocatalytic design which is limited by our understanding of energy coupling in the bifurcation system. In Pyrococcus furiosus, FBEB is carried out by the NADH-dependent ferredoxin:NADP+-oxidoreductase (NfnSL), coupling the uphill reduction of ferredoxin in NfnL to the downhill reduction of NAD+ in NfnS from oxidation of NADPH. Flanking the bifurcating flavin are two site-differentiated iron-sulfur clusters; the nearest is a glutamate-ligated [4Fe-4S] cluster in NfnL. Recent biochemical experiments substituting the native glutamate with cysteine led to loss of coupling between the uphill and downhill pathways, in contrast to the tight thermodynamic coupling in the native system. To understand how this decoupling is biochemically manifested by the cysteine-substituted [4Fe-4S] in NfnL, we employed electron paramagnetic resonance (EPR) spectroscopy to identify changes in electronic architecture and square wave voltammetry (SWV) to probe thermodynamic shifts produced by the substitution. We observed notable g-value shifts in the EPR for the cysteine-substituted iron-sulfur cluster in addition to significant downward shifts in the redox potential, as well as the disappearance of several low-field signals observed in the native NfnSL complex. These results suggest the site-differentiated glutamate residue facilitates higher spin states in the [4Fesingle bond4S] cluster to bridge energetic gaps in electron transfer to the bifurcating flavin in the native complex, preventing unwanted short-circuiting seen in the cysteine-substituted complex.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Split-Block Waveguide Polarization Twist for 220 to 325 GHz

A split-block waveguide circuit that rotates polarization by 90 has been designed with WR-3 input and output waveguides, which are rectangular waveguides used for a nominal frequency range of 220 to 325 GHz. Heretofore, twisted rectangular waveguides equipped with flanges at the input and output have been the standard means of rotating the polarizations of guided microwave signals. However, the fabrication and assembly of such components become difficult at high frequency due to decreasing wavelength, such that twisted rectangular waveguides become impractical at frequencies above a few hundred gigahertz. Conventional twisted rectangular waveguides are also not amenable to integration into highly miniaturized subassemblies of advanced millimeter- and submillimeter-wave detector arrays now undergoing development. In contrast, the present polarization- rotating waveguide can readily be incorporated into complex integrated waveguide circuits such as miniaturized detector arrays fabricated by either conventional end milling of metal blocks or by deep reactive ion etching of silicon blocks. Moreover, the present split-block design can be scaled up in frequency to at least 5 THz. The main step in fabricating a splitblock polarization-rotating waveguide of the present design is to cut channels having special asymmetrically shaped steps into mating upper and lower blocks (see Figure 1). The dimensions of the steps are chosen to be consistent with the WR-3 waveguide cross section, which is 0.864 by 0.432 mm. The channels are characterized by varying widths with constant depths of 0.432, 0.324, and 0.216 mm and by relatively large corner radii to facilitate fabrication. The steps effect both a geometric transition and the corresponding impedance-matched electromagnetic-polarization transition between (1) a WR-3 rectangular waveguide oriented with the electric field vector normal to the block mating surfaces and (2) a corresponding WR-3 waveguide oriented with its electric field vector parallel to the mating surfaces of the blocks. A prototype has been built and tested. Figure 2 presents test results indicative of good performance over nearly the entire WR-3 waveguide frequency band.

Ward, John↗

Parameter extraction for a SPICE model of an hTron superconducting thermal switch

Efficiently simulating large circuits is crucial to the development of superconducting nanowire-based electronics. However, current simulation tools for this technology are not adapted to the scaling of circuit size and complexity. We focus on the multilayered heater-nanocryotron (hTron), a promising superconducting nanowire-based switch used in applications such as superconducting nanowire single-photon detector readout. Previously, the hTron was modeled using traditional finite-element methods, which fall short in simulating systems at a larger scale. An empirical-based method would be better adapted to this task, enhancing both simulation speed and agreement with experimental data. In this work, we perform switching current and activation delay measurements on 17 hTron devices. We then develop a method for extracting physical fitting parameters used to characterize the devices. We build a SPICE behavioral model that reproduces the static and transient device behavior using these parameters, and validate it by comparing its performance to a model developed in prior work, showing an improvement in simulation time by several orders of magnitude. Furthermore, our model provides circuit designers with a tool to help understand the hTron’s behavior during all design stages, thus enabling broader use of the hTron across various new areas of application.

Caloritronics↗

Fock-Space Schrieffer–Wolff Transformation: Classically-Assisted Rank-Reduced Quantum Phase Estimation Algorithm

We present an extension of many-body downfolding methods to reduce the resources required in the quantum phase estimation (QPE) algorithm. In this paper, we focus on the Schrieffer–Wolff (SW) transformation of the electronic Hamiltonians for molecular systems that provides significant simplifications of quantum circuits for simulations of quantum dynamics. We demonstrate that by employing Fock-space variants of the SW transformation (or rank-reducing similarity transformations (RRST)) one can significantly increase the locality of the qubit-mapped similarity-transformed Hamiltonians. The practical utilization of the SW-RRST formalism is associated with a series of approximations discussed in the manuscript. In particular, amplitudes that define RRST can be evaluated using conventional computers and then encoded on quantum computers. The SW-RRST QPE quantum algorithms can also be viewed as an extension of the standard state-specific coupled-cluster downfolding methods to provide a robust alternative to the traditional QPE algorithms to identify the ground and excited states for systems with various numbers of electrons using the same Fock-space representations of the downfolded Hamiltonian. The RRST formalism serves as a design principle for developing new classes of approximate schemes that reduce the complexity of quantum circuits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Good trellises for IC implementation of viterbi decoders for linear block codes

This paper investigates trellis structures of linear block codes for the IC (integrated circuit) implementation of Viterbi decoders capable of achieving high decoding speed while satisfying a constraint on the structural complexity of the trellis in terms of the maximum number of states at any particular depth. Only uniform sectionalizations of the code trellis diagram are considered. An upper bound on the number of parallel and structurally identical (or isomorphic) subtrellises in a proper trellis for a code without exceeding the maximum state complexity of the minimal trellis of the code is first derived. Parallel structures of trellises with various section lengths for binary BCH and Reed-Muller (RM) codes of lengths 32 and 64 are analyzed. Next, the complexity of IC implementation of a Viterbi decoder based on an L-section trellis diagram for a code is investigated. A structural property of a Viterbi decoder called ACS-connectivity which is related to state connectivity is introduced. This parameter affects the complexity of wire-routing (interconnections within the IC). The effect of five parameters namely: (1) effective computational complexity; (2) complexity of the ACS-circuit; (3) traceback complexity; (4) ACS-connectivity; and (5) branch complexity of a trellis diagram on the VLSI complexity of a Viterbi decoder is investigated. It is shown that an IC implementation of a Viterbi decoder based on a non-minimal trellis requires less area and is capable of operation at higher speed than one based on the minimal trellis when the commonly used ACS-array architecture is considered.

Moorthy, H. T.↗

Good trellises for IC implementation of viterbi decoders for linear block codes

This paper investigates trellis structures of linear block codes for the IC (integrated circuit) implementation of Viterbi decoders capable of achieving high decoding speed while satisfying a constraint on the structural complexity of the trellis in terms of the maximum number of states at any particular depth. Only uniform sectionalizations of the code trellis diagram are considered. An upper bound on the number of parallel and structurally identical (or isomorphic) subtrellises in a proper trellis for a code without exceeding the maximum state complexity of the minimal trellis of the code is first derived. Parallel structures of trellises with various section lengths for binary BCH and Reed-Muller (RM) codes of lengths 32 and 64 are analyzed. Next, the complexity of IC implementation of a Viterbi decoder based on an L-section trellis diagram for a code is investigated. A structural property of a Viterbi decoder called ACS-connectivity which is related to state connectivity is introduced. This parameter affects the complexity of wire-routing (interconnections within the IC). The effect of five parameters namely: (1) effective computational complexity; (2) complexity of the ACS-circuit; (3) traceback complexity; (4) ACS-connectivity; and (5) branch complexity of a trellis diagram on the VLSI complexity of a Viterbi decoder is investigated. It is shown that an IC implementation of a Viterbi decoder based on a non-minimal trellis requires less area and is capable of operation at higher speed than one based on the minimal trellis when the commonly used ACS-array architecture is considered.

Lin, Shu↗

Good Trellises for IC Implementation of Viterbi Decoders for Linear Block Codes

This paper investigates trellis structures of linear block codes for the integrated circuit (IC) implementation of Viterbi decoders capable of achieving high decoding speed while satisfying a constraint on the structural complexity of the trellis in terms of the maximum number of states at any particular depth. Only uniform sectionalizations of the code trellis diagram are considered. An upper-bound on the number of parallel and structurally identical (or isomorphic) subtrellises in a proper trellis for a code without exceeding the maximum state complexity of the minimal trellis of the code is first derived. Parallel structures of trellises with various section lengths for binary BCH and Reed-Muller (RM) codes of lengths 32 and 64 are analyzed. Next, the complexity of IC implementation of a Viterbi decoder based on an L-section trellis diagram for a code is investigated. A structural property of a Viterbi decoder called add-compare-select (ACS)-connectivity which is related to state connectivity is introduced. This parameter affects the complexity of wire-routing (interconnections within the IC). The effect of five parameters namely: (1) effective computational complexity; (2) complexity of the ACS-circuit; (3) traceback complexity; (4) ACS-connectivity; and (5) branch complexity of a trellis diagram on the very large scale integration (VISI) complexity of a Viterbi decoder is investigated. It is shown that an IC implementation of a Viterbi decoder based on a nonminimal trellis requires less area and is capable of operation at higher speed than one based on the minimal trellis when the commonly used ACS-array architecture is considered.

Moorthy, Hari T.↗

Quantum computational phase transition in combinatorial problems

Quantum Approximate Optimization algorithm (QAOA) aims to search for approximate solutions to discrete optimization problems with near-term quantum computers. As there are no algorithmic guarantee possible for QAOA to outperform classical computers, without a proof that bounded-error quantum polynomial time (BQP) ≠ nondeterministic polynomial time (NP), it is necessary to investigate the empirical advantages of QAOA. We identify a computational phase transition of QAOA when solving hard problems such as SAT—random instances are most difficult to train at a critical problem density. We connect the transition to the controllability and the complexity of QAOA circuits. Moreover, we find that the critical problem density in general deviates from the SAT-UNSAT phase transition, where the hardest instances for classical algorithms lies. Then, we show that the high problem density region, which limits QAOA’s performance in hard optimization problems (reachability deficits), is actually a good place to utilize QAOA: its approximation ratio has a much slower decay with the problem density, compared to classical approximate algorithms. Indeed, it is exactly in this region that quantum advantages of QAOA over classical approximate algorithms can be identified.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Distributed quantum approximate optimization algorithm on a quantum-centric supercomputing architecture

Quantum approximate optimization algorithm (QAOA) has shown promise in solving combinatorial optimization problems by providing quantum speedup on near-term gate-based quantum computing systems. However, QAOA faces challenges for high-dimensional problems due to the large number of qubits required and the complexity of deep circuits, limiting its scalability for real-world applications. In this study, we present a distributed QAOA (DQAOA), which leverages distributed computing strategies to decompose a large computational workload into smaller tasks that require fewer qubits and shallower circuits than are necessary to solve the original problem. These sub-problems are processed using a combination of high-performance and quantum computing resources. The global solution is iteratively updated by aggregating sub-solutions, allowing convergence toward the optimal solution. We demonstrate that DQAOA can handle considerably large-scale optimization problems (e.g., 1000-bit problem), achieving a high solution quality and short time-to-solution, outperforming existing strategies. Furthermore, we realize DQAOA on a quantum-centric supercomputing architecture, paving the way for practical applications of gate-based quantum computers in real-world optimization tasks. To extend DQAOA’s applicability to materials science, we further develop an active learning algorithm integrated with our DQAOA (AL-DQAOA), which involves machine learning, DQAOA, and active data production in an iterative loop. We successfully optimize photonic structures using AL-DQAOA, indicating that solving real-world optimization problems using gate-based quantum computing is feasible. We expect the proposed DQAOA to be applicable to a wide range of optimization problems and AL-DQAOA to find broader applications in material design.

Kim, Seongmin [ORNL] (ORCID:0000000159063004)↗

Integration of Ag-CBRAM crossbars and Mott ReLU neurons for efficient implementation of deep neural networks in hardware

In-memory computing with emerging non-volatile memory devices (eNVMs) has shown promising results in accelerating matrix-vector multiplications. However, activation function calculations are still being implemented with general processors or large and complex neuron peripheral circuits. Here, we present the integration of Ag-based conductive bridge random access memory (Ag-CBRAM) crossbar arrays with Mott rectified linear unit (ReLU) activation neurons for scalable, energy and area-efficient hardware (HW) implementation of deep neural networks. We develop Ag-CBRAM devices that can achieve a high ON/OFF ratio and multi-level programmability. Compact and energy-efficient Mott ReLU neuron devices implementing ReLU activation function are directly connected to the columns of Ag-CBRAM crossbars to compute the output from the weighted sum current. We implement convolution filters and activations for VGG-16 using our integrated HW and demonstrate the successful generation of feature maps for CIFAR-10 images in HW. Our approach paves a new way toward building a highly compact and energy-efficient eNVMs-based in-memory computing system.

Mott insulators↗

Investigating the Influence of Ni, ZrO 2 , and Y 2 O 3 from SOFC Anodes on Siloxane Deposition

Siloxanes, as a type of impurity in biogas, can poison the Ni-YSZ anode of SOFCs. However, the influence of individual components of the anode, such as Ni, ZrO 2 , and Y 2 O 3 , on the siloxane deposition process has not been investigated extensively. In this study, Ni, ZrO 2 , and Y 2 O 3 pellets were exposed to H 2 + N 2 + H 2 O + D4 (octamethylcyclotetrasiloxane, 2.5 ppmv) and H 2 + N 2 + D4 (2.5 ppmv siloxane) gas mixtures at 750 °C to investigate their affinity and tolerance for siloxane degradation. Surface morphology analysis and electrochemical analysis including electrochemical impedance spectroscopy (EIS), related distribution of relaxation times (DRT) analysis and equivalent circuit modeling with complex nonlinear least square (CNLS) fitting were conducted. Here, a microstructure parameter—tortuosity factor to porosity ratio $\tau /\varepsilon $ calculated by diffusion polarization resistance was utilized for siloxane deposition evaluation. After comparing pellets surface morphology changes before and after experiments and $\tau /\varepsilon $ change following the contamination, Ni is considered as a major factor in siloxane deposition reactions in Ni-YSZ anode.

25 ENERGY STORAGE↗

Integrated dispersion compensated mode-locked quantum dot laser

Quantum dot lasers are excellent on-chip light sources, offering high defect tolerance, low threshold, low temperature variation, and high feedback insensitivity. Yet a monolithic integration technique combining epitaxial quantum dot lasers with passive waveguides has not been demonstrated and is needed for complex photonic integrated circuits. We present here, for the first time to our knowledge, a monolithc offset quantum dot integration platform that permits formation of a laser cavity utilizing both the robust quantum dot active region and the versatility of passive GaAs waveguide structures. This platform is substrate agnostic and therefore compatible with the quantum dot lasers directly grown on Si. As an illustration of the potential of this platform, we designed and fabricated a 20 GHz mode-locked laser with a dispersion-engineered on-chip waveguide mirror. Due to the dispersion compensation effect of the waveguide mirror, the pulse width of the mode-locked laser is reduced by a factor of 2.8.

Zhang, Zeyu (ORCID:0000000271576272)↗

Node Monitoring as a Fault Detection Countermeasure against Information Leakage within a RISC-V Microprocessor

Advanced, superscalar microprocessors (μP) are highly susceptible to wear-out failures because of their highly complex, densely packed circuit structure and extreme operational frequencies. Although many types of fault detection and mitigation strategies have been proposed, none have addressed the specific problem of detecting faults that lead to information leakage events on I/O channels of the μP. Information leakage can be defined very generally as any type of output that the executing program did not intend to produce. In this work, we restrict this definition to output that represents a security concern, and in particular, to the leakage of plaintext or encryption keys, and propose a counter-based countermeasure to detect faults that cause this type of leakage event. Fault injection (FI) experiments are carried out on two RISC-V microprocessors emulated as soft cores on a Xilinx multi-processor System-on-chip (MPSoC) FPGA. The μP designs are instrumented with a set of counters that records the number of transitions that occur on internal nodes. The transition counts are collected from all internal nodes under both fault-free and faulty conditions, and are analyzed to determine which counters provide the highest fault coverage and lowest latency for detecting leakage faults. We show that complete coverage of all leakage faults is possible using only a single counter strategically placed within the branch compare logic of the μPs.

42 ENGINEERING↗

Fast multipliers

Parallel multiplier design with carry-save scheme and constructed from series integrated circuits, discussing speed, complexity and cost

Habibi, A.↗

CMOS bulk-metal design handbook

User's guide describes techniques for generating precision mask artwork for complex CMOS integrated circuits, starting from logic diagram. Techniques are based on standard-cell approach. Guide also includes user guidelines for designing efficient CMOS arrays.

Edge, T. M.↗

Ignitor plug erosion and arc initiation processes in a one-millipound pulsed plasma thruster

The results are presented of a one-millipound pulsed plasma ignition system study. The preliminary data indicate that inductively coupling the ignition plug cathode to the thruster cathode is more beneficial to ignitor plug longevity than resistive coupling. These benefits arise from the ability of the coupling conductor to control the build-up of a carbonaceous deposit on the plug face. The deposit build-up is a strong function of the peak coupling current experienced during thruster operation. The relationship between the ignitor plug discharge and thruster discharge is shown to be very complex with equivalent circuit elements which are dynamic in nature. A preliminary representation of this equivalent circuit is developed.

Aston, G.↗

Whole-cell biocomputing

The ability to manipulate systems on the molecular scale naturally leads to speculation about the rational design of molecular-scale machines. Cells might be the ultimate molecular-scale machines and our ability to engineer them is relatively advanced when compared with our ability to control the synthesis and direct the assembly of man-made materials. Indeed, engineered whole cells deployed in biosensors can be considered one of the practical successes of molecular-scale devices. However, these devices explore only a small portion of cellular functionality. Individual cells or self-organized groups of cells perform extremely complex functions that include sensing, communication, navigation, cooperation and even fabrication of synthetic nanoscopic materials. In natural systems, these capabilities are controlled by complex genetic regulatory circuits, which are only partially understood and not readily accessible for use in engineered systems. Here, we focus on efforts to mimic the functionality of man-made information-processing systems within whole cells.

Non-NASA Center↗