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At least 127 records · Page 7

Field Effect Transistor Behavior in Electrospun Polyaniline/Polyethylene Oxide Demonstrated

Novel transistors and logic devices based on nanotechnology concepts are under intense development. The potential for ultra-low-power circuitry makes nanotechnology attractive for applications such as digital electronics and sensors. For NASA applications, nanotechnology offers tremendous opportunities for increased onboard data processing, and thus autonomous decisionmaking ability, and novel sensors that detect and respond to environmental stimuli with little oversight requirements. Polyaniline/polyethylene oxide (PANi/PEO) nanofibers are of interest because they have electrical conductivities that can be changed from insulating to metallic by varying the doping levels and conformations of the polymer chain. At the NASA Glenn Research Center, we have observed field effect transistor (FET) behavior in electrospun PANi/PEO nanofibers doped with camphorsulfonic acid. The nanofibers were deposited onto Au electrodes, which had been prepatterned onto oxidized silicon substrates. The preceding scanning electron image shows the device used in the transistor measurements. Saturation channel currents are observed at surprisingly low source/drain voltages (see the following graph). The hole mobility in the depletion regime is 1.4x10(exp -4)sq cm/V sec, whereas the one-dimensional charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx.10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating one-dimensional polymer FET's.

Mueller, Carl H.↗

Ferroelectric Material Application: Modeling Ferroelectric Field Effect Transistor Characteristics from Micro to Nano

All present ferroelectric transistors have been made on the micrometer scale. Existing models of these devices do not take into account effects of nanoscale ferroelectric transistors. Understanding the characteristics of these nanoscale devices is important in developing a strategy for building and using future devices. This paper takes an existing microscale ferroelectric field effect transistor (FFET) model and adds effects that become important at a nanoscale level, including electron velocity saturation and direct tunneling. The new model analyzed FFETs ranging in length from 40,000 nanometers to 4 nanometers and ferroelectric thickness form 200 nanometers to 1 nanometer. The results show that FFETs can operate on the nanoscale but have some undesirable characteristics at very small dimensions.

MacLeod, Todd, C.↗

Experimental Analysis of Proton-Induced Displacement and Ionization Damage Using Gate-Controlled Lateral PNP Bipolar Transistors

The electrical characteristics of proton-irradiated bipolar transistors are affected by ionization damage to the insulating oxide and displacement damage to the semiconductor bulk. While both types of damage degrade the transistor, it is important to understand the mechanisms individually and to be able to analyze them separately. In this paper, a method for analyzing the effects of ionization and displacement damage using gate-controlled lateral PNP bipolar junction transistors is described. This technique allows the effects of oxide charge, surface recombination velocity, and bulk traps to be measured independently.

Ball, D. R.↗

Pass-transistor very large scale integration

Logic elements are provided that permit reductions in layout size and avoidance of hazards. Such logic elements may be included in libraries of logic cells. A logical function to be implemented by the logic element is decomposed about logical variables to identify factors corresponding to combinations of the logical variables and their complements. A pass transistor network is provided for implementing the pass network function in accordance with this decomposition. The pass transistor network includes ordered arrangements of pass transistors that correspond to the combinations of variables and complements resulting from the logical decomposition. The logic elements may act as selection circuits and be integrated with memory and buffer elements.

Maki, Gary K.↗

Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis

There has been considerable research investigating the Ferroelectric Field-Effect Transistor (FeFET) in memory circuits. However, very little research has been performed in applying the FeFET to analog circuits. This paper investigates the use of FeFETs in a common analog circuit, the differential amplifier. The two input Metal-Oxide-Semiconductor (MOS) transistors in a general MOS differential amplifier circuit are replaced with FeFETs. Resistors are used in place of the other three MOS transistors. The FeFET model used in the analysis has been previously reported and was based on experimental device data. Because of the FeFET hysteresis, the FeFET differential amplifier has four different operating modes depending on whether the FeFETs are positively or negatively polarized. The FeFET differential amplifier operation in the different modes was analyzed by calculating the amplifier voltage transfer and gain characteristics shown in figures 2 through 5. Comparisons were made between the FeFET differential amplifier and the standard MOS differential amplifier. Possible applications and benefits of the FeFET differential amplifier are discussed.

Phillips, Thomas A.↗

SiC JFET Transistor Circuit Model for Extreme Temperature Range

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

Neudeck, Philip G.↗

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

The NASA Glenn Research Center is developing very high temperature semiconductor integrated circuits (ICs) for use in the hot sections of aircraft engines and for Venus exploration where ambient temperatures are well above the approximately 300 degrees Centigrade effective limit of silicon-on-insulator IC technology. In order for beneficial technology insertion to occur, such transistor ICs must be capable of prolonged operation in such harsh environments. This paper reports on the fabrication and long-term 500 degrees Centigrade operation of 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs have now demonstrated thousands of hours of continuous 500 degrees Centigrade operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Electrical characterization and modeling of transistors and circuits at temperatures from 24 degrees Centigrade to 500 degrees Centigrade is also described. Desired analog and digital IC functionality spanning this temperature range was demonstrated without changing the input signals or power supply voltages.

Neudeck, Philip G.↗

Extreme Temperature Performance of Automotive-Grade Small Signal Bipolar Junction Transistors

Electronics designed for space exploration missions must display efficient and reliable operation under extreme temperature conditions. For example, lunar outposts, Mars rovers and landers, James Webb Space Telescope, Europa orbiter, and deep space probes represent examples of missions where extreme temperatures and thermal cycling are encountered. Switching transistors, small signal as well as power level devices, are widely used in electronic controllers, data instrumentation, and power management and distribution systems. Little is known, however, about their performance in extreme temperature environments beyond their specified operating range; in particular under cryogenic conditions. This report summarizes preliminary results obtained on the evaluation of commercial-off-the-shelf (COTS) automotive-grade NPN small signal transistors over a wide temperature range and thermal cycling. The investigations were carried out to establish a baseline on functionality of these transistors and to determine suitability for use outside their recommended temperature limits.

Thermal Cycling↗

The organic redox transistor for neuromorphic computing

Inspired by the in-memory computing architectures of biological systems, neuromorphic computing using crossbar arrays of artificial synapses based on non-volatile memory (NVM) devices with variable conductances has emerged as a new paradigm to enable massively parallel and ultra-low power computing hardware for data centric applications. Although inference has been demonstrated successfully using crossbars based on a variety of NMV technologies, efficient learning and scaling to large arrays (>10 6 elements) remains a challenge due to the synaptic elements' non-ideal electrical characteristics which degrades ANN accuracy. A further challenge is that in the conductive state memristors draw large currents >μA resulting in significant voltage drops in the interconnect wires and increased probability of failure in scaled arrays. We suggest the organic polymer redox transistor (RT) is an alternate approach that could solve many of these challenges, enabling both inference and parallel outer product updates, as recently demonstrated by Fuller et al. An RT consists of redox-active channel and gate electrodes in contact with a liquid or solid electrolyte. lon insertion through the electrolyte controls the channel electronic conductivity, while electron transfer through an external circuit maintains overall charge neutrality. Unlike a rechargeable battery, in the RT the voltage built-up across the electrolyte is kept to a minimum (typically <100 mV) by using the same material for the gate and channel. Elimination of the voltage offset simplifies integration of the RT into programmable arrays by enabling the use of various selectors. RTs based on inorganic and organic materials have been recently demonstrated with conductance tuning occurring at potentials of just a few mV and hundreds to thousands of linearly and symmetrically programmable conductance states, enabling near ideal accuracy in neural network simulations. Introduced in the 1980's, redox transistors with metallic gate electrodes and organic channel materials, also known as organic electrochemical transistors (OECTs), have been explored for a variety of applications such as chem- and bio-sensing, neural interfaces, and low cost printed circuits. A typical channel material for OECTs is the conducting polymer poly(3,4-ethylenedioxythiophene) doped with poly(styrene sulfonate) (PEDOT:PSS). PEDOT is a p-type semiconducting polymer with mobile positively charged polarons that hop chain-to-chain.

Talin, Albert Alec↗

Steep slope transistors with threshold switching devices

A steep-slope (SS) field effect transistor (FET) including a FET having a source region and a drain region, and a threshold switching device in direct contact with the source region or the drain region of the FET. Fabricating the steep-slope (SS) field effect transistor (FET) includes fabricating an AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) having a source region and a drain region, depositing a first electrode layer directly on the source region or the drain region, depositing a threshold switching layer directly on the first electrode layer, and depositing a second electrode layer directly on the threshold switching layer.

Huang, Xuanqi↗

A Semiconducting Two‐Dimensional Polymer as an Organic Electrochemical Transistor Active Layer

Abstract Organic electrochemical transistors (OECTs) are devices with broad potential in bioelectronic sensing, circuits, and neuromorphic hardware. Their unique properties arise from the use of organic mixed ionic/electronic conductors (OMIECs) as the active channel. Typical OMIECs are linear polymers, where defined and controlled microstructure/morphology, and reliable characterization of transport and charging can be elusive. Semiconducting two‐dimensional polymers (2DPs) present a new avenue in OMIEC materials development, enabling electronic transport along with precise control of well‐defined channels ideal for ion transport/intercalation. To this end, a recently reported 2DP, TIIP, is synthesized and patterned at 10 µm resolution as the channel of a transistor. The TIIP films demonstrate textured microstructure and show semiconducting properties with accessible oxidation states. Operating in an aqueous electrolyte, the 2DP‐OECT exhibits a device‐scale hole mobility of 0.05 cm 2 V –1 s –1 and a µ C * figure of merit of 1.75 F cm –1 V –1 s –1 . 2DP OMIECs thus offer new synthetic degrees of freedom to control OECT performance and may enable additional opportunities such as ion selectivity or improved stability through reduced morphological modulation during device operation.

2D-polymer↗

Organic Electrochemical Transistor Channel Materials: Copolymerization Versus Physical Mixing of Glycolated and Alkoxylated Polymers

Organic electrochemical transistors (OECTs) feature a polymer channel capable of conducting both ions and electronic charges. The choice of the channel material is critical for OECT performance. Many efforts have focused on improving performance via the chemical tunability of conjugated polymers – through backbone, side chain, and molar mass engineering – leading to useful design principles for accumulation-mode OECT materials. However, tuning the chemical structure of conjugated polymers often requires time-consuming optimization of the synthesis route. Meanwhile, variations in molar mass, dispersity, structural defects, and metal content present challenges when attempting to analyze the detailed effects of structural modifications, as multiple performance-determining factors are often (unintentionally) changed at the same time. Therefore, this study explores blended channel materials obtained by physically mixing glycolated and alkoxylated polymers in different ratios, and compares their OECT performance with the corresponding statistical copolymers. It is shown that mixing two well-performing materials creates blends that enable rational tuning of the transistor properties without compromising on performance. Thus, channels based on blends of alkoxylated and glycolated polymers hold promise for OECT technology with tailored response, as only two materials are needed to achieve any desired side chain ratio, simplifying the optimization of OECT characteristics.

copolymerization↗

Al‐Rich AlGaN Transistors with Regrown p‐AlGaN Gate Layers and Ohmic Contacts

Abstract Epitaxial regrowth processes are presented for achieving Al‐rich aluminum gallium nitride (AlGaN) high electron mobility transistor (HEMTs) with p‐type gates with large, positive threshold voltage for enhancement mode operation and low resistance Ohmic contacts. Utilizing a deep gate recess etch into the channel and an epitaxial regrown p‐AlGaN gate structure, an Al 0.85 Ga 0.15 N barrier/Al 0.50 Ga 0.50 N channel HEMT with a large positive threshold voltage (V TH = +3.5 V) and negligible gate leakage is demonstrated. Epitaxial regrowth of AlGaN avoids the use of gate insulators which can suffer from charge trapping effects observed in typical dielectric layers deposited on AlGaN. Low resistance Ohmic contacts (minimum specific contact resistance = 4 × 10 −6 Ω cm 2 , average = 1.8 × 10 −4 Ω cm 2 ) are demonstrated in an Al 0.85 Ga 0.15 N barrier/Al 0.68 Ga 0.32 N channel HEMT by employing epitaxial regrowth of a heavily doped, n‐type, reverse compositionally graded epitaxial structure. The combination of low‐leakage, large positive threshold p‐gates and low resistance Ohmic contacts by the described regrowth processes provide a pathway to realizing high‐current, enhancement‐mode, Al‐rich AlGaN‐based ultra‐wide bandgap transistors.

36 MATERIALS SCIENCE↗

Tunable 3D Aerosol Jet Printing of Low‐Power Redox‐Gated Transistors with Multicomponent Inks

Printed hybrid electronics (PHE) offer a promising alternative for microelectronics fabrication, addressing some limitations of traditional subtractive manufacturing. Despite the versatility of PHE, particularly in the customization of printing inks, these devices have not yet matched the performance of silicon-based electronics due to challenges in gating mechanisms and operational stability. However, the potential of low-voltage redox-gating to achieve significant carrier modulations in correlated metal oxides remains unexplored in PHE. This study systematically investigates vanadium dioxide (VO 2 ) nanoparticles and redox inks, linking their organization in solution to their morphology, phase state, and properties in solid films and multilayered structures. Using an aerosol jet printer (AJP), a solid-state VO 2 transistor is fabricated, operating at just 0.4 V gating voltage. The printed VO 2 films demonstrate redox-modulated conductivity and consistent transistor behavior. The solid-state redox gating materials also provide long-term stability, with the device maintaining performance over 6000 cycles without degradation. These results highlight the potential of redox gating to enhance the application of functional nanoparticles in printed hybrid microelectronics, especially for flexible, low-voltage, and energy-efficient devices.

36 MATERIALS SCIENCE↗

Biomaterial–Based Solid–Electrolyte Organic Electrochemical Transistors for Electronic and Neuromorphic Applications

In this work a systematic study of biomaterial–based solid–state organic electrochemical transistors (OECTs) is presented in which biogels consisting of gelatin and glycerol, two food–grade materials, are chosen as the model solid electrolyte. Such gels are fundamentally attractive for bioelectronics and wearable applications due to their superior and tunable electrical and mechanical properties, which allow one to fabricate solid–state organic transistors with high ON/OFF ratio and transconductance, possible millisecond–switching speed, and 6–month stability in ambient air. Next, the authors show a good control of the state–retention property of biogel OECTs, demonstrated herein by employing them as artificial synapses with various synaptic functions, such as frequency–based short–term plasticity. This study herein paves the way for the development of biomaterial–based electronics by providing guiding principles for future works that employ biomaterials in OECTs.

36 MATERIALS SCIENCE↗

Benzimidazolone-Dioxazine Pigments-Based Conjugated Polymers for Organic Field-Effect Transistor

Molecules based on benzimidazolone-dioxazine are known as blue/violet pigments and have been commercialized for decades. However, unfavorable solubility limits the application of these structures as building blocks of conjugated polymers despite their low band gaps. Herein, a series of donor–acceptor conjugated polymers containing soluble benzimidazolone-dioxazine structures as the acceptors and oligothiophene as donors are synthesized and investigated. With increasing numbers of thiophene rings, the steric hindrance diminishes and high molecular weight polymers can be achieved, leading to an improved performance in organic field effect transistor devices. The hole mobility of polymers with three to six thiophene units is in the order of 10 -1 cm2 V -1 s -1 . Among all the polymers, polymer P3 with three thiophene units between benzimidazolone-dioxazine structures shows the best hole mobility of 0.4 cm2 V -1 s -1 . Grazing-incidence wide-angle X-ray scattering results reveal that the high mobility of organic field-effect transistors (OFETs) can be accredited by matched donor–acceptor packing in the solid thin films.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Evaluation of the DC bus link capacitors and power transistor modules in the qualification testing of PV inverters

To achieve useful, fair, and cost-effective design qualification and type approval testing for PV inverters, two procedures were developed and demonstrated to evaluate the bus link capacitors and power transistor—and where applicable, its module—for long-term reliability. We evaluate the inverter under simulated use conditions with heat run tests to find the highest operating temperatures reached by these components. The procedures are demonstrated in this study with a 4-kVA class string inverter. The maximum temperature of the DC bus link capacitors was determined to be 76.4°C when the ambient temperature was at the inverter's maximum rated temperature of 60°C with derating occurring. On the other hand, the power transistor module's maximum temperature using the heat sink temperature as the index, 92.6°C, occurred in an ambient of 40.8°C when derating was not occurring. The conditions found for upper temperatures exhibited by these components are, respectively, proposed for implementation in the dry heat and thermal cycling tests in the IEC 62093 “Power conversion equipment for photovoltaic systems – Design qualification testing” international standard draft so that the levels applied in the tests are in proportion to those experienced in the field. Finally as a result, fairer evaluation of inverter reliability is realized.

14 SOLAR ENERGY↗

Heavy ion irradiation effects on GaN/AlGaN high electron mobility transistor failure at off-state

We investigate the effects of ion irradiation on AlGaN/GaN high electron mobility electron transistors using in-situ transmission electron microscopy. The experiments are performed inside the microscope to visualize the defects, microstructure and interfaces of ion irradiated transistors during operation and failure. Here, experimental results indicate that heavy ions such as Au 4+ can create a significant number of defects such as vacancies, interstitials and dislocations in the device layer. It is hypothesized that these defects act as charge traps in the device layer and the resulting charge accumulation lowers the breakdown voltage. Sequential energy dispersive X-ray spectroscopy mapping allows us to track individual chemical elements during the experiment, and the results suggest that the electrical degradation in the device layer may originate from oxygen and nitrogen vacancies.

36 MATERIALS SCIENCE↗