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At least 127 records · Page 7

CCSDS Reed Solomon VLSI chip set

A highly efficient error correcting code has been selected by NASA as a CCSDS standard: the 16 symbol error correcting Reed Solomon code. A VLSI implementation of this decoder is described in this paper. A total of 4 full custom VLSI chips are needed that correct data in real time at an sustained rate of up to 80 Mbits/second.

Cameron, K.↗

Reed Solomon error correction for the space telescope

This paper reports a single 8.2mm by 8.4mm, 200,000 transistor CMOS chip implementation of the Reed Solomon code required by the Space Telescope. The chip features a 10 MHz sustained byte rate independent of error pattern. The 1.6 micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes as well as shortened codes are supported with no external buffering. Erasure corrections as well as random error corrections are supported with programmable corrections of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors.

Whitaker, S.↗

An extended Reed Solomon decoder design

It has previously been shown that the Reed-Solomon (RS) codes can correct errors beyond the Singleton and Rieger Bounds with an arbitrarily small probability of a miscorrect. That is, an (n,k) RS code can correct more than (n-k)/2 errors. An implementation of such an RS decoder is presented in this paper. An existing RS decoder, the AHA4010, is utilized in this work. This decoder is especially useful for errors which are patterned with a long burst plus some random errors.

Chen, J.↗

Space Qualified High Speed Reed Solomon Encoder

This paper reports a Class S CCSDS recommendation Reed Solomon encoder circuit baselined for several NASA programs. The chip is fabricated using United Technologies Microelectronics Center's UTE-R radiation-hardened gate array family, contains 64,000 p-n transistor pairs, and operates at a sustained output data rate of 200 MBits/s. The chip features a pin selectable message interleave depth of from 1 to 8 and supports output block lengths of 33 to 255 bytes. The UTE-R process is reported to produce parts that are radiation hardened to 16 Rads (Si) total dose and 1.0(exp -10) errors/bit-day.

Gambles, Jody W.↗

Schematic driven layout of Reed Solomon encoders

Two Reed Solomon error correcting encoders are presented. Schematic driven layout tools were used to create the encoder layouts. Special consideration had to be given to the architecture and logic to provide scalability of the encoder designs. Knowledge gained from these projects was used to create a more flexible schematic driven layout system.

Arave, Kari↗

Joint Synchronization Of Viterbi And Reed-Solomon Decoders

Synchronization times reduced to reduce loss of data. Scheme for decoding received doubly encoded binary-data signal provides for joint synchronization of two decoders. Applies to concatenated error-correcting channel coding communication system in which, at transmitter, data first encoded by interleaved Reed-Solomon code (block code), then by convolutional code.

Statman, Joseph I.↗

Evaluation of an Ultra-Low Power Reed Solomon Encoder for NASA's Space Technology 5 Mission

Radiation test results and analyses are presented for ultra-low power Reed Solomon encoder circuits that are being considered for use on the Space Technology 5 (ST5) mission. The total ionizing dose tolerance is in excess of 100 krad(Si) and is due to the low supply voltage and the use of back-bias, which suppresses radiation-induced leakage currents in the n-channel devices. The circuits do not latch-up for ion LET values of at least 90 MeV-sq cm/mg. A hardened-by-design approach to SEU has achieved an upset threshold of about 20 MeV-sq cm/mg. The SEU rate expected for these circuits in the geosynchronous transfer orbit of ST5 is low.

Lei, K. E.↗

Variable-Aperture Reciprocating Reed Valve

A variable-aperture reciprocating reed valve includes a valve body defining a through hole region having a contoured-profile portion. A semi-rigid plate is affixed on one side thereof to the valve body to define a cantilever extending across the through hole region. At least one free edge of the cantilever opposes the contoured-profile portion of the through hole region in a non-contact relationship.

Lindner, Jeffrey L.↗

Fast Transform Decoding Of Nonsystematic Reed-Solomon Codes

Fast, efficient Fermat number transform used to compute F'(x) analogous to computation of syndrome in conventional decoding scheme. Eliminates polynomial multiplications and reduces number of multiplications in reconstruction of F'(x) to n log (n). Euclidean algorithm used to evaluate F(x) directly, without going through intermediate steps of solving error-locator and error-evaluator polynomials. Algorithm suitable for implementation in very-large-scale integrated circuits.

Truong, Trieu-Kie↗

Reed-Solomon Codes and the Exploration of the Solar System

The exploration of the solar system by unmanned spacecraft is one of the triumph of the 20th century. The dramatic photographs of Mercury, Venus, Mars, Jupiter, Saturn, Uranus, and Neptune transmitted by spacecraft with romantic names like Mariner, Voyager, Viking, etc. over distances of hundreds of millions, even billions, of miles, have made these planets, which were previously known to us only as fuzzy telescopic images in textbooks, as real to us in the 1990's as, say, the Himalayas, the Sahara Desert, or Antarctica.

Reed-Solomon coding↗

Interleaving of Reed-Solomon Viterbi concatenated coding channel

Two interleaving schemes are presented for R-S Viterbi concatenated coding channels and several R-S code array synchronization configurations are investigated. A procedure for obtaining synchronization sequences for the R-S code array under specified conditions is developed and used to identify sequences with desirable properties. The two interleaving schemes are found to be comparable in terms of array synchronization.

Chu, C.↗

Performance of an optical relay satellite using Reed-Solomon coding over a cascaded optical PPM and BPSK channel

The nature of the optical/microwave interface aboard the relay satellite is considered. To allow for the maximum system flexibility, without overburdening either the optical or RF channel, demodulating the optical on board the relay satellite but leaving the optical channel decoding to be performed at the ground station is examined. The occurrence of erasures in the optical channel is treated. A hard decision on the erasure (i.e., the relay selecting a symbol at random in case of erasure occurrence) seriously degrades the performance of the overall system. Coding the erasure occurrences at the relay and transmitting this information via an extra bit to the ground station where it can be used by the decoder is suggested. Many examples with varying bit/photon energy efficiency and for the noisy and noiseless optical channel are considered. It is shown that coding the erasure occurrences dramatically improves the performance of the cascaded channel relative to the case of hard decision on the erasure by the relay.

Divsalar, D.↗

Real-Time Reed-Solomon Decoder

RS decoder uses dedicated hardware and data pipelining for high-speed operation. Parallel processing techniques provide equivalent of over one billion operations per second at one step in decoding. Decoder finds commercial application in data encoding/decoding, telemetry, and radio communications.

Lahmeyer, C. R.↗

Reed-Switch Position Indicator

Indicator for valves or other control mechanisms easy to mount, reliable, and explosion proof. Replaces slidewires expensive and difficult to mount. Used in hazardous areas that require nonexplosive electrical contacts, and controlling highly flammable fuels. Readily adapted to oil-refining and other chemical processing plants.

Winner, F. E.↗

Systolic VLSI Reed-Solomon Decoder

Decoder for digital communications provides high-speed, pipelined ReedSolomon (RS) error-correction decoding of data streams. Principal new feature of proposed decoder is modification of Euclid greatest-common-divisor algorithm to avoid need for time-consuming computations of inverse of certain Galois-field quantities. Decoder architecture suitable for implementation on very-large-scale integrated (VLSI) chips with negative-channel metaloxide/silicon circuitry.

Shao, H. M.↗

The undetected error probability for Reed-Solomon codes

McEliece and Swanson (1986) offered an upper bound on P(E)u, the decoder error probability given u symbol errors occur. In the present study, by using a combinatoric technique such as the principle of inclusion and exclusion, an exact formula for P(E)u is derived. The P(E)u of a maximum distance separable code is observed to approach Q rapidly as u gets large, where Q is the probability that a completely random error pattern will cause decoder error. An upper bound for the expansion P(E)u/Q - 1 is derived, and is shown to decrease nearly exponentially as u increases. This proves analytically that P(E)u indeed approaches Q as u becomes large, and that some laws of large number come into play.

Cheung, Kar-Ming↗