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126 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS2000

Optimization of Microelectronic Devices for Sensor Applications

The NASA/JPL goal to reduce payload in future space missions while increasing mission capability demands miniaturization of active and passive sensors, analytical instruments and communication systems among others. Currently, typical system requirements include the detection of particular spectral lines, associated data processing, and communication of the acquired data to other systems. Advances in lithography and deposition methods result in more advanced devices for space application, while the sub-micron resolution currently available opens a vast design space. Though an experimental exploration of this widening design space-searching for optimized performance by repeated fabrication efforts-is unfeasible, it does motivate the development of reliable software design tools. These tools necessitate models based on fundamental physics and mathematics of the device to accurately model effects such as diffraction and scattering in opto-electronic devices, or bandstructure and scattering in heterostructure devices. The software tools must have convenient turn-around times and interfaces that allow effective usage. The first issue is addressed by the application of high-performance computers and the second by the development of graphical user interfaces driven by properly developed data structures. These tools can then be integrated into an optimization environment, and with the available memory capacity and computational speed of high performance parallel platforms, simulation of optimized components can proceed. In this paper, specific applications of the electromagnetic modeling of infrared filtering, as well as heterostructure device design will be presented using genetic algorithm global optimization methods.

Cwik, Tom↗
NASA NTRS2008

IR DirectFET Extreme Environments Evaluation Final Report

In 2007, International Rectifier (IR) introduced a new version of its DirectFET metal oxide semiconductor field effect transistor (MOSFET) packaging. The new version (referred to as 'Version 2') enhances device moisture resistance, makes surface mount (SMT) assembly of these devices to printed wiring boards (PWBs) more repeatable, and subsequent assembly inspection simpler. In the present study, the National Aeronautics Space Administration (NASA) Jet Propulsion Laboratory (JPL), in collaboration with Stellar Microelectronics (Stellar), continued an evaluation of the DirectFET that they started together in 2006. The present study focused on comparing the two versions of the DirectFET and examining the suitability of the DirectFET devices for space applications. This study evaluated both versions of two DirectFET packaged devices that had both been shown in the 2006 study to have the best electrical and thermal properties: the IRF6635 and IRF6644. The present study evaluated (1) the relative electrical and thermal performance of both versions of each device, (2) the performance through high reliability testing, and (3) the performance of these devices in combination with a range of alternate solder alloys in the extreme thermal environments of deep space....

electronic parts packaging↗
NASA NTRS2013

BOK-Printed Electronics

The use of printed electronics technologies (PETs), 2D or 3D printing approaches either by conventional electronic fabrication or by rapid graphic printing of organic or nonorganic electronic devices on various small or large rigid or flexible substrates, is projected to grow exponentially in commercial industry. This has provided an opportunity to determine whether or not PETs could be applicable for low volume and high-reliability applications. This report presents a summary of literature surveyed and provides a body of knowledge (BOK) gathered on the current status of organic and printed electronics technologies. It reviews three key industry roadmaps- on this subject-OE-A, ITRS, and iNEMI-each with a different name identification for this emerging technology. This followed by a brief review of the status of the industry on standard development for this technology, including IEEE and IPC specifications. The report concludes with key technologies and applications and provides a technology hierarchy similar to those of conventional microelectronics for electronics packaging. Understanding key technology roadmaps, parameters, and applications is important when judicially selecting and narrowing the follow-up of new and emerging applicable technologies for evaluation, as well as the low risk insertion of organic, large area, and printed electronics.

Ghaffarian, Reza↗
NASA NTRS2011

Optimization of Indium Bump Morphology for Improved Flip Chip Devices

Flip-chip hybridization, also known as bump bonding, is a packaging technique for microelectronic devices that directly connects an active element or detector to a substrate readout face-to-face, eliminating the need for wire bonding. In order to make conductive links between the two parts, a solder material is used between the bond pads on each side. Solder bumps, composed of indium metal, are typically deposited by thermal evaporation onto the active regions of the device and substrate. While indium bump technology has been a part of the electronic interconnect process field for many years and has been extensively employed in the infrared imager industry, obtaining a reliable, high-yield process for high-density patterns of bumps can be quite difficult. Under the right conditions, a moderate hydrogen plasma exposure can raise the temperature of the indium bump to the point where it can flow. This flow can result in a desirable shape where indium will efficiently wet the metal contact pad to provide good electrical contact to the underlying readout or imager circuit. However, it is extremely important to carefully control this process as the intensity of the hydrogen plasma treatment dramatically affects the indium bump morphology. To ensure the fine-tuning of this reflow process, it is necessary to have realtime feedback on the status of the bumps. With an appropriately placed viewport in a plasma chamber, one can image a small field (a square of approximately 5 millimeters on each side) of the bumps (10-20 microns in size) during the hydrogen plasma reflow process. By monitoring the shape of the bumps in real time using a video camera mounted to a telescoping 12 magnifying zoom lens and associated optical elements, an engineer can precisely determine when the reflow of the bumps has occurred, and can shut off the plasma before evaporation or de-wetting takes place.

Jones, Todd J.↗
NASA NTRS1999

Space Adaptation of Active Mirror Segment Concepts

This report summarizes the results of a three year effort by Blue Line Engineering Co. to advance the state of segmented mirror systems in several separate but related areas. The initial set of tasks were designed to address the issues of system level architecture, digital processing system, cluster level support structures, and advanced mirror fabrication concepts. Later in the project new tasks were added to provide support to the existing segmented mirror testbed at Marshall Space Flight Center (MSFC) in the form of upgrades to the 36 subaperture wavefront sensor. Still later, tasks were added to build and install a new system processor based on the results of the new system architecture. The project was successful in achieving a number of important results. These include the following most notable accomplishments: 1) The creation of a new modular digital processing system that is extremely capable and may be applied to a wide range of segmented mirror systems as well as many classes of Multiple Input Multiple Output (MIMO) control systems such as active structures or industrial automation. 2) A new graphical user interface was created for operation of segmented mirror systems. 3) The development of a high bit rate serial data loop that permits bi-directional flow of data to and from as many as 39 segments daisy-chained to form a single cluster of segments. 4) Upgrade of the 36 subaperture Hartmann type Wave Front Sensor (WFS) of the Phased Array Mirror, Extendible Large Aperture (PAMELA) testbed at MSFC resulting in a 40 to 5OX improvement in SNR which in turn enabled NASA personnel to achieve many significant strides in improved closed-loop system operation in 1998. 5) A new system level processor was built and delivered to MSFC for use with the PAMELA testbed. This new system featured a new graphical user interface to replace the obsolete and non-supported menu system originally delivered with the PAMELA system. The hardware featured Blue Line's new stackable processing system which included fiber optic data links, a WFS digital interface, and a very compact and reliable electronics package. The project also resulted in substantial advances in the evolution of concepts for integrated structures to be used to support clusters of segments while also serving as the means to distribute power, timing, and data communications resources. A prototype cluster base was built and delivered that would support a small array of 7 cm mirror segments. Another conceptual design effort led to substantial progress in the area of laminated silicon mirror segments. While finished mirrors were never successfully produced in this exploratory effort, the basic feasibility of the concept was established through a significant amount of experimental development in microelectronics processing laboratories at the University of Colorado in Colorado Springs. Ultimately lightweighted aluminum mirrors with replicated front surfaces were produced and delivered as part of a separate contract to develop integrated segmented mirror assemblies. Overall the project was very successful in advancing segmented mirror system architectures on several fronts. In fact, the results of this work have already served as the basic foundation for the system architectures of several projects proposed by Blue Line for different missions and customers. These include the NMSD and AMSD procurements for NASA's Next Generation Space Telescope, the HET figure maintenance system, and the 1 meter FAST telescope project.

Ames, Gregory H.↗
NASA NTRS1973

Design guidelines for use of adhesives in hybrid microcircuits

Although it is generally accepted that the use of adhesives in the assembly of hybrid microcircuits offers advantages over other bonding methods, there currently does not exist a set of guidelines for the selection of adhesives which will insure that hybrid microcircuits assembled with them will meet the long use-life, high-reliability requirements of electronic equipment for space applications. This study was directed to the identification of the properties of electrically insulative adhesives that potentially could cause problems in such an application, and to the development of evaluation tests to quantify these properties and thus form the basis for establishing suitable guidelines and, ultimately, specifications. Bond strength, outgassing after cure, and corrosivity were selected for detailed attention since they are considered to be especially critical. Introductory discussion includes enumeration and brief comments on the properties of adhesives considered to be important for the proposed application, a general review of polymeric types of adhesives, and identification of the major types of adhesives commercially available and specifically designed for microelectronic use. The specific tests developed to evaluate bond strength, outgassing after cure, and corrosivity are discussed in detail, and comparative results obtained for selected adhesives representative of the major types are given.

Caruso, S. V.↗
NASA NTRS2010

The Assurance Challenges of Advanced Packaging Technologies for Electronics

Advances in microelectronic parts performance are driving towards finer feature sizes, three-dimensional geometries and ever-increasing number of transistor equivalents that are resulting in increased die sizes and interconnection (I/O) counts. The resultant packaging necessary to provide assemble-ability, environmental protection, testability and interconnection to the circuit board for the active die creates major challenges, particularly for space applications, Traditionally, NASA has used hermetically packaged microcircuits whenever available but the new demands make hermetic packaging less and less practical at the same time as more and more expensive, Some part types of great interest to NASA designers are currently only available in non-hermetic packaging. It is a far more complex quality and reliability assurance challenge to gain confidence in the long-term survivability and effectiveness of nonhermetic packages than for hermetic ones. Although they may provide more rugged environmental protection than the familiar Plastic Encapsulated Microcircuits (PEMs), the non-hermetic Ceramic Column Grid Array (CCGA) packages that are the focus of this presentation present a unique combination of challenges to assessing their suitability for spaceflight use. The presentation will discuss the bases for these challenges, some examples of the techniques proposed to mitigate them and a proposed approach to a US MIL specification Class for non-hermetic microcircuits suitable for space application, Class Y, to be incorporated into M. IL-PRF-38535. It has recently emerged that some major packaging suppliers are offering hermetic area array packages that may offer alternatives to the nonhermetic CCGA styles but have also got their own inspectability and testability issues which will be briefly discussed in the presentation,

Sampson, Michael J.↗
NASA NTRS2000

Evaluation of Thermo-Mechanical Stability of COTS Dual-Axis MEMS Accelerometers for Space Applications

Microelectromechanical systems in MEMS is one of the fastest growing technologies in microelectronics, and is of great interest for military and aerospace applications. Accelerometers are the earliest and most developed representatives of MEMS. First demonstrated in 1979, micromachined accelerometers were used in automobile industry for air bag crash- sensing applications since 1990. In 1999, N4EMS accelerometers were used in NASA-JPL Mars Microprobe. The most developed accelerometers for airbag crash- sensing are rated for a full range of +/- 50 G. The range of sensitivity for accelerometers required for military or aerospace applications is much larger, varying from 20,000 G (to measure acceleration during gun and ballistic munition launches), and to 10(exp -6) G, when used as guidance sensors (to measure attitude and position of a spacecraft). The presence of moving parts on the surface of chip is specific to MEMS, and particularly, to accelerometers. This characteristic brings new reliability issues to micromachined accelerometers, including cyclic fatigue cracking of polysilicon cantilevers and springs, mechanical stresses that are caused by packaging and contamination in the internal cavity of the package. Studies of fatigue cracks initiation and growth in polysilicon showed that the fatigue damage may influence MEMS device performance, and the presence of water vapor significantly enhances crack initiation and growth. Environmentally induced failures, particularly, failures due to thermal cycling and mechanical shock are considered as one of major reliability concerns in MEMS. These environmental conditions are also critical for space applications of the parts. For example, the Mars pathfinder mission had experienced 80 mechanical shock events during the pyrotechnic separation processes.

Sharma, Ashok K.↗
NASA NTRS1999

Diagnostic for Plasma Enhanced Chemical Vapor Deposition and Etch Systems

In order to meet NASA's requirements for the rapid development and validation of future generation electronic devices as well as associated materials and processes, enabling technologies ion the processing of semiconductor materials arising from understanding etch chemistries are being developed through a research collaboration between Stanford University and NASA-Ames Research Center, Although a great deal of laboratory-scale research has been performed on many of materials processing plasmas, little is known about the gas-phase and surface chemical reactions that are critical in many etch and deposition processes, and how these reactions are influenced by the variation in operating conditions. In addition, many plasma-based processes suffer from stability and reliability problems leading to a compromise in performance and a potentially increased cost for the semiconductor manufacturing industry. Such a lack of understanding has hindered the development of process models that can aid in the scaling and improvement of plasma etch and deposition systems. The research described involves the study of plasmas used in semiconductor processes. An inductively coupled plasma (ICP) source in place of the standard upper electrode assembly of the Gaseous Electronics Conference (GEC) radio-frequency (RF) Reference Cell is used to investigate the discharge characteristics and chemistries. This ICP source generates plasmas with higher electron densities (approximately 10(exp 12)/cu cm) and lower operating pressures (approximately 7 mTorr) than obtainable with the original parallel-plate version of the GEC Cell. This expanded operating regime is more relevant to new generations of industrial plasma systems being used by the microelectronics industry. The motivation for this study is to develop an understanding of the physical phenomena involved in plasma processing and to measure much needed fundamental parameters, such as gas-phase and surface reaction rates. species concentration, temperature, ion energy distribution, and electron number density. A wide variety of diagnostic techniques are under development through this consortium grant to measure these parameters. including molecular beam mass spectrometry (MBMS). Fourier transform infrared (FTIR) spectroscopy, broadband ultraviolet (UV) absorption spectroscopy, a compensated Langmuir probe. Additional diagnostics. Such as microwave interferometry and microwave absorption for measurements of plasma density and radical concentrations are also planned.

Cappelli, Mark A.↗
NASA NTRS2016

Source Data Impacts on Epistemic Uncertainty for Launch Vehicle Fault Tree Models

Launch vehicle systems are designed and developed using both heritage and new hardware. Design modifications to the heritage hardware to fit new functional system requirements can impact the applicability of heritage reliability data. Risk estimates for newly designed systems must be developed from generic data sources such as commercially available reliability databases using reliability prediction methodologies, such as those addressed in MIL-HDBK-217F. Failure estimates must be converted from the generic environment to the specific operating environment of the system in which it is used. In addition, some qualification of applicability for the data source to the current system should be made. Characterizing data applicability under these circumstances is crucial to developing model estimations that support confident decisions on design changes and trade studies. This paper will demonstrate a data-source applicability classification method for suggesting epistemic component uncertainty to a target vehicle based on the source and operating environment of the originating data. The source applicability is determined using heuristic guidelines while translation of operating environments is accomplished by applying statistical methods to MIL-HDK-217F tables. The paper will provide one example for assigning environmental factors uncertainty when translating between operating environments for the microelectronic part-type components. The heuristic guidelines will be followed by uncertainty-importance routines to assess the need for more applicable data to reduce model uncertainty.

Al Hassan, Mohammad↗
NASA NTRS1997

Computational Modeling as a Design Tool in Microelectronics Manufacturing

Plans to introduce pilot lines or fabs for 300 mm processing are in progress. The IC technology is simultaneously moving towards 0.25/0.18 micron. The convergence of these two trends places unprecedented stringent demands on processes and equipments. More than ever, computational modeling is called upon to play a complementary role in equipment and process design. The pace in hardware/process development needs a matching pace in software development: an aggressive move towards developing "virtual reactors" is desirable and essential to reduce design cycle and costs. This goal has three elements: reactor scale model, feature level model, and database of physical/chemical properties. With these elements coupled, the complete model should function as a design aid in a CAD environment. This talk would aim at the description of various elements. At the reactor level, continuum, DSMC(or particle) and hybrid models will be discussed and compared using examples of plasma and thermal process simulations. In microtopography evolution, approaches such as level set methods compete with conventional geometric models. Regardless of the approach, the reliance on empricism is to be eliminated through coupling to reactor model and computational surface science. This coupling poses challenging issues of orders of magnitude variation in length and time scales. Finally, database development has fallen behind; current situation is rapidly aggravated by the ever newer chemistries emerging to meet process metrics. The virtual reactor would be a useless concept without an accompanying reliable database that consists of: thermal reaction pathways and rate constants, electron-molecule cross sections, thermochemical properties, transport properties, and finally, surface data on the interaction of radicals, atoms and ions with various surfaces. Large scale computational chemistry efforts are critical as experiments alone cannot meet database needs due to the difficulties associated with such controlled experiments and costs.

Meyyappan, Meyya↗
DOE OSTI2024

Atomic scale etching of diamond: insights from molecular dynamics simulations

Diamond is a promising material for multiple applications in quantum information processing and sensing as well as applications in microelectronics. However, diamond devices can be limited by surface defects that compromise charge stability and spin coherence, among others. Improved strategies in plasma etching of diamond could play an important role in minimizing or eliminating these defects. In this work, we explore plasma-assisted atomic scale etching of diamond using argon ions (Ar + ), hydrogen ions (H + ) and hydrogen atoms (H). We employ classical molecular dynamics (MD) simulations and test several interatomic potentials based on the Reactive Empirical Bond Order (REBO) form with comparisons to a variety of published experimental results. We performed MD simulations of low-energy hydrogen ($\leqslant$50 eV) and argon ( $\leqslant$200 eV) ion bombardment of diamond surfaces. Ar + bombardment can be used to locally smooth initially rough diamond surfaces via the formation of an amorphous C layer, the thickness of which increases with argon ion energy. Subsequent exposure with hydrogen ions (or fast neutrals) will selectively etch this amorphous C layer, leaving the underlying diamond layer mostly intact if the H energy is maintained below about 10 eV. The simulations suggest that combining Ar + smoothing with selective, near threshold energy H removal of amorphous C can be an effective strategy for diamond surface engineering, leading to more reliable and sensitive diamond color center devices.

74 ATOMIC AND MOLECULAR PHYSICS↗
NASA NTRS2015

Practical Applications of Cosmic Ray Science: Spacecraft, Aircraft, Ground-Based Computation and Control Systems, Exploration, and Human Health and Safety

In this presentation a review of galactic cosmic ray (GCR) effects on microelectronic systems and human health and safety is given. The methods used to evaluate and mitigate unwanted cosmic ray effects in ground-based, atmospheric flight, and space flight environments are also reviewed. However not all GCR effects are undesirable. We will also briefly review how observation and analysis of GCR interactions with planetary atmospheres and surfaces and reveal important compositional and geophysical data on earth and elsewhere. About 1000 GCR particles enter every square meter of Earth’s upper atmosphere every second, roughly the same number striking every square meter of the International Space Station (ISS) and every other low- Earth orbit spacecraft. GCR particles are high energy ionized atomic nuclei (90% protons, 9% alpha particles, 1% heavier nuclei) traveling very close to the speed of light. The GCR particle flux is even higher in interplanetary space because the geomagnetic field provides some limited magnetic shielding. Collisions of GCR particles with atomic nuclei in planetary atmospheres and/or regolith as well as spacecraft materials produce nuclear reactions and energetic/highly penetrating secondary particle showers. Three twentieth century technology developments have driven an ongoing evolution of basic cosmic ray science into a set of practical engineering tools needed to design, test, and verify the safety and reliability of modern complex technological systems and assess effects on human health and safety effects. The key technology developments are: 1) high altitude commercial and military aircraft; 2) manned and unmanned spacecraft; and 3) increasingly complex and sensitive solid state micro-electronics systems. Space and geophysical exploration needs drove the development of the instruments and analytical tools needed to recover compositional and structural data from GCR induced nuclear reactions and secondary particle showers. Finally, the possible role of GCR secondary particle showers in addressing an important homeland security problem, finding nuclear contraband and weapons, will be briefly reviewed.

Koontz, Steve↗
DOE OSTI2026

Interface and Thermophysical Properties of R 32 Refrigerant

Driven by the urgent demand for efficient cooling in microelectronics and advanced thermal management systems, difluoromethane (R32/CH 2 F 2 ) has emerged as a promising candidate owing to its favorable thermophysical properties, including high heat transfer efficiency and low viscosity. While bulk properties such as density, viscosity, and thermal conductivity have been widely studied, interfacial properties, including surface tension and interfacial thickness, remain comparatively underexplored, despite their importance in phase-transition dynamics. Here, we perform molecular dynamics (MD) simulations from 180 to 300 K using an optimized transferable force field for fluoropropenes with enhanced electrostatics to assess both bulk and interfacial behavior of R32. Simulations reproduced density within ±2.1%, viscosity within 3.05%, and thermal conductivity within 7.41% of NIST reference data. Heat capacities (C p and C v ) were predicted within 5%. For interfacial properties, surface tension trends were reproduced within 13.58% deviation, and the vapor–liquid coexistence curve closely matched reference data, yielding a critical temperature of 345.7 K (1.6% deviation) and a critical density of 0.397 g/cm 3 (6.4% deviation). Importantly, the vapor–liquid interface exhibited pronounced temperature-dependent broadening across the 180–290 K range. This behavior correlates with increasing molecular kinetic energy, reduction in intermolecular cohesive interactions, and a progressive loss of preferential dipole alignment, which collectively enhance thermal fluctuation amplitudes at elevated temperatures. These validated results provide predictive molecular-level insights, particularly for interfacial properties that remain less characterized. By reducing property prediction errors in key parameters such as critical temperature, this work provides reliable inputs for heat-exchanger and system models. Such correlations can support optimized component sizing, improved performance, and reduced refrigerant charge. Beyond R32, the methodology offers a transferable framework for blended and next-generation low-GWP refrigerants, contributing to sustainable thermal management aligned with the 2027 EU F-Gas regulation and 2030 Kigali Amendment.

Fluids↗
DOE OSTI2025

3D nanolithography with metalens arrays and spatially adaptive illumination

The growing demand for advanced materials, miniaturized devices and integrated microsystems calls for the reliable fabrication of complex, multiscale, three-dimensional (3D) architectures, a need increasingly addressed through light-based and laser-based processes. However, owing to the field-of-view (FOV) limitations of conventional imaging optics, existing 3D laser nanofabrication techniques face fundamental challenges in throughput, proximity error and stitching defects on the path to scaling. Here, in this study, we present a scalable 3D nanofabrication platform that uses a metalens-generated focal spot array to parallelize two-photon lithography (TPL) beyond centimetre-scale write field areas. Metalenses are ideally suited for producing submicron-scale focal spots for high-throughput nanolithography, as they uniquely feature large numerical apertures (NAs), immersion media compatibility and large-scale manufacturability. We experimentally demonstrate a printing system that uses a 12-cm 2 metalens array to produce more than 120,000 cooperative focal spots, corresponding to a throughput exceeding 10 8 voxels s −1 . By programmatically patterning the focal spot array using a spatial light modulator (SLM), an adaptive parallel printing strategy is developed for precise greyscale linewidth modulation and choreographed printing of semiperiodic and fully aperiodic 3D geometries. We demonstrate parallel printing of replicated microstructures (>50 M microparticles per day), centimetre-scale 3D architectures with feature sizes down to 113 nm, and photonic and mechanical metamaterials. This work demonstrates the potential of 3D nanolithography towards wafer-scale production, showing how TPL could be used at scale for applications in microelectronics, biomedicine, quantum technology and high-energy laser targets.

Materials science↗
NASA NTRS2000

Assessment and Assurance of Microelectronics Packaging Technology of Microelectromechanical Systems (MEMS)

Microelectromechanical systems (MEMS) have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, etc. Standard semiconductor microelectronics packaging needs the integrated circuits to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the packaging technology. In the case of MEMS the microstructures (active elements) often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it 'measures to assure the MEMS technology by lowering the risk to zero. MEMS technology has a major application in developing a microspacecraft for space systems provided assurance of MEMS technology is sufficiently addressed nondestructively. This technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's safety and mission assurance goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively by teaming-up with the other NASA centers using the limited resources available. This paper discusses the latest developments in the MEMS technology and challenging issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices based on silicon, poly-silicon, and other materials for microspacecraft applications considering the space environment and reliability assurance qualification guidelines in perspective. Acknowledgments: The above research work is supported by the NASA Electronics Parts and Packaging Program (NEPP) and performed by the Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA under a contract with the NASA - Code Q for the Office of Safety and Mission Assurance Program 323-79.

Ramesham, Rajeshuni↗
NASA NTRS1994

A combined electron beam/optical lithography process step for the fabrication of sub-half-micron-gate-length MMIC chips

Advanced radar and communication systems rely heavily on state-of-the-art microelectronics. Systems such as the phased-array radar require many transmit/receive (T/R) modules which are made up of many millimeter wave - microwave integrated circuits (MMIC's). The heart of a MMIC chip is the Gallium Arsenide (GaAs) field-effect transistor (FET). The transistor gate length is the critical feature that determines the operating frequency of the radar system. A smaller gate length will typically result in a higher frequency. In order to make a phased array radar system economically feasible, manufacturers must be capable of producing very large quantities of small-gate-length MMIC chips at a relatively low cost per chip. This requires the processing of a large number of wafers with a large number of chips per wafer, minimum processing time, and a very high chip yield. One of the bottlenecks in the fabrication of MIMIC chips is the transistor gate definition. The definition of sub-half-micron gates for GaAs-based field-effect transistors is generally performed by direct-write electron beam lithography (EBL). Because of the throughput limitations of EBL, the gate-layer fabrication is conventionally divided into two lithographic processes where EBL is used to generate the gate fingers and optical lithography is used to generate the large-area gate pads and interconnects. As a result, two complete sequences of resist application, exposure, development, metallization and lift-off are required for the entire gate structure. We have baselined a hybrid process, referred to as EBOL (electron beam/optical lithography), in which a single application of a multi-level resist is used for both exposures. The entire gate structure, (gate fingers, interconnects and pads), is then formed with a single metallization and lift-off process. The EBOL process thus retains the advantages of the high-resolution E-beam lithography and the high throughput of optical lithography while essentially eliminating an entire lithography/metallization/lift-off process sequence. This technique has been proven to be reliable for both trapezoidal and mushroom gates and has been successfully applied to metal-semiconductor and high-electron-mobility field-effect transistor (MESFET and HEMT) wafers containing devices with gate lengths down to 0.10 micron and 75 x 75 micron gate pads. The yields and throughput of these wafers have been very high with no loss in device performance. We will discuss the entire EBOL process technology including the multilayer resist structure, exposure conditions, process sensitivities, metal edge definition, device results, comparison to the standard gate-layer process, and its suitability for manufacturing.

Sewell, James S.↗