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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS2005

Advances in Single and Multijunction III-V Photovoltaics on Silicon for Space Power

A collaborative research effort at MIT, Ohio State University and NASA has resulted in the demonstration of record quality gallium arsenide (GaAs) based single junction photovoltaic devices on silicon (Si) substrates. The ability to integrate highly efficient, radiation hard III-V based devices on silicon offers the potential for dramatic reductions in cell mass (approx.2x) and increases in cell area. Both of these improvements offer the potential for dramatic reductions in the cost of on-orbit electrical power. Recently, lattice matched InGaP/GaAs and metamorphic InGaP/InGaAs dual junction solar cells were demonstrated by MBE and OMVPE, respectively. Single junction GaAs on Si devices have been integrated into a space flight experiment (MISSES), scheduled to be launched to the International Space Station in March of 2005. I-V performance data from the GaAs/Si will be collected on-orbit and telemetered to ground stations daily. Microcracks in the GaAs epitaxial material, generated because of differences in the thermal expansion coefficient between GaAs and Si, are of concern in the widely varying thermal environment encountered in low Earth orbit. Ground based thermal life cycling (-80 C to + 80 C) equivalent to 1 year in LEO has been conducted on GaAs/Si devices with no discernable degradation in device performance, suggesting that microcracks may not limit the ability to field GaAs/Si in harsh thermal environments. Recent advances in the development and testing of III-V photovoltaic devices on Si will be presented.

Wilt, David M.↗
NASA NTRS1994

Long-Wavelength Stacked SiGe/Si Heterojunction Internal Photoemission Infrared Detectors Using Multiple SiGe/Si Layers

Utilizing low temperature silicon molecular beam epitaxy (MBE) growth, long-wavelength stacked SiGe/Si heterojunction internal photoemission (HIP) infrared detectors with multiple SiGe/Si layers have been fabricated and demonstrated. Using an elemental boron source, high doping concentrations (approximately equal to 4 x 10(sup 20) cm(sup -3)) has been achieved and high crystalline quality multiple Si(sub 0.7)Ge(sub 0.3)/Si layers have been obtained. The detector structure consists of several periods of degenerately boron doped (approximately equal to 4 x 10(sup 20) cm(sup -3)) thin (less than or equal to 50 u Si(sub 0.7)Ge(sub 0.3) layers and undoped thick (approximately equal to 300u Si layers. The multiple p(sup +) - Si(sub 0.7)Ge(sub 0.3)/undoped-Si layers show strong infrared absorption in the long-wavelength regime mainly through free carrier absorption. The stacked Si(sub 0.7)Ge(sub 0.3)/Si HIP detectors with p = 4 x 10(sup 20) cm(sup -3) exhibit strong photoresponse at wavelengths ranging from 2 to 20 (micro)m with quantum efficiencies of about 4% and 1.5% at 10 and 15 (micro)m wavelengths, respectively. The detectors show near ideal thermionic-emission limited dark current characteristics.

beam epitaxy↗
NASA NTRS2006

Growth and Properties of Lattice Matched GaAsSbN Epilayer on GaAs for Solar Cell Applications

The growth and properties of GaAsSbN single quantum wells (SQWs) are investigated in this work. The heterostructures were grown on GaAs substrates in an elemental solid source molecular beam epitaxy (MBE) system assisted with a RF plasma nitrogen source. A systematic study has been carried out to determine the influence of various growth conditions, such as the growth temperature and the source shutter-opening sequence, on the quality of the grown layers and the incorporation of N and Sb. The effects of ex situ and in situ annealing under As overpressure on the optical properties of the layers have also been investigated. Substrate temperature in the range of 450-470 C was found to be optimum. Simultaneous opening of the source shutters was found to yield sharper QW interfaces. N and Sb incorporations were found to depend strongly upon substrate temperatures and source shutter opening sequences. A significant increase in PL intensity with a narrowing of PL line shape and blue shift in emission energy were observed on annealing the GaAsSbN/GaAs SQW, with in situ annealing under As overpressure providing better results, compared to ex situ annealing.

Bharatan, Sudhakar↗
NASA NTRS2006

Long-Wavelength Infrared (LWIR) Quantum Dot Infrared Photodetector (QDIP) Focal Plane Array

We have exploited the artificial atomlike properties of epitaxially self-assembled quantum dots for the development of high operating temperature long wavelength infrared (LWIR) focal plane arrays. Quantum dots are nanometer-scale islands that form spontaneously on a semiconductor substrate due to lattice mismatch. QDIPs are expected to outperform quantum well infrared detectors (QWIPs) and are expected to offer significant advantages over II-VI material based focal plane arrays. QDIPs are fabricated using robust wide bandgap III-V materials which are well suited to the production of highly uniform LWIR arrays. We have used molecular beam epitaxy (MBE) technology to grow multi-layer LWIR quantum dot structures based on the InAs/InGaAs/GaAs material system. JPL is building on its significant QWIP experience and is basically building a Dot-in-the-Well (DWELL) device design by embedding InAs quantum dots in a QWIP structure. This hybrid quantum dot/quantum well device offers additional control in wavelength tuning via control of dot-size and/or quantum well sizes. In addition the quantum wells can trap electrons and aide in ground state refilling. Recent measurements have shown a 10 times higher photoconductive gain than the typical QWIP device, which indirectly confirms the lower relaxation rate of excited electrons (photon bottleneck) in QDPs. Subsequent material and device improvements have demonstrated an absorption quantum efficiency (QE) of approx. 3%. Dot-in-the-well (DWELL) QDIPs were also experimentally shown to absorb both 45 deg. and normally incident light. Thus we have employed a reflection grating structure to further enhance the quantum efficiency. JPL has demonstrated wavelength control by progressively growing material and fabricating devices structures that have continuously increased in LWIR response. The most recent devices exhibit peak responsivity out to 8.1 microns. Peak detectivity of the 8.1 micrometer devices has reached approx. 1 x 10(exp 10) Jones at 77 K. Furthermore, we have fabricated the first long-wavelength 640x512 pixels QDP focal plane array. This QDIP focal plane may has produced excellent infrared imagery with noise equivalent temperature difference of 40 mK at 60K operating temperature. In addition, we have managed to increase the quantum efficiency of these devices from 0.1% (according to the data published in literature) to 20% in discrete devices. This is a factor of 200 increase in quantum efficiency. With these excellent results, for the first time QDIP performance has surpassed the QWIP performance. Our goal is to operate these long-wavelength detectors at much higher operating temperature than 77K which can be passively achieved in space. This will be a huge leap in high performance infrared detectors specifically applicable to space science instruments.

infrared imaging↗
NASA NTRS2005

Ultra-Low-Temperature Homoepitaxial Growth of Sb-Doped Silicon

An ultra-low-temperature process for homoepitaxial growth of high-quality, surface-confined, Sb-doped silicon layers is presented. Non-equilibrium growth by molecular beam epitaxy (MBE) is used to achieve dopant incorporation in excess of 2x10(exp 14) per sq cm in a thin, surface-confined layer. Sb surface segregation larger than expected from theoretical models was observed, in agreement with other experimental works. Furthermore, this work details an entirely low-temperature process (less than 450 degree C) that can be applied to fully processed and aluminum-metallized silicon devices. One application of this process is the formation of a back-surface electrode for back-illuminated high-purity silicon imaging arrays.

Molecular beam epitaxy↗
NASA NTRS2008

Three-Stage InP Submillimeter-Wave MMIC Amplifier

A submillimeter-wave monolithic integrated- circuit (S-MMIC) amplifier has been designed and fabricated using an indium phosphide (InP) 35-nm gate-length high electron mobility transistor (HEMT) device, developed at Northrop Grumman Corporation. The HEMT device employs two fingers each 15 micrometers wide. The HEMT wafers are grown by molecular beam epitaxy (MBE) and make use of a pseudomorphic In0.75Ga0.25As channel, a silicon delta-doping layer as the electron supply, an In0.52Al0.48As buffer layer, and an InP substrate. The three-stage design uses coplanar waveguide topology with a very narrow ground-to-ground spacing of 14 micrometers. Quarter-wave matching transmission lines, on-chip metal-insulator-metal shunt capacitors, series thin-film resistors, and matching stubs were used in the design. Series resistors in the shunt branch arm provide the basic circuit stabilization. The S-MMIC amplifier was measured for S-parameters and found to be centered at 320 GHz with 13-15-dB gain from 300-345 GHz. This chip was developed as part of the DARPA Submillimeter Wave Imaging Focal Plane Technology (SWIFT) program (see figure). Submillimeter-wave amplifiers could enable more sensitive receivers for earth science, planetary remote sensing, and astrophysics telescopes, particularly in radio astronomy, both from the ground and in space. A small atmospheric window at 340 GHz exists and could enable ground-based observations. However, the submillimeter-wave regime (above 300 GHz) is best used for space telescopes as Earth s atmosphere attenuates most of the signal through water and oxygen absorption. Future radio telescopes could make use of S-MMIC amplifiers for wideband, low noise, instantaneous frequency coverage, particularly in the case of heterodyne array receivers.

Pukala, David↗
NASA NTRS2007

Focal-Plane Arrays of Quantum-Dot Infrared Photodetectors

Focal-plane arrays of semiconductor quantum-dot infrared photodetectors (QDIPs) are being developed as superior alternatives to prior infrared imagers, including imagers based on HgCdTe devices and, especially, those based on quantum-well infrared photodetectors (QWIPs). HgCdTe devices and arrays thereof are difficult to fabricate and operate, and they exhibit large nonunformities and high 1/f (where f signifies frequency) noise. QWIPs are easier to fabricate and operate, can be made nearly uniform, and exhibit lower 1/f noise, but they exhibit larger dark currents, and their quantization only along the growth direction prevents them from absorbing photons at normal incidence, thereby limiting their quantum efficiencies. Like QWIPs, QDIPs offer the advantages of greater ease of operation, greater uniformity, and lower 1/f noise, but without the disadvantages: QDIPs exhibit lower dark currents, and quantum efficiencies of QDIPs are greater because the three-dimensional quantization of QDIPs is favorable to the absorption of photons at normal or oblique incidence. Moreover, QDIPs can be operated at higher temperatures (around 200 K) than are required for operation of QWIPs. The main problem in the development of QDIP imagers is to fabricate quantum dots with the requisite uniformity of size and spacing. A promising approach to be tested soon involves the use of electron-beam lithography to define the locations and sizes of quantum dots. A photoresist-covered GaAs substrate would be exposed to the beam generated by an advanced, high-precision electron beam apparatus. The exposure pattern would consist of spots typically having a diameter of 4 nm and typically spaced 20 nm apart. The exposed photoresist would be developed by either a high-contrast or a low-contrast method. In the high-contrast method, the spots would be etched in such a way as to form steep-wall holes all the way down to the substrate. The holes would be wider than the electron beam spots perhaps as wide as 15 to 20 nm, but may be sufficient to control the growth of the quantum dots. In the low-contrast method, the resist would be etched in such a way as to form dimples, the shapes of which would mimic the electron-beam density profile. Then by use of a transfer etching process that etches the substrate faster than it etches the resist, either the pattern of holes or a pattern comprising the narrow, lowest portions of the dimples would be imparted to the substrate. Having been thus patterned, the substrate would be cleaned. The resulting holes or dimples in the substrate would serve as nucleation sites for the growth of quantum dots of controlled size in the following steps. The substrate would be cleaned, then placed in a molecular-beam-epitaxy (MBE) chamber, where native oxide would be thermally desorbed and the quantum dots would be grown.

Gunapala, Sarath↗
NASA NTRS2007

Microrectenna: A Terahertz Antenna and Rectifier on a Chip

A microrectenna that would operate at a frequency of 2.5 THz has been designed and partially fabricated. The circuit is intended to be a prototype of an extremely compact device that could be used to convert radio-beamed power to DC to drive microdevices (see Figure 1). The microrectenna (see Figure 2) circuit consists of an antenna, a diode rectifier and a DC output port. The antenna consists of a twin slot array in a conducting ground plane (denoted the antenna ground plane) over an enclosed quarter-wavelength-thick resonant cavity (denoted the reflecting ground plane). The circuit also contains a planar high-frequency low-parasitic Schottky-barrier diode, a low-impedance microstrip transmission line, capacitors, and contact beam leads. The entire 3-D circuit is fabricated monolithically from a single GaAs wafer. The resonant cavity renders the slot radiation pattern unidirectional with a half-power beam width of about 65. A unique metal mesh on the rear of the wafer forms the backplate for the cavity but allows the GaAs to be wet etched from the rear surface of the twin slot antennas and ground plane. The beam leads protrude past the edge of the chip and are used both to mount the microrectenna and to make the DC electrical connection with external circuitry. The antenna ground plane and the components on top of it are formed on a 2- m thick GaAs membrane that is grown in the initial wafer MBE (molecular beam epitaxy) process. The side walls of the antenna cavity are not metal coated and, hence, would cause some loss of power; however, the relatively high permittivity (epsilon=13) of the GaAs keeps the cavity modes well confined, without the usual surface-wave losses associated with thick dielectric substrates. The Schottky-barrier diode has the usual submicron dimensions associated with THz operation and is formed in a mesa process above the antenna ground plane. The diode is connected at the midpoint of a microstrip transmission line, which is formed on 1- m-thick SiO (permittivity of 5) laid down on top of the GaAs membrane. The twin slots are fed in phase by this structure. To prevent radio-frequency (RF) leakage past the slot antennas, low-loss capacitors are integrated into the microstrip transmission line at the edges of the slots. The DC current- carrying lines extend from the outer edges of the capacitors, widen approaching the edges of the chip, and continue past the edges of the chip to become the beam leads used in tacking down the devices. The structure provides a self-contained RF to DC converter that works in the THz range.

Siegel, Peter↗
NASA NTRS2012

Inductively Coupled Plasma Etching for Delineation of InAs/GaSb Pixels

We developed 320x256 Complimentary Barrier Infrared (CBIRD) focal plane array (FPA) for long wave infrared (LWIR) imaging application. The FPA layers grown by molecular beam epitaxy (MBE) had 300 periods 1.9 micro m thick absorber. The CBIRD arrays showed the mean dark current density of 2.2 x 10(exp -4) A/cm2, when 128 mV bias voltage was applied. The long wave cut off was observed at 8.8 micrometers at the 50% peak and the maximum quantum efficiency was 54% at 5.6 micrometers. The arrays had 81% fill factor with 97% operability with noise equivalent difference temperature (NE(delta)T) of 18.6 mK and a mean detectivity of D*=1.3 x 10(exp 11) Hz(exp 1/2)/W.

InAs/GaSb↗
NASA NTRS2012

320 x 256 Complementary Barrier Infrared Detector Focal Plane Array for Long-Wave Infrared Imaging

A 320 x 256 Complementary Barrier Infrared (CBIRD) focal plane array for long-wavelength infrared (LWIR) imaging is reported. The arrays were grown by molecular beam expitaxy (MBE) with a 300 period 1.9 um thick absorber. The mean dark current density of 2.2 x 10-4 A/cm2 was measured at an operating bias of 128 mV with a long wavelength cutoff of 8.8 ?m observed at 50% of the peak. The maximum quantum efficiency was 54% measured at 5.6 ?m. Operating at T = 80K, the array yielded an 81% fill factor with 97% operability. Good imagery with a mean noise equivalent different temperature (NE?T) of 18.6 mK and a mean detectivity of D* = 1.3 x 1011 cm-Hz1/2/W was achieved. The substrate was thinned using mechanical lapping and neither an AR coating nor a passivation layer was applied. This article provides the details of the fabrication process for achieving low-dark current LWIR CBIRD arrays. Discussion for an effective hard mask for excellent pattern transfer is given and appropriate mounting techniques for good thermal contact during the dry etching process is described. The challenges and differences between etching large 200 ?m test diodes and small 28 ?m FPA pixels are given.

Focal Plane Arrays (FPA)↗
NASA NTRS2012

Programmatic Impact of SDRAM SEFI

The Elpida EDS5104(08)ABTA 512Mb SDRAM is examined for programmatic impact of SEE. Use cases for the devices including EDAC and mode register reload are examined. Results indicate some SEE mitigation methods require careful application to achieve system-level benefits, while some event types are essentially mitigated by the application use. In the studied devices MBE and SEFI are identified and investigated as mechanisms requiring special consideration.

Single Event Functionality Interrupt (SEFI)↗
NASA NTRS2014

Atomic Layer Deposition of Chemical Passivation Layers and High Performance Anti-Reflection Coatings on Back-Illuminated Detectors

A back-illuminated silicon photodetector has a layer of Al2O3 deposited on a silicon oxide surface that receives electromagnetic radiation to be detected. The Al2O3 layer has an antireflection coating deposited thereon. The Al2O3 layer provides a chemically resistant separation layer between the silicon oxide surface and the antireflection coating. The Al2O3 layer is thin enough that it is optically innocuous. Under deep ultraviolet radiation, the silicon oxide layer and the antireflection coating do not interact chemically. In one embodiment, the silicon photodetector has a delta-doped layer near (within a few nanometers of) the silicon oxide surface. The Al2O3 layer is expected to provide similar protection for doped layers fabricated using other methods, such as MBE, ion implantation and CVD deposition.

Hoenk, Michael E.↗
NASA NTRS2009

Delta-Doped Back-Illuminated CMOS Imaging Arrays: Progress and Prospects

In this paper, we report the latest results on our development of delta-doped, thinned, back-illuminated CMOS imaging arrays. As with charge-coupled devices, thinning and back-illumination are essential to the development of high performance CMOS imaging arrays. Problems with back surface passivation have emerged as critical to the prospects for incorporating CMOS imaging arrays into high performance scientific instruments, just as they did for CCDs over twenty years ago. In the early 1990's, JPL developed delta-doped CCDs, in which low temperature molecular beam epitaxy was used to form an ideal passivation layer on the silicon back surface. Comprising only a few nanometers of highly-doped epitaxial silicon, delta-doping achieves the stability and uniformity that are essential for high performance imaging and spectroscopy. Delta-doped CCDs were shown to have high, stable, and uniform quantum efficiency across the entire spectral range from the extreme ultraviolet through the near infrared. JPL has recently bump-bonded thinned, delta-doped CMOS imaging arrays to a CMOS readout, and demonstrated imaging. Delta-doped CMOS devices exhibit the high quantum efficiency that has become the standard for scientific-grade CCDs. Together with new circuit designs for low-noise readout currently under development, delta-doping expands the potential scientific applications of CMOS imaging arrays, and brings within reach important new capabilities, such as fast, high-sensitivity imaging with parallel readout and real-time signal processing. It remains to demonstrate manufacturability of delta-doped CMOS imaging arrays. To that end, JPL has acquired a new silicon MBE and ancillary equipment for delta-doping wafers up to 200mm in diameter, and is now developing processes for high-throughput, high yield delta-doping of fully-processed wafers with CCD and CMOS imaging devices.

imagers↗
NASA NTRS2015

Surface Passivation by Quantum Exclusion Using Multiple Layers

A semiconductor device has a multilayer doping to provide improved passivation by quantum exclusion. The multilayer doping includes at least two doped layers fabricated using MBE methods. The dopant sheet densities in the doped layers need not be the same, but in principle can be selected to be the same sheet densities or to be different sheet densities. The electrically active dopant sheet densities are quite high, reaching more than 1.times.10.sup.14 cm.sup.-2, and locally exceeding 10.sup.22 per cubic centimeter. It has been found that silicon detector devices that have two or more such dopant layers exhibit improved resistance to degradation by UV radiation, at least at wavelengths of 193 nm, as compared to conventional silicon p-on-n devices.

Hoenk, Michael E.↗