A bibliography on digital computer-aided circuit analysis and design
Digital computer-aided electric logic circuit analysis and design bibliography
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Digital computer-aided electric logic circuit analysis and design bibliography
This document discusses the development and evaluation of an airborne collision alerting logic for aircraft on closely-spaced approaches to parallel runways. A novel methodology is used when links alerts to collision probabilities: alerting thresholds are set such that when the probability of a collision exceeds an acceptable hazard level an alert is issued. The logic was designed to limit the hazard level to that estimated for the Precision Runway Monitoring system: one accident in every one thousand blunders which trigger alerts. When the aircraft were constrained to be coaltitude, evaluations of a two-dimensional version of the alerting logic show that the achieved hazard level is approximately one accident in every 250 blunders. Problematic scenarios have been identified and corrections to the logic can be made. The evaluations also show that over eighty percent of all unnecessary alerts were issued during scenarios in which the miss distance would have been less than 1000 ft, indicating that the alerts may have been justified. Also, no unnecessary alerts were generated during normal approaches.
A small, portable data-acquisition and display system with a unique coprocessor was designed and built to collect data from infrared array detectors for astronomical and laboratory use. The system consists of a microcomputer board, two 12-bit analog-to-digital data-acquisition boards, a color-graphics driver board, and two coprocessor boards. The coprocessors are arithmetic logic units designed to achieve the high computation rates necessary for real-time infrared background cancellation. The system can collect data from infrared detectors of 1 to 256 pixel elements with a computation rate of 768 kHz. The software for the system was designed to collect data in the system's background, while performing other tasks in the system's foreground. The data for the detector arrays is stored in block fashion to facilitate variable image size.
Apparatus and technique for generating logical functions and circuits have been developed. They provide aid in designing and constructing hardware to generate logic circuits, by defining circuit connections required to generate these functions. With this method, it is possible quickly and automatically to design logic, while eliminating involved and time-consuming mathematical manipulations.
Volume I of this report presents a new method for synthesizing hybrid systems directly from desi gn requirements, and applies the method to design of a hybrid system for longitudinal control of transport aircraft. The resulting system satisfies general requirement for safety and effectiveness specified a priori, enabling formal validation to be achieved. Volume II contains seven appendices intended to make the report accessible to readers with backgrounds in human factors, flight dynamics and control, and formal logic. Major design goals are (1) system design integrity based on proof of correctness at the design level, (2) significant simplification and cost reduction in system development and certification, and (3) improved operational efficiency, with significant alleviation of human-factors problems encountered by pilots in current transport aircraft. This report provides for the first time a firm technical basis for criteria governing design and certification of avionic systems for transport aircraft. It should be of primary interest to designers of next-generation avionic systems.
Volume I of this report presents a new method for synthesizing hybrid systems directly from design requirements, and applies the method to design of a hybrid system for longitudinal control of transport aircraft. The resulting system satisfies general requirement for safety and effectiveness specified a priori, enabling formal validation to be achieved. Volume II contains seven appendices intended to make the report accessible to readers with backgrounds in human factors, fli ght dynamics and control. and formal logic. Major design goals are (1) system desi g n integrity based on proof of correctness at the design level, (2), significant simplification and cost reduction in system development and certification, and (3) improved operational efficiency, with significant alleviation of human-factors problems encountered by pilots in current transport aircraft. This report provides for the first time a firm technical basis for criteria governing design and certification of avionic systems for transport aircraft. It should be of primary interest to designers of next-generation avionic systems.
The iterative logic array (ILA) is introduced as a new architecture for asynchronous sequential circuits. This is the first ILA architecture for sequential circuits reported in the literature. The ILA architecture produces a very regular circuit structure. Moreover, it is immune to both 1-1 and 0-0 crossovers and is free of hazards. This paper also presents a new critical race free STT state assignment which produces a simple form of design equations that greatly simplifies the ILA realizations.
The Cryogenic Tank Technology Program (CTTP) program has been a cooperative effort between NASA LARC, NASA MSFC, NASA Headquarters, and industry (Lockheed Martin Aeronautics, Lockheed Martin Manned Space Systems, Wyman Gordon, and Ladish). The scope of the CTTP is to develop state-of-the-art, flight-size, flight-quality, low cost hardware, and use this hardware to design, fabricate and test an all aluminum-lithium, all near net shape-component 14' diameter cryogenic tank with a unique low profile bulkhead design. The logical conclusion to the CTTP is to validate these various technologies to a Technology Readiness Level (TRL) of 6 through the proposed structural test program. The CTTP supports the advancement of key enabling technologies required for aluminum lithium cryogenic tanks. The technologies are focused towards innovative and low cost manufacturing processes such as near net shape technologies: one piece spun formed domes, extruded barrel panels, and one piece roll forged ring frames. Other innovative technologies include the friction stir weld process and weight-efficient low profile bulkhead designs. All of these technologies are of primary importance for NASA's mission plan for reusable and expendable launch vehicles. This program fills the niche for an all 2195 aluminum lithium alloy cryogenic tank which is not being covered by existing NASA technology work.
Aircraft takeoff and landing in the presence of downbursts are addressed. Dynamic optimization and feedback control system design techniques are used to determine proper guidance laws for aircraft in the presence of downbursts, and insensitivity to downburst structures is emphasized. Avoidance is the best policy. If an inadvertent encounter occurs when the aircraft is already close to or even in the downburst, the pilot should concentrate on vertical flight, unless he is sure which direction to turn for winds of less intensity. If such an encounter happens on takeoff, maximum thrust should be used aggressively and a lower climb rate or even descending flight is recommended. Similar strategy is applicable for abort landing. If an encounter happens on landing and encounter height is low, landing should proceed. It is recommended that the nominal horizontal and vertical velocities w.r.t the ground should be maintained, subject to a minimum airspeed constraint. A landing control logic is designed to accomplish this.
Flux division in three-leg saturable ferrite core
Scaler using ferrite-core shift register with linear-logic feedback developed for spacecraft computer clock
Signal processing and logical organization of distributed system of dipole phased array antenna
Circuit features, variational capabilities, input-output capabilities, and transient analysis of NET-2 circuit program
Magnetic logic circuit design features two ferrite materials, with different formulation and magnetic characteristics, which are bonded into a continuous structure by preparing the materials as a slurry and using the doctor blade method to form flexible ferrite sheets. After firing, the sintering process was continuous across the bond.
Application of domain tip logic in designing associative processors for spaceborne use
Binary to decimal decoder logic circuit design with feedback control and display device
An autopilot logic is designed here for controlling a helicopter with a hanging load. A 16th order model for the system is decoupled into four subsystems: (1) a second order system for yawing motion, (2) a second order system for vertical motion, (3) a sixth order system for longitudinal motion, and (4) a sixth order system for lateral motion. A measuring scheme, which could be used in remote areas, is developed and filters are designed to estimate the state variables from these measurements. The autopilot can be used to move the load over short distances without retracting the cables. This is done by automatically shifting the autopilot modes from position-hold (hover) to acceleration-hold to velocity-hold (cruise) to deceleration-hold to velocity-hold (near hover) to position-hold (hover). Use of such an autopilot might save considerable turnaround time. The Sikorsky S-61 helicopter is chosen as an example vehicle. The performance of the controlled system is studied in the presence of longitudinal and lateral winds.
A brief general description of the ASTP flight program verification was presented. The total program verification effort assures the accuracy and adequacy of the LVDC flight program and verifies that the final program meets mission requirements and conforms to program documentation. The flight program's functional requirements to integrate the guidance and control system with the launch vehicle sequencing system are verified directly by analysis of many special logic checks designed for this purpose and indirectly by the correct overall program response to nominal and numerous perturbed conditions. Verification of the interaction of function requirements is accomplished on every case run during the verification effort.