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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS1997

Electrical and Optical Performance Characteristics of 0.74-eV p/n InGaAs Monolithic Interconnected Modules

There has been a traditional trade-off in thermophotovoltaic (TPV) energy conversion development between system efficiency and power density. This trade-off originates from the use of front surface spectral controls such as selective emitters and various types of filters. A monolithic interconnected module (MIM) structure has been developed which allows for both high power densities and high system efficiencies. The MIM device consists of many individual indium gallium arsenide (InGaAs) cells series-connected on a single semi-insulating indium phosphide (InP) substrate. The MIM is exposed to the entire emitter output, thereby maximizing output power density. An infrared (IR) reflector placed on the rear surface of the substrate returns the unused portion of the emitter output spectrum back to the emitter for recycling, thereby providing for high system efficiencies. Initial MIM development has focused on a 1 sq cm device consisting of eight (8) series interconnected cells. MIM devices, produced from 0.74-eV InGaAs, have demonstrated V(sub oc) = 3.2 volts, J(sub sc) = 70 mA/sq cm, and a fill factor of 66% under flashlamp testing. Infrared (IR) reflectance measurements (greater than 2 micron) of these devices indicate a reflectivity of greater than 82%. MIM devices produced from 0.55-eV InGaAs have also been demonstrated. In addition, conventional p/n InGaAs devices with record efficiencies (11.7% AM0) have been demonstrated.

Wilt, David M.↗
NASA NTRS1997

Electrical and Optical Performance Characteristics of p/n InGaAs Monolithic Interconnected Modules

There has been a traditional trade-off in ThermoPhotoVoltaic (TPV) energy conversion development between system efficiency and power density. This trade-off originates from the use of front surface spectral controls such as selective emitters and various types of filters. A Monolithic Interconnected Module (MIM) structure has been developed which allows for both high power densities and high system efficiencies. The MIM device consists of many individual Indium Gallium Arsenide (InGaAs) devices series-connected on a single semi-insulating Indium Phosphide (InP) substrate. The MIMs are exposed to the entire emitter output, thereby maximizing output power density. An InfraRed (IR) reflector placed on the rear surface of the substrate returns the unused portion of the emitter output spectrum back to the emitter for recycling, thereby providing for high system efficiencies. Initial MIM development has focused on a 1 sq cm device consisting of eight (8) series interconnected cells. MIM devices, produced from 0.74eV InGaAs, have demonstrated V(sub infinity) = 3.2 volts, J(sub sc) = 70 mA/sq cm and a fill factor of 66% under flashlamp testing. IR reflectance measurements (greater than 2 microns) of these devices indicate a reflectivity of greater than 82%. MIM devices produced from 0.55 eV InGaAs have also been demonstrated. In addition, conventional p/n InGaAs devices with record efficiencies (11.7% AM0) have been demonstrated.

Wilt, David M.↗
NASA NTRS1997

Preliminary reliability evaluation of flip chip on flex interconnect technology

The study was carried out to evaluate the flip-chip-on-flex (FCOF) interconnection process in order to determine its feasibility for space flight applications. The key objectives were to: develop and apply simple and cost effective process steps needed to manufacture FCOFs and build test samples; perform a preliminary technology validation, and determine any initial environmental or application risks. The FCOF was shown to be simpler and more economical than other chip interconnection schemes.

Shaw, Jack J.↗
NASA NTRS2002

34% Efficient InGaP/GaAs/GaSb Cell-Interconnected-Circuits for Line-Focus Concentrator Arrays

While monolithic multi-junction cells are preferred for flat plate arrays, mechanically stacked multi-junction cells are superior for solar concentrator applications. Reasons for this are that the mechanical stacked configuration with high efficiency Gallium Antimonide cells allows utilization of a much wider range of the solar energy spectrum, and the ability to use voltage matched interconnects results in full use of low bandgap cell currents. Herein, data are presented for simple two terminal voltage-matched circuits using InGaP/GaAs/GaSb stacked cells showing 34% average circuit efficiency for a lot of 12 circuits given prismatic covers. These circuits have been designed to fit into the ultralight Stretched Lens Array being developed by NASA. With these new cell-interconnected-circuits, we project that the power density at GEO operating temperature can be increased from 296 W/m2 to 350 W/m2 while maintaining the specific power at 190 W/kg at the full wing level.

Fraas, L. M.↗
NASA NTRS2003

Monolithic Interconnected Modules (MIMs) for Thermophotovoltaic Energy Conversion

Monolithic Interconnected Modules (MIM) are under development for thermophotovoltaic (TPV) energy conversion applications. MIM devices are typified by series-interconnected photovoltaic cells on a common, semi-insulating substrate and generally include rear-surface infrared (IR) reflectors. The MIM architecture is being implemented in InGaAsSb materials without semi-insulating substrates through the development of alternative isolation methodologies. Motivations for developing the MIM structure include: reduced resistive losses, higher output power density than for systems utilizing front surface spectral control, improved thermal coupling and ultimately higher system efficiency. Numerous design and material changes have been investigated since the introduction of the MIM concept in 1994. These developments as well as the current design strategies are addressed.

Wilt, David↗
NASA NTRS2003

The Highly Robust Electrical Interconnects and Ultrasensitive Biosensors Based on Embedded Carbon Nanotube Arrays

We report on our recent breakthroughs in two different applications using well-aligned carbon nanotube (CNT) arrays on Si chips, including (1) a novel processing solution for highly robust electrical interconnects in integrated circuit manufacturing, and (2) the development of ultrasensitive electrochemical DNA sensors. Both of them rely on the invention of a bottom-up fabrication scheme which includes six steps, including: (a) lithographic patterning, (b) depositing bottom conducting contacts, (c) depositing metal catalysts, (d) CNT growth by plasma enhanced chemical vapor deposition (PECVD), (e) dielectric gap-filling, and (f) chemical mechanical polishing (CMP). Such processes produce a stable planarized surface with only the open end of CNTs exposed, whch can be further processed or modified for different applications. By depositing patterned top contacts, the CNT can serve as vertical interconnects between the two conducting layers. This method is fundamentally different fiom current damascene processes and avoids problems associated with etching and filling of high aspect ratio holes at nanoscales. In addition, multiwalled CNTs (MWCNTs) are highly robust and can carry a current density of 10(exp 9) A/square centimeters without degradation. It has great potential to help extending the current Si technology. The embedded MWCNT array without the top contact layer can be also used as a nanoelectrode array in electrochemical biosensors. The cell time-constant and sensitivity can be dramatically improved. By functionalizing the tube ends with specific oligonucleotide probes, specific DNA targets can be detected with electrochemical methods down to subattomoles.

Li, Jun↗
NASA NTRS2004

InGaAs/InP Monolithic Interconnected Modules (MIM) for Thermophotovoltaic Applications

There has been a traditional trade-off in thermophotovoltaic (TPV) energy conversion development between systems efficiency and power density. This trade-off originates from the use of front surface spectral controls such as selective emitters and various types of filters. A monolithic interconnected module (MIM) structure has been developed which allows for both high power densities and high system efficiencies. The MIM device consists of many individual indium gallium arsenide (InGaAs) devices series -connected on a single semi-insulating indium phosphide (InP) substrate. The MIMs are exposed to the entire emitter output, thereby maximizing output power density. An infrared (IR) reflector placed on the rear surface of the substrate returns the unused portion of the emitter output spectrum back to the emitter for recycling, thereby providing for high system efficiencies. Initial MIM development has focused on a 1 sq cm device consisting of eight series interconnected cells. MIM devices, produced from 0,74 eV InGAAs, have demonstrated V(sub infinity) = 3.23 volts, J(sub sc) = 70 mA/sq cm and a fill factor of 66% under flashlamp testing. Infrared (IR) reflectance measurement (less than 2 microns) of these devices indicate a reflectivity of less than 82%. MIM devices produced from 0.55 eV InGaAs have also been den=monstrated. In addition, conventional p/n InGaAs devices with record efficiencies (11.7% AM1) have been demonstrated.

Wilt, David M.↗
NASA NTRS2005

n/p/n Tunnel Junction InGaAs Monolithic Interconnected Module (MIM)

The Monolithic Interconnected Module (MIM), originally introduced at the First NREL thermophotovoltaic (TPV) conference, consists of low-bandgap indium gallium arsenide (InGaAs) photovoltaic devices, series interconnected on a common semi-insulating indium phosphide (inP) substrate. An infrared reflector is deposited on the back surface of the substrate to reflect photons, which were not absorbed in the first pass through the structure. The single largest optical loss in the current device occurs int he heavily doped p-type emitter. A new MIM design (pat.pend.) has been developed which flips the polarity of the conventional MIM cell (i.e., n/p rather than p/n), eliminating the need for the high conductivity p-type emitter. The p-type base of the cell is connected to the n-type lateral conduction layer through a thin InGaAs tunnel junction. 0.58 eV and 0.74 eV InGaAs devices have demonstrated reflectances above 90% for wavelengths beyond the bandgap (greater than 95% for unprocessed structures). Electrical measurements indicate minimal voltage drops across the tunnel junction (less than mV/junction under 1200K-blackbody illumnination) and fill factors that are above 70% at current densities (J(sub sc)) above 8 Angstroms per square centimeters for the 0.74eV devices.

Wilt, David M.↗
NASA NTRS2005

Development of a Thin-Film Solar Cell Interconnect for the Powersphere Concept

Dual junction amorphous silicon (a-Si) solar cells produced on polyimide substrate have been selected as the best candidate to produce a lightweight solar array for the PowerSphere program. The PowerSphere concept features a space-inflatable, geodetic solar array approximately 0.6 meters in diameter and capable of generating about 20W of electrical power. Trade studies of various wiring concepts and connection methods led to an interconnect design with a copper contact that wraps around the edge, to the back of the solar cell. Applying Plasma Vapor Deposited (PVD) copper film to both sides and the edge of the solar cell produces the wrap around contact. This procedure results in a contact pad on the back of the solar cell, which is then laser welded to a flex circuit material. The flex circuit is constructed of copper in a custom designed routing pattern, and then sandwiched in a Kapton insulation layer. The flex circuit then serves as the primary power distribution system between the solar cells and the spacecraft. Flex circuit material is the best candidate for the wiring harness because it allows for low force deployment of the solar cells by the inflatable hinges on the PowerSphere. An additional frame structure, fabricated and assembled by ILC Dover, will reinforce the wrap around contact-flex blanket connection, thus providing a mechanically robust solar cell interconnect for the PowerSphere multifunctional program. The PowerSphere team will use the wraparound contact design approach as the primary solution for solar cell integration and the flex blanket for power distribution.

Simburger, Edward J.↗
NASA NTRS2006

A Novel, Free-Space Optical Interconnect Employing Vertical-Cavity Surface Emitting Laser Diodes and InGaAs Metal-Semiconductor-Metal Photodetectors for Gbit/s RF/Microwave Systems

Emerging technologies and continuing progress in vertical-cavity surface emitting laser (VCSEL) diode and metal-semiconductor-metal (MSM) photodetector research are making way for novel, high-speed forms of optical data transfer in communication systems. VCSEL diodes operating at 1550 nm have only recently become commercially available, while MSM photodetectors are pushing the limits of contact lithography with interdigitated electrode widths reaching sub micron levels. We propose a novel, free-space optical interconnect operating at about 1Gbit/s utilizing VCSEL diodes and MSM photodetectors. We report on development, progress, and current work, which are as follows: first, analysis of the divergent behavior of VCSEL diodes for coupling to MSM photodetectors with a 50 by 50 m active area and second, the normalized frequency response of the VCSEL diode as a function of the modulating frequency. Third, the calculated response of MSM photodetectors with varying electrode width and spacing on the order of 1 to 3 m as well as the fabrication and characterization of these devices. The work presented here will lead to the formation and characterization of a fully integrated 1Gbit/s free-space optical interconnect at 1550 nm and demonstrates both chip level and board level functionality for RF/microwave digital systems.

Savich, Gregory R.↗
NASA NTRS2005

Electronics box having internal circuit cards interconnected to external connectors sans motherboard

An electronics chassis box includes a pair of opposing sidewalls, a pair of opposing end walls, a bottom surface, a top cover, and ring connectors assemblies mounted in selective ones of the walls of the electronic box. Boss members extend from the bottom surface at different heights upon which circuit cards are mounted in spatial relationship to each other. A flex interconnect substantially reduces and generally eliminates the need of a motherboard by interconnecting the circuit cards to one another and to external connectors mounted within the ring connector assemblies.

Hockett, John E.↗
NASA NTRS1995

Method for fabricating an interconnected array of semiconductor devices

A method of forming an array of interconnected solar cells. A flexible substrate carrying semiconductor and conductive layers is divided into individual devices by slitting the substrate along the web length. The individual devices are then connected with one another in series by laminating the substrate onto an insulating backing and by depositing conducting interconnection layers which join the lower conductor of one device with the top conductor of the adjoining device.

Grimmer, Derrick P.↗
NASA NTRS1976

Process for making a multilayer interconnect system

A process for making an interconnect system for a multilayer circuit pattern. The interconnect system is formed having minimized through-hole space consumption so as to be suitable for high density, closely meshed circuit patterns.

Zachry, Clyde L.↗
NASA NTRS2011

Decentralized Adaptive Control of Systems with Uncertain Interconnections, Plant-Model Mismatch and Actuator Failures

Decentralized adaptive control is considered for systems consisting of multiple interconnected subsystems. It is assumed that each subsystem s parameters are uncertain and the interconnection parameters are not known. In addition, mismatch can exist between each subsystem and its reference model. A strictly decentralized adaptive control scheme is developed, wherein each subsystem has access only to its own state but has the knowledge of all reference model states. The mismatch is estimated online for each subsystem and the mismatch estimates are used to adaptively modify the corresponding reference models. The adaptive control scheme is extended to the case with actuator failures in addition to mismatch.

Patre, Parag↗
NASA NTRS2014

Copper Nanowire Production for Interconnect Applications

A method of fabricating metallic Cu nanowires with lengths up to about 25 micrometers and diameters in a range 20-100 nanometers, or greater if desired. Vertically oriented or laterally oriented copper oxide structures (CuO and/or Cu2O) are grown on a Cu substrate. The copper oxide structures are reduced with 99+ percent H or H2, and in this reduction process the lengths decrease (to no more than about 25 micrometers), the density of surviving nanostructures on a substrate decreases, and the diameters of the surviving nanostructures have a range, of about 20-100 nanometers. The resulting nanowires are substantially pure Cu and can be oriented laterally (for local or global interconnects) or can be oriented vertically (for standard vertical interconnects).

Han, Jin-Woo↗
NASA NTRS2015

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype ICs with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3-and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient.

Silicon Carbide↗
NASA NTRS2015

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

JFET↗