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126 records · Page 7

Upgrades at the NASA Langley Research Center National Transonic Facility

Several projects have been completed or are nearing completion at the NASA Langley Research Center (LaRC) National Transonic Facility (NTF). The addition of a Model Flow-Control/Propulsion Simulation test capability to the NTF provides a unique, transonic, high-Reynolds number test capability that is well suited for research in propulsion airframe integration studies, circulation control high-lift concepts, powered lift, and cruise separation flow control. A 1992 vintage Facility Automation System (FAS) that performs the control functions for tunnel pressure, temperature, Mach number, model position, safety interlock and supervisory controls was replaced using current, commercially available components. This FAS upgrade also involved a design study for the replacement of the facility Mach measurement system and the development of a software-based simulation model of NTF processes and control systems. The FAS upgrades were validated by a post upgrade verification wind tunnel test. The data acquisition system (DAS) upgrade project involves the design, purchase, build, integration, installation and verification of a new DAS by replacing several early 1990's vintage computer systems with state of the art hardware/software. This paper provides an update on the progress made in these efforts. See reference 1.

Paryz, Roman W.↗

Ground Station support for small scientific satellites

In order to keep the cost of a complete small satellite program low, it is necessary to minimize the cost of the ground station operations and support. This is required not only for the operations and support per se, but also in the development of ground station hardware and the mission associated software. Recent experiences at the Rutherford Appleton Laboratory (RAL) on two international projects, IRAS and AMPTE, have shown that the low cost objectives of operations using smaller national facilities can be achieved. This paper describes the facilities at RAL, and the methods by which low cost support are provided by considering the differing implications of hardware/software system modularity, reliability, and small numbers of dedicated and highly skilled operations staff.

Holdaway, R.↗

The SODA Approach: Leveraging High-Level Synthesis for Hardware/Software Co-design and Hardware Specialization: Invited

Novel "converged" applications combine phases of scientific simulation with data analysis and machine learning. Each computational phase can benefit from specialized accelerators. However, algorithms evolve so quickly that mapping them on existing accelerators is suboptimal or even impossible. This paper presents the SODA (Software Defined Accelerators) framework, a modular, multi-level, open-source, no-human-in-the-loop, hardware synthesizer that enables end-to-end generation of specialized accelerators. SODA is composed of SODA-Opt, a high-level frontend developed in MLIR that interfaces with domain-specific programming frameworks and allows performing system level design, and Bambu, a state-of-the-art high-level synthesis engine that can target different device technologies. The framework implements design space exploration as compiler optimization passes. We show how the modular, yet tight, integration of the high-level optimizer and lower-level HLS tools enables the generation of accelerators optimized for the computational patterns of converged applications. We then discuss some of the research opportunities that such a framework allows, including system-level design, profile driven optimization, and supporting new optimization metrics.

Bohm Agostini, Nicolas↗

Methods for design and evaluation of integrated hardware/software systems for concurrent computation

Two testbed programming environments to support the evaluation of a large range of parallel architectures have been implemented under the program Parallel Implementation of Scientific Computing Environments (PISCES). The PISCES 1 environment was applied to two areas of aerospace interest: a sparse matrix iterative equation solver and a dynamic scene analysis system. Currently, the NICE/SPAR testbed system for structural analysis is being modified for parallel operation under PISCES 2; the PISCES 1 applications are also being adapted for PISCES 2. A new formal model of concurrent computation has been developed, based on the mathematical system known as H graph semantics together with a timed Petri net model of the parallel aspects of a system.

Pratt, Terrence W.↗

Analyst-centered models for systems design, analysis, and development

Much has been written about the possible use of Expert Systems (ES) technology for strategic defense system applications, particularly for battle management algorithms and mission planning. It is proposed that ES (or more accurately, Knowledge Based System (KBS)) technology can be used in situations for which no human expert exists, namely to create design and analysis environments that allow an analyst to rapidly pose many different possible problem resolutions in game like fashion and to then work through the solution space in search of the optimal solution. Portions of such an environment exist for expensive AI hardware/software combinations such as the Xerox LOOPS and Intellicorp KEE systems. Efforts are discussed to build an analyst centered model (ACM) using an ES programming environment, ExperOPS5 for a simple missile system tradeoff study. By analyst centered, it is meant that the focus of learning is for the benefit of the analyst, not the model. The model's environment allows the analyst to pose a variety of what if questions without resorting to programming changes. Although not an ES per se, the ACM would allow for a design and analysis environment that is much superior to that of current technologies.

Bukley, A. P.↗

An avionics scenario and command model description for Space Generic Open Avionics Architecture (SGOAA)

This paper presents a description of a model for a space vehicle operational scenario and the commands for avionics. This model will be used in developing a dynamic architecture simulation model using the Statemate CASE tool for validation of the Space Generic Open Avionics Architecture (SGOAA). The SGOAA has been proposed as an avionics architecture standard to NASA through its Strategic Avionics Technology Working Group (SATWG) and has been accepted by the Society of Automotive Engineers (SAE) for conversion into an SAE Avionics Standard. This architecture was developed for the Flight Data Systems Division (FDSD) of the NASA Johnson Space Center (JSC) by the Lockheed Engineering and Sciences Company (LESC), Houston, Texas. This SGOAA includes a generic system architecture for the entities in spacecraft avionics, a generic processing external and internal hardware architecture, and a nine class model of interfaces. The SGOAA is both scalable and recursive and can be applied to any hierarchical level of hardware/software processing systems.

Stovall, John R.↗

Case Study: Formal Inspections at the Jet Propulsion Laboratory

The Jet Propulsion Laboratory (JPL) of the California Institute of Technology is a federally funded research and development center operating under contract to the National Aeronautics and Space Administration (NASA). JPL's charter emphasizes the exploration of the solar system including observations of Earth as well as other stellar systems and extra-solar-system bodies. Within JPL, the Software Product Assurance (SPA) Section helps to ensure the operational integrity of the software within the system. SPA evaluates the operational requirements, the acceptability and readiness of all software, hardware/software interfaces, and the integrity of the completed software before its final release into the operational environment.

Kelly, J. C.↗

GE networked mass storage solutions supporting IEEE network mass storage model

The General Electric Government Communications Systems Department (GE/GCSD) has developed a near real time digital data storage and retrieval system that extends the capabilities currently available in today's marketplace. This system called DuraStore uses commercially available rotary tape drive technology with ANSI/IEEE standards for automated magnetic tape based data storage. It uses a nonproprietary approach to satisfy a wide range of data rates and storage capabilities requirements and is compliant with the IEEE Network Storage Model. Rotary tape drives, standard interfaces, application specific hardware/software, networked automated tape libraries, library administrator, write protection, volume/physical media linkages, and maximum resource utilization are addressed.

Herzog, Donald↗

NASA's satellite relay tracking and data acquisition program

The Tracking and Data Acquisition System (TDAS) is currently being planned to support NASA missions and the Space Station and will serve as a replacement to the present Tracking and Data Relay Satellite System (TDRSS). Its operational date is currently projected for the late 1990s. Near term objectives involve the definition of a TDAS architecture, the development of functional and performance specifications and implementation of a TDRSS-to-TDAS transition plan. The present paper provides an overview of the baseline TDAS architecture and summarizes key ingredients of system and technology studies in progress. In particular, this paper addresses a summary of projected mission requirements for the TDAS era; a characterization of the space segment constellation; use of lasers, 60 GHz, and multibeam 30/20 GHz technologies; ground architecture and operational interfaces; a distributed hardware/software processing concept for more flexible and reliable interfaces, signal processing and operations. Also included is a status summary of the TDAS program plan for the 1984-1990 time frame. Finally, an overview is presented of NASA's current plans to augment the TDRSS to meet the Space Station IOC requirements in the time period 1993-2000.

Schwartz, J. J.↗

A force-controllable macro-micro manipulator and its application to medical robots

This paper describes an 8-degrees-of-freedom macro-micro robot. This robot is capable of performing tasks that require accurate force control, such as polishing, finishing, grinding, deburring, and cleaning. The design of the macro-micro mechanism, the control algorithms, and the hardware/software implementation of the algorithms are described in this paper. Initial experimental results are reported. In addition, this paper includes a discussion of medical surgery and the role that force control may play. We introduce a new class of robotic systems collectively called Robotic Enhancement Technology (RET). RET systems introduce the combination of robotic manipulation with human control to perform manipulation tasks beyond the individual capability of either human or machine. The RET class of robotic systems offers new challenges in mechanism design, control-law development, and man/machine interface design. We believe force-controllable mechanisms such as the macro-micro structure we have developed are a necessary part of RET. Work in progress in the area of RET systems and their application to minimally invasive surgery is presented, along with future research directions.

Marzwell, Neville I.↗

Developing tools for digital radar image data evaluation

The refinement of radar image analysis methods has led to a need for a systems approach to radar image processing software. Developments stimulated through satellite radar are combined with standard image processing techniques to create a user environment to manipulate and analyze airborne and satellite radar images. One aim is to create radar products for the user from the original data to enhance the ease of understanding the contents. The results are called secondary image products and derive from the original digital images. Another aim is to support interactive SAR image analysis. Software methods permit use of a digital height model to create ortho images, synthetic images, stereo-ortho images, radar maps or color combinations of different component products. Efforts are ongoing to integrate individual tools into a combined hardware/software environment for interactive radar image analysis.

Domik, G.↗

Cardiac Repolarization Abnormalities and Potential Evidence for Loss of Cardiac Sodium Currents on ECGs of Patients with Chagas' Heart Disease

Some individuals with Chagas disease develop right precordial lead ST segment elevation in response to an ajmaline challenge test, and the prevalence of right bundle branch block (RBBB) is also high in Chagas disease. Because these same electrocardiographic abnormalities occur in the Brugada syndrome, which involves genetically defective cardiac sodium channels, acquired damage to cardiac sodium channels may also occur in Chagas disease. We studied several conventional and advanced resting 12-lead/derived Frank-lead ECG parameters in 34 patients with Chagas -related heart disease (mean age 39 14 years) and in 34 age-/gender-matched healthy controls. All ECG recordings were of 5-10 min duration, obtained in the supine position using high fidelity hardware/software (CardioSoft, Houston, TX). Even after excluding those Chagas patients who had resting BBBs, tachycardia and/or pathologic arrhythmia (n=8), significant differences remained in multiple conventional and advanced ECG parameters between the Chagas and control groups (n=26/group), especially in their respective QT interval variability indices, maximal spatial QRS-T angles and low frequency HRV powers (p=0.0006, p=0.0015 and p=0.0314 respectively). In relation to the issue of potential damage to cardiac sodium channels, the Chagas patients had: 1) greater than or equal to twice the incidence of resting ST segment elevation in leads V1-V3 (n=10/26 vs. n=5/26) and of both leftward (n=5/26 versus n=0/26) and rightward (n=7/26 versus n=3/26) QRS axis deviation than controls; 2) significantly increased filtered (40-250 Hz) QRS interval durations (92.1 8.5 versus 85.3 plus or minus 9.0 ms, p=0.022) versus controls; and 3) significantly decreased QT and especially JT interval durations versus controls (QT interval: 387.5 plus or minus 26.4 versus 408.9 plus or minus 34.6 ms, p=0.013; JT interval: 290.5 plus or minus 26.3 versus 314.8 plus or minus 31.3 ms; p=0.0029). Heart rates and Bazett-corrected QTc/JTc intervals were not significantly different between groups. Patients with Chagas heart disease have increased cardiac repolarization abnormalities, especially by advanced ECG. Moreover, as a group, they have decreased uncorrected JT and QT interval durations and increased filtered QRS interval durations (versus age/gender-matched controls), all suggesting a potential loss of cardiac sodium channel function that might be mediated, in part, by cardiac autonomic damage. Overall findings support Brugada et al's recent hypothesis that the pathway leading to sudden death may often be similar in Chagas' disease and Brugada syndrome i.e., damage to the sodium channel (infectious/immunologic/autonomic in Chagas' genetic in Brugada) with consequent loss of sodium currents may facilitate a phase II-reentry based arrhythmic substrate for ventricular fibrillation in both conditions. In general, JT interval-related results have been underreported in the Chagas literature.

Schlegel, T. T.↗

INTERSECT Architecture Specification: System-of-systems Architecture (Version 0.5)

Oak Ridge National Laboratory (ORNL)’s Self-driven Experiments for Science / Interconnected ScienceEcosystem (INTERSECT) architecture project, titled “An Open Federated Architecture for the Laboratory of the Future”, creates an open federated hardware/software architecture for the laboratory of the future using a novel system of systems (SoS) and microservice architecture approach, connecting scientific instruments, robot-controlled laboratories and edge/center computing/data resources to enable autonomous experiments, “self-driving” laboratories, smart manufacturing, and artificial intelligence (AI)-driven design, discovery and evaluation. The architecture project is divided into three focus areas: design patterns; SoS architecture; and microservices architecture. The design patterns area focuses on describing science use cases as design patterns that identify and abstract the involved hardware/software components and their interactions interms of control, work and data flow. The SoS architecture area focuses on an open architecture specification for the federated ecosystem that clarifies terms, architectural elements, the interactions between them and compliance. The microservices architecture describes blueprints for loosely coupled microservices, standardized interfaces, and multi-programming language support. This document is the SoS Architecture specification only, and captures the system of systems architecture design for the INTERSECT Initiative and its components. It is intended to provide a deep analysis and specification of how the INTERSECT platform will be designed, and to link the scientific needs identified across disciplines with the technical needs involved in the support, development, and evolution of a science ecosystem. PLEASE NOTE: This is a working document and reflects current discussions and design activity among the authors. There may be inconsistencies within the document as different parts evolve at a different pace. We invite comments and thoughts from the public on this and following working drafts. The first finished version of this document is scheduled for release in September 2023.

97 MATHEMATICS AND COMPUTING↗

mREST Interface Specification

mREST is an implementation of the REST architecture specific to the management and sharing of data in a system of logical elements. The purpose of this document is to clearly define the mREST interface protocol. The interface protocol covers all of the interaction between mREST clients and mREST servers. System-level requirements are not specifically addressed. In an mREST system, there are typically some backend interfaces between a Logical System Element (LSE) and the associated hardware/software system. For example, a network camera LSE would have a backend interface to the camera itself. These interfaces are specific to each type of LSE and are not covered in this document. There are also frontend interfaces that may exist in certain mREST manager applications. For example, an electronic procedure execution application may have a specialized interface for configuring the procedures. This interface would be application specific and outside of this document scope. mREST is intended to be a generic protocol which can be used in a wide variety of applications. A few scenarios are discussed to provide additional clarity but, in general, application-specific implementations of mREST are not specifically addressed. In short, this document is intended to provide all of the information necessary for an application developer to create mREST interface agents. This includes both mREST clients (mREST manager applications) and mREST servers (logical system elements, or LSEs).

McCartney, Patrick↗

The Design and Development of the SMEX-Lite Power System

This paper describes the design and development of a 250W orbit average electrical power system electronic Power Node and software for use in Low Earth Orbit missions. The mass of the Power Node is 3.6 Kg (8 lb.). The dimensions of the Power Node are 30cm x 26cm x 7.9cm (11 in. x 10.25 in x 3.1 in.) The design was realized using software, Field Programmable Gate Array (FPGA) digital logic and surface mount technology. The design is generic enough to reduce the non-recurring engineering for different mission configurations. The Power Node charges one to five, low cost, 22-cell 4 AH D-cell battery packs independently. The battery charging algorithms are executed in the power software to reduce the mass and size of the power electronic. The Power Node implements a peak-power tracking algorithm using an innovative hardware/software approach. The power software task is hosted on the spacecraft processor. The power software task generates a MIL-STD-1553 command packet to update the Power Node control settings. The settings for the battery voltage and current limits, as well as minimum solar array voltage used to implement peak power tracking are contained in this packet. Several advanced topologies are used in the Power Node. These include synchronous rectification in the bus regulators, average current control in the battery chargers and quasi-resonant converters for the Field Effect Transistor (FET) transistor drive electronics. Lastly, the main bus regulator uses a feed-forward topology with the PWM implemented in an FPGA.

Rakow, Glenn P.↗

SOAREX-8 Suborbital Experiments 2015 - A New Paradigm for Small Spacecraft Communication

In 2015 NASA plans to launch a payload to 280 Km altitude on a sounding rocket from the Wallops Flight Facility. This payload will contain several novel technologies that work together to demonstrate methodologies for space sample return missions and for nanosatellite communications in general. The payload will deploy and test an Exo-Brake, which slows the payload aerodynamically, providing eventual de-orbit and recovery of future ISS samples through a Small Payload Quick Return project. In addition, this flight addresses future Mars mission entry technology, space-to-space communications using the Iridium Short Messaging Service (SMS), GPS tracking, and wireless sensors using the ZigBee protocol. SOAREX-8 is being assembled and tested at Ames Research Center (ARC) and the NASA Engineering and Safety Center (NESC) is funding sensor and communications work. Open source Arduino technology and software are used for system control. The ZigBee modules used are XBee units that connect analog sensors for temperature, air pressure and acceleration measurement wirelessly to the payload telemetry system. Our team is developing methods for power distribution and module mounting, along with software for sensor integration, data assembly and downlink. We have demonstrated relaying telemetry to the ground using the Iridium satellite constellation on a previous flight, but the upcoming flight will be the first time we integrate useful flight test data from a ZigBee wireless sensor network. Wireless sensor data will measure the aerodynamic efficacy of the Exo-Brake permitting further on orbit flight tests of improved designs. The Exo-Brake is 5 sq m in area and will be stored in a container and deployed during ascent once the payload is jettisoned from the launch vehicle. We intend to further refine the hardware and continue testing on balloon launches, future sounding rocket flights and on nanosatellite missions. The use of standards-based and open source hardware/software has allowed for this project to be completed with a very modest budget and a challenging schedule. There is a wealth of hardware and software available for both the Arduino platform and the XBee, all low-cost or open-source. Along with the Exo-Brake hardware and deployment discussion, this paper will describe in detail the system architecture emphasizing the successful use of open source hardware and software to minimize effort and cost. Testing procedures, radio frequency interference (RFI) mitigation, success criteria and expected results will also be discussed. The use of Iridium short messaging capability for space-to-space links, standards-based wireless sensor networks, and other innovative communications technology are also presented.

aerobrake↗

Spaceport Processing System Development Lab

The Spaceport Processing System Development Lab (SPSDL), developed and maintained by the Systems Hardware and Engineering Branch (NE-C4), is a development lab with its own private/restricted networks. A private/restricted network is a network with restricted or no communication with other networks. This allows users from different groups to work on their own projects in their own configured environment without interfering with others utilizing their resources in the lab. The different networks being used in the lab have no way to talk with each other due to the way they are configured, so how a user configures his software, operating system, or the equipment doesn't interfere or carry over on any of the other networks in the lab. The SPSDL is available for any project in KSC that is in need of a lab environment. My job in the SPSDL was to assist in maintaining the lab to make sure it's accessible for users. This includes, but is not limited to, making sure the computers in the lab are properly running and patched with updated hardware/software. In addition to this, I also was to assist users who had issues in utilizing the resources in the lab, which may include helping to configure a restricted network for their own environment. All of this was to ensure workers were able to use the SPSDL to work on their projects without difficulty which would in turn, benefit the work done throughout KSC. When I wasn't working in the SPSDL, I would instead help other coworkers with smaller tasks which included, but wasn't limited to, the proper disposal, moving of, or search for essential equipment. I also, during the free time I had, used NASA's resources to increase my knowledge and skills in a variety of subjects related to my major as a computer engineer, particularly in UNIX, Networking, and Embedded Systems.

Systems Engineering↗

OpenSNAPI: Toward a Unified API for SmartNICs

The end of Moore’s Law and Dennard Scaling has produced a renaissance in the field of computer architecture. Unable to continue leveraging silicon-level processor improvements to further enhance performance and scalability, system architects have been forced to explore other options. In this new era of heterogeneous architectures and hardware/software codesign, a new class of devices known as “accelerators” has emerged. Independently designed for optimized execution of distinct workloads, these devices have proven critical to the continued advancement of application performance. SmartNICs, accelerator devices integrated with a network controller, have conventionally been utilized to offload low-level networking functionality. However, newer SmartNIC variants, which incorporate a system-on-chip (SoC) with traditional designs, are challenging this precedent. Leveraging significantly augmented resources, these new devices offer increased versatility and the potential to more effectively complement a given architecture’s CPU. In this talk, we introduce the motivation underlying acceleration, explore the fundamentals of SmartNICs, and discuss traditional use cases. We also detail our initial efforts to investigate the feasibility and benefits of SmartNICs as general-purpose accelerators. We present the OpenSNAPI project created to define a uniform application programming interface (API) for this emerging class of devices. Finally, we provide a brief tutorial regarding development of SmartNIC-accelerated applications on Los Alamos National Laboratory’s SmartNIC-enabled platforms.

97 MATHEMATICS AND COMPUTING↗