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120 records · Page 7

All sources NASA NTRS DOE OSTI

NASA NTRS2016

M2020/MSL: TDS (Terminal Descent Sensor) DEA (Digital Electronics Assembly)

TDS is the radar used in MSL mission to land Curiosity rover on Mars. TDS will be used again in M2020 mission. DEA is the brain of the TDS where it serves as the controller and digital signal processor. The DEA commands TDS to cycle through the antenna beams making measurements using one of the 6 antenna beams at a time. DEA uses beam sequences and parameter tables to generate measurements. The most important measurements are velocity and range that are used to guide the landing of Curiosity rover. DEA performs these measurement tasks using radar signal processing FPGA firmware and radar microprocessor ‘s hardware and software.

Ashtijou, Mohammad↗

NASA NTRS2018

Context Cameras for the Orbiting Carbon Observatory 3 (OCO-3) Instrument

We have developed an adaptable camera platform that takes advantage of screened and qualified commercial off the shelf (COTS) components (CMOS sensor, rad-tolerant microcircuits, lenses) to significantly shorten development time of space-borne visible imaging systems while reducing the overall cost and risk of the development. This modular camera platform is implemented as a suite of two visible-light cameras for the Orbiting Carbon Observatory 3 (OCO-3) instrument at NASA’s Jet Propulsion Laboratory (JPL). The Internal Context Camera (ICC) and External Context Camera (ECC) provide contextual engineering imaging support for the calibration of the OCO-3 instrument, intended to significantly reduce the duration of the mission’s calibration campaign. The OCO-3 mission has taken advantage of the design and qualification work performed by JPL’s Mars 2020 Enhanced Engineering Camera (EECam) team in reusing the qualified COTS CMOS imaging sensor, proven electronic designs, and scalable field-programmable gate array (FPGA) firmware to meet OCO-3’s mission requirements and resource availability. We will be presenting the steps taken by JPL to design, build, and test the Context Cameras for the OCO-3 mission. We will highlight the design deviations from the Mars2020 EECams and discuss the methodology of tailoring the EECam design for the OCO-3 requirements. Camera imaging capabilities, including focal plane and optical performance, will be presented, as well as a summary of the calibration and environmental test results. Finally, we will discuss the potential for future applications for the Context Cameras.

Moore, Douglas↗

NASA NTRS2018

A GNSS Receiver for Small-Sats Enabling Precision POD, Radio Occultations and Reflections

A low cost, low power, and low mass GNSS receiver (called Cion) has been developed and is currently flying on the CICERO cubesats. The receiver was designed in less than a year by JPL for Tyvak and GeoOptics for use in the GeoOptics CICERO constellation and leverages 25 years of JPL GNSS reciever design experience. Cion uses a commercial off-the-shelf (COTS) computer along with existing space qualified RF down-converters, software, and firmware to produce atmospheric Radio Occultation (RO) data. By combining a FPGA with dual core ARM processor and an embedded system controller, the Xilinx Zynq processor is an enabling technology that provides a customizable digital signal processing platform integrated into the computer (System on a chip) and enables off-the-shelf hardware to become the main engine behind this software defined radio. Using Linux for the on-board computer allows for fast development times and liberal use of existing open source software libraries. The parts of the receiver that require realtime implementation are performed in the Field Programmable Gate Array (FPGA), which can also be reprogrammed in flight. While the Zynq is not rad hard, the silicon on insulator (SOI) technology is rad tolerant ‘by accident’, allowing for its use in many space-based applications. Early results show that the Cion is working as designed, has demonstrated the first known GLONASS occultations, and obtains high quality atmospheric profiles with excellent lower troposphere penetration (near Earth’s surface).

Young, Larry↗

NASA NTRS2019

A common platform for DSN receiver development

NASA's Deep Space Network is currently updating a number of sub systems within the Signal Processing Centers at its Deep Space Communication Complexes in order to modernize aging equipment in the downlink receivers for telemetry, tracking, radio science, and radio astronomy. To reduce development costs and increase commonality among these traditionally custom-built receivers, the implementation team has developed a flexible architecture built primarily around commercial off-the-shelf hardware compliant with the Micro Telecommunications Computing Architecture (uTCA) specification and commercial high speed 10Gbit Ethernet switches. Custom firmware and software are being developed to perform the required signal processing functions needed to replace the legacy systems in a phased implementation approach which establishes a new digital Intermediate Frequency (IF) signal distribution system first, followed by implementations of various receiver functions as dictated by need. The first of these new receivers, the Open Loop Receiver, will come online in the Fall of 2018. A description of the new architecture, referred to as the “Common Platform”, will be provided followed by an overview of the phased implementation approach and initial OLR performance results.

Navarro, Robert↗

NASA NTRS2020

Improved Orbit Determination of the Cygnss Satellites and its Application to Gnss-R Ocean Altimetry

The accuracy of spaceborne ocean surface altimetry depends on precise knowledge of the altimeter satellite orbit. Previous studies of the potential utility of CYGNSS GNSS Reflectometry (GNSS-R) measurements for ocean altimetry have identified its orbit error as a limiting factor. To address this, a recent firmware upgrade to the CYGNSS satellites have enabled the downlink of additional GPS raw measurements from its navigation receiver and increased numerical precision in open-loop GNSS-R tracking information. In this paper, we present improvements to the accuracy of both the orbit determination and the ocean surface height retrievals as a result of these recent upgrades. JPL’s GipsyX software is used to process 120 days of GPS navigation measurements for one of the 8 CYGNSS satellites. Incorporating high fidelity dynamic models and antenna group delay correction, daily orbit overlaps throughout the period show mean RMS differences of 3 cm in height, 7 cm in cross-track, and 10 cm in along-track. Applying these new orbits reduced the standard deviation of retrieved surface height anomalies. When spatially averaged, the sea surface height anomalies were reduced from 1.0 m to 0.8 m. Further improvements are expected using new ionospheric corrections and re-tracking methods currently in development.

Conrad, Alex↗

NASA NTRS2021

A High Dynamic-Range Photon-Counting Receiver for Deep Space Optical Communication

The Deep Space Optical Communication (DSOC) project will demonstrate free-space optical communication at almost 3 AU, or 3 orders of magnitude further than any previous attempt. DSOC will utilize the 5m Palomar Hale Telescope to receive the downlink signal, which will couple the downlink light onto an optical table and into a superconducting nanowire single photon detector (SNSPD). The output of the SNSPD is digitized by the Ground Laser Receiver Signal Processing Assembly (GSPA) using a high throughput streaming time to digital converter (TDC). The GSPA is a scalable FPGA-based receiver which demodulates and decodes the DSOC downlink signal through novel signal processing algorithms implemented on Xilinx UltraScale+ FPGAs, as well as Python-based software monitor and control routines. Exploiting the unique TDC-based architecture, the GSPA supports over four orders of magnitude of downlink data rates across multiple orders of magnitude of signal and background powers. In this paper we present an overview of the hardware, firmware and software architectures to implement this system, as well as performance analysis for links ranging from near-Earth to 2.8 AU.

Srinivasan, Meera↗

NASA NTRSDate not supplied

Recovering from On-orbit Anomalies on the Astrobee Free Flyers and its Systems

Since 2019, NASA has been operating three Astrobee free flying robots on board the International Space Station (ISS) providing an autonomous and flexible research platform for national and international payload developers in microgravity and serving as a robotic assistant for astronauts on the ISS. During its use on the ISS, in particular with over 750 hours of free-flyer operation as of March 2022, Astrobee and its Docking Station have encountered multiple software and hardware anomalies. These anomalies were either resolved remotely via software and firmware updates, or, where not possible, with hardware replacements on orbit or by the return of the faulty unit to NASA’s ground facilities for its repair. Despite being inherently designed to be repaired or replaced on orbit, Astrobee and its systems can still suffer anomalies that would be complex enough to disassemble, cause risks of hardware damage, or use excessive crew time to perform the repair in orbit. That was the case for the anomaly the Astrobee unit ‘Honey’ encountered, reason why it needed to be down-massed for repair. One of the most common points of failure was found to be the SD card, which is used for the different Astrobee processors and for the Dock Station. Other comparable SD card anomalies were found also on the Astrobee ground units, which provided useful data in the effort of upgrading their systems. This presentation will focus on 1) The overview of the different faults and anomalies on Astrobee and its systems on orbit and on the ground 2) The processes and procedures implemented to resolve the anomalies 3) The implementation of software updates and hardware upgrades in order to reduce the risk on returning anomalies 4) The lessons learned in increasing Astrobee’s robustness and resilience to such anomalies.

International Space Station↗

NASA NTRS2022

Rapid Flight Control Law Deployment and Testing Framework for Subscale VTOL Aircraft

A set of procedures was developed to enable rapid flight control law deployment and testing on subscale vertical takeoff and landing (VTOL) aircraft. Low-cost, subscale flight vehicles have become well-suited testbeds for rapid flight dynamics and controls research progression; however, integration of custom flight control laws onto flight hardware has historically been an arduous task. The toolchain described in this report leverages Simulink with the UAV Toolbox, a Pixhawk flight computer running PX4 firmware, and QGroundControl to efficiently design and flight test custom control algorithms. A subscale CL-84 VTOL aircraft was used as a testbed in this investigation to exercise the hardware integration process on a physical model. Implementation of custom attitude stabilization control laws and programmed test input excitations for aircraft system identification were demonstrated using the expeditious hardware integration process. The detailed procedures given in this report are expected to be used in future flight test efforts.

flight testing↗

NASA NTRS2022

Radar Back End for NASA/ISRO Synthetic Aperture Radar (NISAR) Instrument

In this paper we present design, manufacture and qualification of a Radar Back End (RBE) for NISAR Mission’s Synthetic Aperture Radar (SAR) Instrument. The instrument uses Sweep SAR technique to generate high fidelity radar images while capturing an image over a large swath. It requires highly stable clocks to accomplish that. NISAR RBE is the heart of the L-band Synthetic Aperture Radar (LSAR) instrument. It generates radar’s transmit chirp signals, ultra-stable clocks and oscillators signals. In order to generate ultra-stable clocks some novel filtering and frequency multiplication techniques were utilized. These techniques have been presented in this paper. NISAR mission requires over 200 chirps to perform science measurements. Hardware and firmware architecture utilized to generate chirps have been presented in this paper. Unique space qualified techniques for DC to DC conversion has been presented in this paper. In addition, RBE was designed to be block redundant space qualified assembly. Novel cross strapping techniques were implemented to achieve that. Validation and qualification process employed to certify RBE flight hardware for flight has been presented in this paper.

Quddus, Momin↗

NASA NTRS2024

Inexpensive Multirotor Platform for Advanced Controls Testing (IMPACT): Development, Integration, and Experimentation

A comprehensive framework was explored and validated for rapid deployment and testing of custom flight control logic using the Inexpensive Multirotor Platform for Advanced Controls Testing (IMPACT). This vehicle facilitated the efficient validation and refinement of a custom flight control algorithm, which was designed using Simulink and deployed onto a Pixhawk flight computer running PX4 firmware through the utilization of the MathWorks UAV Toolbox. The robust and cost-effective design of IMPACT provides the groundwork for future flight testing of flight controls and model development research for electric vertical takeoff and landing (eVTOL) aircraft.

flight testing↗

NASA NTRS2017

Programmable Logic Device (PLD) Design Description for the Integrated Power, Avionics, and Software (iPAS) Space Telecommunications Radio System (STRS) Radio

The Space Telecommunications Radio System (STRS) provides a common, consistent framework for software defined radios (SDRs) to abstract the application software from the radio platform hardware. The STRS standard aims to reduce the cost and risk of using complex, configurable and reprogrammable radio systems across NASA missions. To promote the use of the STRS architecture for future NASA advanced exploration missions, NASA Glenn Research Center (GRC) developed an STRS compliant SDR on a radio platform used by the Advance Exploration System program at the Johnson Space Center (JSC) in their Integrated Power, Avionics, and Software (iPAS) laboratory. At the conclusion of the development, the software and hardware description language (HDL) code was delivered to JSC for their use in their iPAS test bed to get hands-on experience with the STRS standard, and for development of their own STRS Waveforms on the now STRS compliant platform.The iPAS STRS Radio was implemented on the Reconfigurable, Intelligently-Adaptive Communication System (RIACS) platform, currently being used for radio development at JSC. The platform consists of a Xilinx ML605 Virtex-6 FPGA board, an Analog Devices FMCOMMS1-EBZ RF transceiver board, and an Embedded PC (Axiomtek eBox 620-110-FL) running the Ubuntu 12.4 operating system. Figure 1 shows the RIACS platform hardware. The result of this development is a very low cost STRS compliant platform that can be used for waveform developments for multiple applications.The purpose of this document is to describe the design of the HDL code for the FPGA portion of the iPAS STRS Radio particularly the design of the FPGA wrapper and the test waveform.

VHDL↗

NASA NTRS2017

Hardware Interface Description for the Integrated Power, Avionics, and Software (iPAS) Space Telecommunications Radio Ssystem (STRS) Radio

The Space Telecommunications Radio System (STRS) provides a common, consistent framework for software defined radios (SDRs) to abstract the application software from the radio platform hardware. The STRS standard aims to reduce the cost and risk of using complex, configurable and reprogrammable radio systems across NASA missions. To promote the use of the STRS architecture for future NASA advanced exploration missions, NASA Glenn Research Center (GRC) developed an STRS-compliant SDR on a radio platform used by the Advance Exploration System program at the Johnson Space Center (JSC) in their Integrated Power, Avionics, and Software (iPAS) laboratory. The iPAS STRS Radio was implemented on the Reconfigurable, Intelligently-Adaptive Communication System (RIACS) platform, currently being used for radio development at JSC. The platform consists of a Xilinx ML605 Virtex-6 FPGA board, an Analog Devices FMCOMMS1-EBZ RF transceiver board, and an Embedded PC (Axiomtek eBox 620-110-FL) running the Ubuntu 12.4 operating system. Figure 1 shows the RIACS platform hardware. The result of this development is a very low cost STRS compliant platform that can be used for waveform developments for multiple applications.The purpose of this document is to describe how to develop a new waveform using the RIACS platform and the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) FPGA wrapper code and the STRS implementation on the Axiomtek processor.

Flight Computer↗