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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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slaclab/cpswTreeGUI
Graphical User Interface based on CPSW to interact with a Firmware register tree.
slaclab/cryo-wib-firmware
This is the repository for "cryo-wib-firmware" developed by SLAC National Accelerator Laboratory.
Idaho National Laboratory Data Acquisition And Processing System
The INLDAS data acquisition and processing system is designed to develop prototype measurements and real-time processing techniques. The INLDAS hardware and firmware currently consists of National Instruments • NI-DAQmx 14.1 • cDAQ-9184 • 9205 • 9211 INLDAS can perform of standard data acquisition functions as well as novel functions and real-time processing algorithms. There are 3 acquisition modes to choose from: • Continuous mode runs when the user hits start, processing data and logging it to file • SWTrigger mode waits for one or more predefined triggers before acquiring data. It will buffer data as well, so it can record data that happened shortly before the trigger • Wakeup mode waits on predefined timers. When a time goes off, it acquires a preset amount of data There are also 3 Data Processing Modes • Normal mode does no processing besides the rolling average • FFT Mode Performs an FFT on incoming data every time the time window has elapsed • STFFT mode
Direct-Sampling Beam Position Monitor (dsbpm) v1.0
Direct-Sampling Beam Position Monitor is an FPGA gateware and embedded firmware that run on evaluation kits (either Xilinx ZCU111 or Xilinx ZCU208 ) that digitizes signals up to 4GSPS and 4GHz analog bandwidth, which can be synchronized to the accelerator timing system, providing synchronous sampling frequency/phase digitization. In addition to these capabilities, a proof of concept for a beam position monitor is also present, providing an envelope detection algorithm capable of determining the transverse beam position for an electron circular accelerator, such as ALS/ALS-U.
Multichannel Digital Signal Processing for Radiation Detection and Imaging Systems (MDSP) v1
The invention entails a firmware and software that is a digital communication architecture for multichannel readout electronics with fast ADCs. In addition, the invention provides a framework for real time digital signal processing of radiation detector electronic signals in FPGA.
OPET Hardware (Open PV Electrical Tool Hardware) [SWR-25-42]
OPET (Open-source Photovoltaic Electrical Tool) is used for performance measurements of solar photovoltaic (PV) devices in the field under natural sunlight or in the lab under artificial light. Its primary use is in research and development of solar cells and modules, specifically in reliability and durability research of PV devices. Some features and functions include: -IV curve measurements with linear or cosine distributed measurement points -PV device active loading at open circuit voltage (Voc), short circuit current (Isc) and maximum power point (Pmp) -Bias power supply to overcome series resistance in contact wires for Isc measurements and loading -PV voltage input in five ranges from 1V to 100V -PV current input ranges -Low current version, six current ranges from 1.1mA to 340mA -High current version, six current ranges from 50mA to 15A -IO ports for I2C and SPI temperature sensor Arduino extension boards -Integrated fan control This repository contains everything relating to the hardware of the OPET device. If you are looking for the firmware or software repositories, links are below: https://github.com/NREL/opet-firmware https://github.com/NREL/opet-control
OPET Control (Open PV Electrical Tool Control Software) [SWR-25-44]
Software interface for controlling and collecting data from the Open PV Electrical Tool (OPET) device. This repository contains everything relating to the control of the OPET device including source code. If you are looking for the hardware or firmware software repositories, links are below: https://github.com/NREL/opet-hardware https://github.com/NREL/opet-firmware
ARCADE (Advanced Reactor Cyber Analysis and Development Environment)
SAND2025-11780O ARCADE (Advanced Reactor Cyber Analysis and Development Environment) software performs cybersecurity experiments on Defensive Cyber Security Architectures (DCSA) for Distributed Control Systems (DCSs). The application is integrated into a cohesive environment that performs cyber risk analyses and reduces costs. ARCADE can investigate the entire cyber-attack surface of a DCS from the physics of control, down to the firmware of individual components with automated efficiency. ARCADE has five major functional components: the Data Broker system, the virtualization environment, the cyber-attack simulator, the cyber-physical analysis system, and the physics simulator. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.
Dtc Commercialization Software Package
This code is the complete software and firmware components supporting DTC model radios H2 and BluSDR6. This software package contains all the hardware boot up code/config files(BSP), user space Linux code (Web, Network, MAC (media access control) & drivers), the field programable gate array HDL (hardware description language) code and the build environment to compile and organize these components together to work in the aforementioned radios. Additional details of these components are as follows: • Hardware support components o Board support package and configuration files o uBoot • Linux Components: o The web components include the user interface for setup, configuration, and status components of the system. o Vulture code configures the radio’s IP network, configures radio parameters and runs the MAC layer of the radio. • The Field Programmable Gate Array HDL contains hardware drivers, interface logic to go between the software to the physical layer and the radio hardware as well as the logic for the physical layer of the radio. • Build environment includes compilers and config files that compile and organize all the other components to be able to be run on the radios.
Open Source Software Prevalence Ingest Tool
The OSSP Ingest Tool accepts user-input organizational information, ingests IT/OT asset lists in Excel format, and ingests the associated CycloneDX SBOM's. It then performs analytics demonstrating the ability to answer the follow research questions: o RQ1. Ability to identify all OSS services running on, and all OSS components present within, an OT device o RQ1a: Ability to differentiate multiple versions of the same OSS component within each OT device. o RQ1b: Ability to differentiate running from not-running OSS components. o RQ1c: Ability to differentiate based on the originator of the component, because a supplier may have modified it after retrieval from the upstream software source. o RQ2. Ability to correlate the identity of a single OSS component across multiple OT devices, mitigating common name variations such as differences in capitalization, '-' vs '_', and so on. o RQ3. Ability to perform subset analysis of OSS components across multiple OT devices o RQ3a: Ability to perform subset analysis across OSS libraries, generating density & distribution graphs to identify commonly-used libraries and outliers. o RQ3b: Ability to perform subset analysis of a single OSS library, generating density & distribution by CI sector, by device type, by device make/model, and/or by firmware version. o RQ3c: Ability to perform subset analysis by grouping OSS libraries according to programming language, then overlay with RQ4b. o RQ3d: Ability to perform subset analysis by OSS upstream source, providing insight into degree of modifications performed by suppliers. o RQ4. Ability to identify dependencies (transitive and direct) of each differentiated OSS library within each OT device, and enable RQ1,2,3 iteratively for dependencies. o RQ1. Ability to identify all OSS services running on, and all OSS components present within, an OT device o RQ1a: Ability to differentiate multiple versions of the same OSS component within each OT device. o RQ1b: Ability Page
OLCF Summit Supercomputer GPU Snapshots During Double-Bit Errors and Normal Operations
As we move into the exascale era, the power and energy footprints of high-performance computing (HPC) systems have grown significantly larger. Due to the harsh power and thermal conditions the system, components are exposed to extreme operating conditions. Operation of such modern HPC systems requires deep insights into long term system behavior to maintain its efficiency as well as its longevity. To help the HPC community to gain such insights, we provide double-bit errors using system telemetry data and logs collected from the Summit supercomputer, equipped with 27,648 Tesla V100 GPUs with 2nd-generation high-bandwidth memory (HBM2). The dataset relies on Nvidia XID records internally collected by GPU firmware at the time of failure occurrence, on the reboot-time logs of each Summit node, on node-level job scheduler records collected after each job termination, and on a 1Hz data rate from the baseboard management controllers (BMCs) of each Summit compute node using the OpenBMC event subscription protocol. Technical details can be found in the paper Oles et. al “Understanding GPU Memory Corruption at Extreme Scale: The Summit Case Study” ICS’24 (https://doi.org/10.1145/3650200.3656615).
REGULATORY REQUIREMENTS, GUIDANCE, AND REVIEW OF EMBEDDED DIGITAL DEVICES IN SAFETY SYSTEMS
Interest in embedded digital devices (EDDs) for monitoring and providing control of components is increasing in the nuclear power market as more and more users both within and outside the nuclear sector are employing EDDs. EDDs in other industries or countries may be known by the related terms as smart devices, devices of limited functionality, or intelligent devices. EDDs can sometimes perform a safety role when embedded in components such as temperature transmitters, pressure transmitters, voltage regulators, gas analyzers, boiler controllers, relays, and radiation monitors. The introduction of EDDs can affect safety by creating new hazards, vulnerabilities, failure modes, triggering mechanisms, and other potential safety concerns at both the component and system levels. The U.S. Nuclear Regulatory Commission’s (NRC’s) existing regulations and guidance cover the use of EDDs in safety-related and important to safety systems in nuclear power plants (NPPs). In addition to potential future challenges, the nature of EDDs being implemented in similar or identical manners between different plants and industries opens up the potential of leveraging the reviews of other regulators or utilization of industry certifications.Key words: embedded digital device, firmware
New machine protection system at the Spallation Neutron Source – design process and performance analysis
A New Machine Protection System (MPS) at the Spallation Neutron Source (SNS) was developed and implemented on µTCA-based hardware platforms. The system monitors more than 2500 field inputs and shuts off the beam within 10 µs if adverse events occur. We will present system level design process of various firmware and software components as well as the system integration into EPICS environment. The performance analysis of the MPS after two SNS run cycles will also be presented.
JLAB LLRF 3.0 Development and Tests
The Jefferson Lab LLRF 3.0 system is being developed to replace legacy LLRF systems in the CEBAF accelerator. The new design builds upon 25 years of design and operational RF control experience, and our recent collaboration in the design of the LCLSII LLRF system. The new cavity control algorithm is a fully functional phase and amplitude locked Self Exciting Loop (SEL). This paper discusses the progress of the LLRF 3.0 hardware design, FPGA firmware development, User Datagram Protocol (UDP) operation, and recent LLRF 3.0 system tests on the CEBAF Booster cryomodule in the Upgrade Injector Test Facility (UITF).
DIRECT RF SAMPLING BASED LLRF CONTROL SYSTEM FOR C-BAND LINEAR ACCELERATOR
Low Level RF (LLRF) control systems of linear accel- erators (LINACs) are typically implemented with hetero- dyne based architectures, which have complex analog RF mixers for up and down conversion. The Gen 3 Radio Fre- quency System-on-Chip (RFSoC) device from AMD Xilinx integrates data converters with maximum RF frequency of 6 GHz. This enables direct RF sampling of C-band LLRF signal typically operated at 5.712 GHz without any analogue mixers, which can significantly simplify the system architec- ture. The data converters sample RF signals in higher order Nyquist zones and then up or down convert digitally by the integrated data path in RFSoC. The closed-loop feedback control firmware implemented in FPGA integrated in RF- SoC can process the base-band signal from the ADC data path and calculate the updated phase and amplitude to be up- mixed by the DAC data path. We have developed a C-band LLRF control RFSoC platform with direct RF sampling, which targets Cool Copper Collider (𝐶3) and other C or S band LINAC research and development projects. In this paper, the architecture of the platform will be described. We have optimized the configuration of the data converter and characterized performance of them with RF pulses. The test results for some of the key performance parameters for the LLRF platform with our custom solid-state amplifier, such as phase and amplitude stability, will be discussed in this paper.
First SELAP Algorithm Operational Experience of the New LLRF 3.0 RF Control System
The JLAB LLRF 3.0 system has been developed and is replacing the 30-year-old LLRF systems in the CEBAF accelerator. The LLRF system builds upon 25 years of design and operational RF control experience (digital and analog), and our recent collaboration in the design of the LCLSII LLRF system. The new system also incorporates a cavity control algorithm using a fully functional phase and amplitude locked Self Exciting Loop (SELAP). The first system (controlling 8 cavities) was installed and commissioned in August of 2021. Since then the new LLRF system has been operating with cavity gradients up to 20 MV/m, and electron beam currents up to 350 uA. This paper discusses the operational experience of the LLRF 3.0 SELAP algorithm along with other software and firmware tools like cavity and klystron characterization and quench detection.