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Results for “Fault Tolerant Algorithms”

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110 records · Page 7

Mild hybridisation of turboprop engine with high-power-density integrated electric drives

Here this paper shares with the aerospace community a case study of turboprop mild hybridisation using a recently developed integrated drive system in the University of Nottingham, UK, within the ACHIEVE project under EU H2020 CleanSky 2 program (project No. 737814). The developed drive system enables green taxiing of a turboprop aircraft while on the ground with its engine off, and as an electrical generator when the turboprop is in the air. The entire system is designed to be able to integrate within the power auxiliary gear box (PAGB) of a turboprop aircraft. Some of the key features of the developed system include a high-speed permanent magnet machine (up to 14,200rpm) with dual three-phase design, SiC-based high power density (11.8kW/L for the power converter, 35.3kW/L and 7.2kW/kg for the machine active parts), integrated cooling design for high-temperature operation (>130°C ambient temperature), fault tolerance consideration with dual channel operation capabilities and sensorless control for entire operational conditions. This paper is giving an overview of the design process of the electrical machine, power converters, and its cooling of the entire drive. Numerical analysis (FEM and CFD) and some experimental results are presented to demonstrate the effectiveness and the desired performance of the developed integrated drive system.

42 ENGINEERING↗

Modular Quantum Processor with an All-to-All Reconfigurable Router

Superconducting qubits provide a promising approach to large-scale fault-tolerant quantum computing. However, qubit connectivity on a planar surface is typically restricted to only a few neighboring qubits. Achieving longer-range and more flexible connectivity, which is particularly appealing in light of recent developments in error-correcting codes, however, usually involves complex multilayer packaging and external cabling, which is resource intensive and can impose fidelity limitations. Here, we propose and realize a high-speed on-chip quantum processor that supports reconfigurable all-to-all coupling with a large on-off ratio. We implement the design in a four-node quantum processor, built with a modular design comprising a wiring substrate coupled to two separate qubit-bearing substrates, each including two single-qubit nodes. We use this device to demonstrate reconfigurable controlled-𝑍 gates across all qubit pairs, with a benchmarked average fidelity of 96.00% ± 0.08% and best fidelity of 97.14% ± 0.07%, limited mainly by dephasing in the qubits. We also generate multiqubit entanglement, distributed across the separate modules, demonstrating GHZ-3 and GHZ-4 states with fidelities of 88.15% ± 0.24% and 75.18% ± 0.11%, respectively. This approach promises efficient scaling to larger-scale quantum circuits and offers a pathway for implementing quantum algorithms and error-correction schemes that benefit from enhanced qubit connectivity.

Quantum circuits↗