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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

Automation of Nanoparticle Synthesis Processes in a Plasma Environment Using LabVIEW

This work presents an automated control system for the synthesis of nanomaterials by plasma-enhanced chemical vapor deposition (PECVD), implemented using the LabVIEW software environment. The main objective of the study is to develop an integrated hardware-software platform that enables sequential control of the key stages of the PECVD process, including vacuum chamber preparation, pressure monitoring, working gas supply, plasma ignition, power matching, cyclic nanomaterial growth, and optical monitoring of nanoparticles in the plasma environment. The use of LabVIEW made it possible to integrate actuator control, experimental parameter acquisition, and realtime process visualization within a single automated system. The automated cycle begins with evacuation of the reaction chamber to a predefined base pressure. Transition to the next stage is permitted only after the specified pressure threshold has been reached, ensuring reproducible initial conditions for each experiment. The program then controls the supply of the working gas through mass flow controllers (MFCs). In this work, two gas-flow control modes were considered: analog control using a 0-5 V voltage signal and digital communication via RS-232 interface. It was shown that the analog approach requires accurate scaling of the control voltage, since applying 5 V corresponds to full-scale opening of the controller and results in the maximum gas flow. In contrast, the RS232 interface enables the gas flow rate to be specified directly in sccm, improving the accuracy, flexibility, and convenience of gas-environment control. After pressure stabilization, LabVIEW initiates RF plasma ignition and executes the RF matching algorithm aimed at minimizing reflected power and improving the stability of the plasma process. A separate software module implements the cyclic nanomaterial growth mode, in which the plasma-on time, plasma duration, and total number of synthesis cycles are predefined. This approach makes it possible to control material accumulation on the substrate and to correlate the process parameters with the morphological characteristics of the resulting nanostructures. The final module of the system is designed for optical monitoring of the nanoparticle cloud density in dusty plasma. For this purpose, the change in the intensity of laser radiation passing through the plasma region is recorded using a photodetector and a Keithley 2401 measuring unit connected to LabVIEW via RS-232 interface. The difference between the initial and modified optical signal intensity is used as a diagnostic parameter characterizing the formation and temporal evolution of nanoparticles. The developed system demonstrates that LabVIEW can be effectively applied not only for the automation of individual instruments, but also for the implementation of a complete digital control cycle for PECVD-based nanomaterial synthesis.

PECVD↗
DOE OSTI2025

Quantum frequency resampling

In signal processing, resampling algorithms can modify the number of resources encoding a collection of data points. Downsampling reduces the cost of storage and communication, while upsampling interpolates new data from limited one, e.g., when resizing a digital image. We present a toolset of quantum algorithms to resample data encoded in the probabilities of a quantum register, using the quantum Fourier transform to adjust the number of high-frequency encoding qubits. We discuss advantage over classical resampling algorithms.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2020

A secure measurement unit for an inspection system used in nuclear arms-control verification

Verification of arms control treaties may require information barriers to protect sensitive data acquired during the verification process. These information barriers are commonly implemented in software, but must store and operate on data that are vulnerable to attack and tampering. Here, we present a new Secure Measurement Unit based on a modified pipeline SAR ADC architecture. The idea is to move the information barrier back into the digitization process so that prohibited data is never created. A prototype 65nm CMOS Secure Measurement Unit (SMU) was tested using U-235, U-238, Co-60, Cs-137 and Am-241 sources. Here, the prototype accurately digitized allowable signals while being immune to side-channel attacks on signals within preset forbidden regions.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

System and method for high power diode based additive manufacturing

The present disclosure relates to a system for performing an Additive Manufacturing (AM) fabrication process on a powdered material, deposited as a powder bed and forming a substrate. The system makes use of a laser for generating a laser beam, and an optical subsystem. The optical subsystem is configured to receive the laser beam and to generate an optical signal comprised of electromagnetic radiation sufficient to melt or sinter the powdered material. The optical subsystem uses a digitally controlled mask configured to pattern the optical signal as needed to melt select portions of a layer of the powdered material to form a layer of a 3D part. A power supply and at least one processor are also included for generating a plurality of different power density levels selectable based on a specific material composition, absorptivity and diameter of the powder particles, and a known thickness of the powder bed. The powdered material is used to form the 3D part in a sequential layer-by-layer process.

El-Dasher, Bassem S.↗
DOE OSTI2022

SULI Research Report Paper

The Intelligence and Space Research Group 4 (ISR-4) at the Los Alamos National Laboratory focuses on signal processing and developing space electronics for various national security missions. The Space and Atmospheric Burst Reporting System (SABRS) is a sensing payload designed for nuclear detonation detection. As the sensors from previous payloads become obsolete, the requirement for a novel payload design increases. SABRS Prime is the successor to the previous SABRS payloads and is scheduled for delivery in 2028. As part of the SABRS Prompt Gamma Instrument Interface Board, high frequency signals from silicon photomultiplier tubes need to be split and subsequently transmitted to the Analog to Digital Converter. Prior to developing the Space Grade Instrument Interface Board, evaluation modules with Commercial off-the-shelf (COTS) components are evaluated and tested under rigorous conditions. Verification of power levels and gain specifications are some of the important steps taken during the evaluation stage. Working on the Signal Splitting Board has enabled me to work with various schematic software applications and learn more about the processes behind designing space grade electronic components. In addition, I conducted research on efficiency improvements for space-based power systems. Changes in design approaches were found to be the most significant sources of improvement. Being able to interact with researchers and peers across various scientific disciplines has given me a better insight into my future pursuits. Working in a R&D environment has cemented my decision to work on space applications for Quantum Sensing and pursue a PhD in Electrical Engineering. The SULI internship program at the Los Alamos National Laboratory has helped me develop the skillset of a researcher, understand the rigorous processes behind developing space grade hardware, and improve my critical thinking abilities to support the development of reliable instrumentation for deep space missions.

45 MILITARY TECHNOLOGY, WEAPONRY, AND NATIONAL DEF↗
DOE OSTI2024

Low Energy Neutron-induced Charged-particle (Z) (LENZ) instrument development with a focus on pulse shape discrimination for low-energy charged particles

To study neutron-induced charged-particle reactions with high precision, the Low Energy Neutron-induced Charged-particle (Z) instrument (LENZ) was developed at the Los Alamos Neutron Science Center. For the interest of measuring (n,p) and (n, α) reactions simultaneously, Pulse Shape Discrimination methods were investigated to identify different charged particles in the energy range of 3 - 20 MeV and improve signal-to-background ratios using Double-sided Silicon Strip Detectors and waveform digitizers. The risetime and pulse shape properties of detected charged particles were characterized for various silicon detector’s thickness with different orientations. During the post-processing of waveforms, we implemented different digital filters for effective particle identifications and improved energy- and timing- resolutions. We validated the optimized digital filters and pulse shape analyses, via measurements with 228 Th and 229 Th calibration sources, proton-induced reactions on a 7 LiF target, and neutron-induced reactions on CH 2 , Ta 2 O 5 , 58 Ni, and 6 LiF/ 59 Ni targets at the time-of-flight facility, LANSCE. In conclusion, the summary of effective thresholds and Figure of Merits on separating different charged particles is reported.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

The QICK (Quantum Instrumentation Control Kit): Readout and control for qubits and detectors

We introduce a Xilinx RF System-on-Chip (RFSoC)-based qubit controller (called the Quantum Instrumentation Control Kit, or QICK for short), which supports the direct synthesis of control pulses with carrier frequencies of up to 6 GHz. The QICK can control multiple qubits or other quantum devices. The QICK consists of a digital board hosting an RFSoC field-programmable gate array, custom firmware, and software and an optional companion custom-designed analog front-end board. We characterize the analog performance of the system as well as its digital latency, important for quantum error correction and feedback protocols. We benchmark the controller by performing standard characterizations of a transmon qubit. We achieve an average gate fidelity of ℱ avg =99.93%. All of the schematics, firmware, and software are open-source.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

Waveform processing using neural network algorithms on the front-end electronics

In a multi-channel radiation detector readout system, waveform sampling, digitization, and raw data transmission to the data acquisition system constitute a conventional processing chain. The deposited energy on the sensor is estimated by extracting peak amplitudes, area under pulse envelopes from the raw data, and starting times of signals or time of arrivals. However, such quantities can be estimated using machine learning algorithms on the front-end Application-Specific Integrated Circuits (ASICs), often termed as “edge computing”. Edge computation offers enormous benefits, especially when the analytical forms are not fully known or the registered waveform suffers from noise and imperfections of practical implementations. In this work, we aim to predict peak amplitude from a single waveform snippet whose rising and falling edges containing only 3 to 4 samples. We thoroughly studied two well-accepted neural network algorithms, Multi-Layer Perceptron (MLP) and Convolutional Neural Network (CNN) by varying their model sizes. Further, to better fit front-end electronics, neural network model reduction techniques, such as network pruning methods and variable-bit quantization approaches, were also studied. By combining pruning and quantization, our best performing model has the size of 1.5 KB, reduced from 16.6 KB of its full model counterpart. It can reach mean absolute error of 0.034 comparing to that of a naive baseline of 0.135. Such parameter-efficient and predictive neural network models established feasibility and practicality of their deployment on front-end ASICs.

47 OTHER INSTRUMENTATION↗
DOE OSTI2022

Modeling Analog Tile-Based Accelerators Using SST

Analog computing has been widely proposed to improve the energy efficiency of multiple important workloads including neural network operations, and other linear algebra kernels. To properly evaluate analog computing and explore more complex workloads such as systems consisting of multiple analog data paths, system level simulations are required. Moreover, prior work on system architectures for analog computing often rely on custom simulators creating signficant additional design effort and complicating comparisons between different systems. To remedy these issues, this report describes the design and implementation of a flexible tile-based analog accelerator element for the Structural Simulation Toolkit (SST). The element focuses on heavily on the tile controller—an often neglected aspect of prior work—that is sufficiently versatile to simulate a wide range of different tile operations including neural network layers, signal processing kernels, and generic linear algebra operations without major constraints. The tile model also interoperates with existing SST memory and network models to reduce the overall development load and enable future simulation of heterogeneous systems with both conventional digital logic and analog compute tiles. Finally, both the tile and array models are designed to easily support future extensions as new analog operations and applications that can benefit from analog computing are developed.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Deep learning for Alzheimer's disease: Mapping large-scale histological tau protein for neuroimaging biomarker validation

Abnormal tau inclusions are hallmarks of Alzheimer's disease and predictors of clinical decline. Several tau PET tracers are available for neurodegenerative disease research, opening avenues for molecular diagnosis in vivo. However, few have been approved for clinical use. Understanding the neurobiological basis of PET signal validation remains problematic because it requires a large-scale, voxel-to-voxel correlation between PET and (immuno) histological signals. Large dimensionality of whole human brains, tissue deformation impacting co-registration, and computing requirements to process terabytes of information preclude proper validation. We developed a computational pipeline to identify and segment particles of interest in billion-pixel digital pathology images to generate quantitative, 3D density maps. The proposed convolutional neural network for immunohistochemistry samples, IHCNet, is at the pipeline's core. We have successfully processed and immunostained over 500 slides from two whole human brains with three phospho-tau antibodies (AT100, AT8, and MC1), spanning several terabytes of images. Our artificial neural network estimated tau inclusion from brain images, which performs with ROC AUC of 0.87, 0.85, and 0.91 for AT100, AT8, and MC1, respectively. Introspection studies further assessed the ability of our trained model to learn tau-related features. We present an end-to-end pipeline to create terabytes-large 3D tau inclusion density maps co-registered to MRI as a means to facilitate validation of PET tracers.

60 APPLIED LIFE SCIENCES↗
DOE OSTI2022

Implementation of a Binary Neural Network on a Passive Array of Magnetic Tunnel Junctions

The increasing scale of neural networks and their growing application space have produced demand for more energy- and memory-efficient artificial-intelligence-specific hardware. Avenues to mitigate the main issue, the von Neumann bottleneck, include in-memory and near-memory architectures, as well as algorithmic approaches. In this report we leverage the low-power and the inherently binary operation of magnetic tunnel junctions (MTJs) to demonstrate neural network hardware inference based on passive arrays of MTJs. In general, transferring a trained network model to hardware for inference is confronted by degradation in performance due to device-to-device variations, write errors, parasitic resistance, and nonidealities in the substrate. To quantify the effect of these hardware realities, we benchmark 300 unique weight matrix solutions of a two-layer perceptron to classify the Wine dataset for both classification accuracy and write fidelity. Despite device imperfections, we achieve software-equivalent accuracy of up to 95.3% with proper tuning of network parameters in 15 x 15 MTJ arrays having a range of device sizes. The success of this tuning process shows that new metrics are needed to characterize the performance and quality of networks reproduced in mixed signal hardware.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

ETROC1: the first full chain precision timing prototype ASIC for CMS MTD endcap timing layer upgrade

We present the design and characterization of the first fullchain precision timing prototype ASIC, named ETL Readout Chipversion 1 (ETROC1) for the CMS MTD endcap timing layer (ETL)upgrade. The ETL utilizes Low Gain Avalanche Diode (LGAD) sensors todetect charged particles, with the goal to achieve a time resolutionof 40–50 ps per hit, and 30–40 ps per track with hits from twodetector layers. The ETROC1 is composed of a 5 × 5 pixelarray and peripheral circuits. The pixel array includes a4 × 4 active pixel array with an H-tree shaped networkdelivering clock and charge injection signals. Each active pixel iscomposed of various components, including a bump pad, a chargeinjection circuit, a pre-amplifier, a discriminator, adigital-to-analog converter, and a time-to-digital converter. Thesecomponents play essential roles as the front-end link in processingLGAD signals and measuring timing-related information. Theperipheral circuits provide clock signals and readoutfunctionalities. The size of the ETROC1 chip is7 mm× 9 mm. ETROC1 has been fabricated in a 65 nmCMOS process, and extensively tested under stimuli of chargeinjection, infrared laser, and proton beam. The time resolution ofbump-bonded ETROC1 + LGAD chipsets reaches 42–46 ps per hit in thebeam test.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2026

ML–Enabled FPGA Framework for Fast Quantum State Discrimination in Mid-Circuit Measurement Regimes

Accurate and low-latency quantum state discrimination is essential for protocols involving mid-circuit measurement (MCM) and conditional feed-forward. In superconducting quantum systems, conventional readout pipelines transfer measurement data to host processors for post-processing, introducing millisecond-scale delays that far exceed qubit coherence times. To overcome this bottleneck, we present an in-situ machine learning (ML) inference engine implemented on an FPGA for real-time quantum state discrimination. Our design performs inference directly on digitized readout signals with 40 ns latency, supports both qubit and qutrit readout, and enables conditional operations without host-side intervention. This capability is critical for MCM and for feedback-driven protocols such as quantum error correction. We validate the system on superconducting transmon hardware, demonstrating robust discrimination fidelity across multiple qubit and qutrit channels. We further demonstrate conditional qutrit logic driven by FPGA-resident classification, highlighting the potential of low-latency ML-on-FPGA control for NISQ applications and scalable fault-tolerant quantum computing.

Vora, Neel [Lawrence Berkeley National Laboratory ↗
DOE OSTI2025

2025 Intern Poster

The Hot Fuel Examination Facility (HFEF) at the Materials and Fuels Complex (MFC) houses the largest U.S. inert atmosphere hot cell for nuclear material research. Key features include the precision gamma scanning (PGS), Fuel Accident Condition Simulator (FACS), Neutron Radiography Reactor (NRAD), and the focus of this project, the Metallograph Loading Cell (MET Cell). The MET Cell performs tests on spent nuclear fuel, such as microhardness testing, microscopy, and neutron radiography. However, the MET Cell’s existing pressure and lighting control systems are outdated and inefficient, with inadequate documentation for system changes over time. This project aims to design a new automated control system for the MET Cell, ensuring longevity (minimum ten years), ease of troubleshooting/repair, and integration into the building monitoring system. The design process addressed challenges such as space restrictions, varied voltages within enclosures, sourcing new components, and security limitations. Compliance with NFPA 70, UL508A, MFC Physical Security, and INL Engineering standards was essential. The project involves repurposing an existing PLC to manage lighting and pressure control using digital and analog signals, simplifying wiring, and ensuring thorough documentation for future reference.

42 - ENGINEERING↗
DOE OSTI2020

Radiation-hard miniature optical engine with high bandwidth

Future silicon trackers will be operated in an intense radiation environment and require large volumes of data to be transmitted off detector. In addition, the optical modules must be of low mass in order to limit multiple scattering and nuclear interactions that would degrade the overall performance of the detector. Here, we present a miniature optical engine that satisfies these constraints. The optical engine consists of an ASIC driving a VCSEL (Vertical Cavity Surface Emitting Laser) array in an optical package. Two ASICs are designed to operate a 12-channel VCSEL array at 1.28 or 5.12 Gb/s per channel, which yields a total data rate of up to 60 Gb/s. The core transistors are fabricated in a 65 nm CMOS process which enhance the radiation-hardness. Each channel contains equalizer (CTLE) and clock-data recovery circuits (CDR) so that the ASIC can restore the highly distorted electrical signal after propagating through several meters of cables of small diameter. The equalizer, CDR, and VCSEL driver are configured via a digital I 2 C chip interface with triple redundant memory to mitigate single event upset (SEU) effects. The bias and modulation currents are controlled by a digital-to-analog converter (DAC). We present the design of the circuit together with the results of the simulations and preliminary measurements.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

A sub-5 ps jitter time-to-digital converter ASIC with back-gate delay tuning in 22 nm CMOS

We present the design of a Time-to-Digital Converter (TDC) ASIC together with performance characterization results at cryogenic temperature (6-8 K), and at room temperature using emulated Low-Gain Avalanche Detector (LGAD) signals. The TDC design uses a two-step architecture with a ring-oscillator based counter and a Vernier delay line fine TDC. The TDC is implemented in an FD-SOI process, and back-gate tuning is used not only to correct threshold variation due to cryogenic operation, but also as a novel way to tune TDC delay elements with very little overhead. Using this technique, we demonstrate a design with very low power (0.5 mW) and area (0.003 mm 2 ). We present test results using the Fermilab Constant Fraction Discriminator (FCFD) ASIC to produce discriminated signals from an internal charge injection mechanism that mimics the waveform and signal amplitude of minimum ionizing particles impinging on LGAD sensors. We characterize the time precision of the full system and verify that the TDC ASIC contributes a negligible amount to the total system time precision, fully consistent with the expected jitter contribution of less than 5 ps. In conclusion, the results presented here demonstrate the utility of our TDC for applications in physics and quantum communications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Fully Homomorphic Encryption

This code implements a Fully Homomorphic Encryption (FHE) system, enabling secure computation on encrypted data without requiring decryption. It supports encryption, decryption, and homomorphic operations like matrix multiplication and addition. This code is adaptable for integrating FHE into linear-time invariant (LTI) systems, including digital control and filtering. With proper configuration from subject matter expertise, encrypted system parameters and signals can be manipulated to perform tasks like state updates, output calculations, and convolution in the encrypted domain. By preserving the structure of LTI systems while ensuring privacy, the framework facilitates secure applications in areas such as autonomous systems, signal processing, and industrial automation. The code initializes the encryption system using parameters provided in the env dictionary. These parameters include the ciphertext modulus, key dimension, plaintext fixed-point scaling factor, and noise bound. During initialization, a secret key is generated, which is essential for encrypting and decrypting data securely. The modular design allows users to tailor these parameters to specific use cases or security requirements. The code implements multiple cryptographic schemes. The learning with errors (LWE) encryption method encodes cleartext message to their plaintext fixed-point representation then encrypted into ciphertext space with additive noise. This noise ensures the security of the scheme, relying on the computational hardness of the LWE problem. The code also includes the Gentry-Sahai-Waters (GSW) scheme based off the LWE problem. Homomorphic matrix multiplication is performed between the LWE and GSW to encrypted data. This is achieved using a decomposition function on the LWE ciphertext during the multiplication operation. For higher-dimensional data, the code includes a method to encrypt entire matrices (GSWMat) using GSW encryption. These encrypted matrices can then be used for homomorphic matrix multiplications (MatMult). The decryption function uses the secret key to recover the original plaintext, removing the added noise and scaling that was originally applied during encryption.

Lois, Roberts [Idaho National Laboratory (INL), Id↗