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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

Intelligent Proppants for Hydraulic Fracture Diagnostics

This Phase 1 Report details our Phase 1 progress in proving the feasibility of a highly integrated, highly miniaturized sensor ball. The ball contains sensors, analog to digital converters, memory, a clock, and an acoustic communications module all integrated onto a single silicon chip. Phase 2 is to focus on the application specific integrated circuit (ASIC). Phase 1 piecewise proves the feasibility of this innovation by examining a few critical subsystems including the communications module and inertial sensor performance. Acoustic simulations of an acoustically active and traceable proppant are also performed and summarized in this report.

01 COAL, LIGNITE, AND PEAT↗
DOE OSTI2024

Synthesis of Correct Digital Controller Models from Specifications by Model Transformation (21-0320)

The design of high consequence controllers (in weapons systems, autonomy, etc.) that do what they are supposed to do is a significant challenge. Testing simply does not come close to meeting the requirements for assurance. Today circuit designers at Sandia (and elsewhere) typically capture the core behavior of their components using state models in tools such as STATEFLOW. They then check that their models meet certain requirements (e.g. “The system bus must not deadlock” or “both traffic lights at an intersection must not be green at the same time”) using tools called model checkers. If the model checker returns “yes” then the property is guaranteed to be satisfied by the model. However, there are several drawbacks to this industry practice: (1) there is a lot of detail to get right, this is particularly challenging when there are multiple components requiring complex coordination (2) any errors returned by the model checker have to be traced back through the design and fixed, necessitating rework, (3) there are severe scalability problems with this approach, particularly when dealing with concurrency. All this places high demands on the designers who now face not only an accelerated schedule but also controllers of increasing complexity. This report describes a new and fundamentally different approach to the construction of safety-critical digital controllers. Instead of directly constructing a complete model and then trying to verify it, the designer can start with an initial abstract (think “sketch”) model plus the requirements, from which a correct concrete model is automatically synthesized. There is no need for post-hoc verification of required functional properties. Having tool to carry this out will significantly impact the nation’s ability to ensure the safety of high-consequence digital systems. The approach has been implemented in a prototype tool, along with a suite of examples, including ones that reflect actual problems faced by designers. Our approach operates on a variant of Statecharts developed at Sandia called Qspecs. Statecharts are a widely used formalism for developing concurrent reactive systems, supporting scalability through allowing state models containing composite states, which are the serial or parallel composition of substates which can themselves contain statecharts. Statecharts enable an incremental style of development, in which states are progressively refined to incorporate greater detail in an incremental model of software development. Our approach formulates a set of constraints from the structure of the models and the requirements and propagates these constraints to a fixpoint. The solution to the constraints is an inductive invariant along with guards on the transitions. We also show how our approach extends to implementation refinement, decomposition, composition, and elaboration. We currently handle safety requirements written in LTL (Linear Temporal Logic)

42 ENGINEERING↗
DOE OSTI2026

Large-scale real-time signal processing in physics experiments: the ALICE TPC FPGA pipeline

For LHC Run 3, the ALICE Time Projection Chamber was upgraded to operate in continuous readout mode. Interaction rates of up to 50 kHz in Pb-Pb collisions require real-time processing of more than 3 TB s -1 of raw detector data. This requirement is met by a custom FPGA-based processing pipeline that performs the complete front-end data treatment fully in-stream, including common-mode correction, pedestal subtraction, ion-tail filtering, zero suppression, and dense data packing. A central element of the design is a highly parallel common-mode correction algorithm operating directly on the streaming data. It robustly identifies signal-free readout channels on a time-bin basis and applies pad-dependent scaling to compensate for local variations in capacitive coupling in the GEM readout. In combination with pedestal subtraction and ion-tail filtering, this enables accurate baseline restoration under extreme high-occupancy conditions, preventing signal loss while efficiently suppressing noise prior to zero suppression. The pipeline operates continuously at the full detector bandwidth and reduces the raw input rate of approximately 3 TB s -1 to about 900 GBps for Pb-Pb collisions at the target interaction rate. Overall, it represents a large-scale FPGA-based real-time signal-processing implementation for high-energy physics detector readout.

Digital signal processing (DSP)↗
DOE OSTI2023

Experimental results from the characterization of a 32-channels mixed-signal processor for the GAPS experiment

This work describes the experimental results obtained from the characterization of a 32-channels readout ASIC that is the core of a module composed by 4 Lithium-drifted Silicon, Si(Li), detectors. The module is the building block of a tracker in an upcoming balloon experiment. The activity is carried out within the General AntiParticle Spectrometer (GAPS) international collaboration, whose objective is the indirect detection of dark matter through the detection of antiparticles present in cosmic rays at low energies. The balloon flight is foreseen in 2024 from the McMurdo station in Antarctica. The ASIC is designed in a 180 nm CMOS technology and has 32 low-noise analog readout channels featuring a dynamic compression of the signal, an 11-bit SAR ADC, and a digital back-end section responsible for channel setting and for sending digital information to the data acquisition system of the tracker. This work has a twofold goal: it intends on the one hand to verify the performance of the circuit, on the other to select at least 300 good samples to be used for the assembly of the GAPS Si(Li) tracker.

Riceputi, Elisa↗
DOE OSTI2025

Optimization-Based Data-Driven Approach for Detecting Fault Location in Power Systems

In grids with large penetration of converterinterfaced resources (CIRs), measurements of voltage, current, and line parameters can fluctuate significantly during fault conditions. These fluctuations, combined with complex network topologies and extensive system branching, make accurate fault location challenging. Faults, such as short circuits, can cause prolonged outages with serious socio-economic impacts, highlighting the need for rapid fault identification to minimize downtime. However, current fault detection methods—such as relays and digital fault recorders—often relay information too slowly, impeding swift corrective action. Given the limited availability of high-resolution phasor measurement units, this paper introduces an optimization-based observer to estimate fault locations, grid line parameters, and voltages using local CIR measurements. To preserve the confidentiality of CIRs and enhance estimation accuracy, this study uses a black-box model of CIRs. This bottom-up, event-driven approach can enhances protection and control systems through optimized and real-time fault detection. Simulation results show that the optimization-based data-driven observer can accurately detect fault locations and estimate grid states and parameters, providing valuable insights for utilities and operators in grid applications.

Subedi, Sunil [ORNL] (ORCID:000000034069090X)↗
DOE OSTI2023

Photon-to-Digital Converters for Neutron Imaging Instruments (Final Report)

Oak Ridge National Laboratory (ORNL) collaborated with the Université de Sherbrooke (UdeS) to design a modular and scalable tile of innovative digital photodetectors called Photon-to-Digital Converters (PDC) and the required subsystems to demonstrate the feasibility of large area single-photon detectors to support high-resolution, depth-of-interaction, fast neutron radiography based on scintillation detectors. The goal is to demonstrate the advantages of using PDC over conventional Silicon Photomultiplier (SiPM) for neutron imaging systems. The basic building blocks of analog SiPM and PDC are Single-Photon Avalanche Photodiodes (SPAD). The main difference between conventional SiPMs and PDCs, is in the fact that analog SiPMs sum the charge produced by individual SPAD passively, while in PDCs each SPAD is read out individually by an active electronic circuit. Hence, PDCs provide a direct photon-to-bit conversion where a logic “1” means that there was a detection in a given SPAD. Conversely, an analog SiPM requires a sophisticated preamplifier (current amplifiers or transimpedance amplifier) followed by a shaping amplifier and an analog-to-digital converter. Moreover, since the charge from each SPAD varies slightly, the passive sum of the analog SiPM will have signal fluctuations for the same amount of photon detected. This is one of many issues that is completely eliminated by individual one-to-one SPAD read out in PDCs. The large area required for scintillator readouts for neutron imaging is such that the output capacitance of a large area of SiPM arrays is very high. This creates a burden on the signal-to-noise optimization with respect to the power budget. For PDC, the power consumption is dictated by rate of the incident photon flux, or in photon-starved environments, the dark noise rate of the SPAD array. In other words, the power consumption in the absence of events is extremely low. Hence, the power consumption of a PDC read out system is much lower than its analog counterpart. Further, the large SiPM capacitance may introduce signal distortions on the scintillator fast rise or decay time with undesired effects on timing and pulse shape discrimination. The problem is absent in PDCs, as their readout is independent on device capacitance. UdeS is the world leader in 3D vertical integration of frontside illuminated SPAD arrays over CMOS readouts. These capabilities allow future production of “3D PDC” with maximum photosensitive fill factor and electronic functionalities tailored to the application. UdeS' vast knowledge of SPADs and CMOS design made the team an ideal collaborator in the development of large area high-resolution fast neutron radiography.

42 ENGINEERING↗
DOE OSTI2026

Nonlinear thermodynamic computing out of equilibrium

We present the design for a thermodynamic computer that can perform arbitrary nonlinear calculations in or out of equilibrium. Simple thermodynamic circuits, fluctuating degrees of freedom in contact with a thermal bath and confined by a quartic potential, display an activity that is a nonlinear function of their input. Such circuits can therefore be regarded as thermodynamic neurons, and can serve as the building blocks of networked structures that act as thermodynamic neural networks, universal function approximators whose operation is powered by thermal fluctuations. We simulate a digital model of a thermodynamic neural network, and show that its parameters can be adjusted by genetic algorithm to perform nonlinear calculations at specified observation times, regardless of whether the system has attained thermal equilibrium. This work expands the field of thermodynamic computing beyond the regime of thermal equilibrium, enabling fully nonlinear computations, analogous to those performed by classical neural networks, at specified observation times.

Whitelam, Stephen [Lawrence Berkeley National Labo↗
DOE OSTI2022

Multiplexed Readout for an Experiment with a Large Number of Channels Using Single-Electron Sensitivity Skipper-CCDs

This paper presents the implementation of a multiplexed analog readout electronics system that can achieve single-electron counting using Skipper-CCDs with non-destructive readout. The proposed system allows the best performance of the sensors to be maintained, with sub-electron noise-level operation, while maintaining low-bandwidth data transfer, a minimum number of analog-to-digital converters (ADC) and low disk storage requirement with zero added multiplexing time, even for the simultaneous operation of thousands of channels. These features are possible with a combination of analog charge pile-up, sample and hold circuits and analog multiplexing. The implementation also aims to use the minimum number of components in circuits to keep compatibility with high-channel-density experiments using Skipper-CCDs for low-threshold particle detection applications. Performance details and experimental results using a sensor with 16 output stages are presented along with a review of the circuit design considerations.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2022

Primitive quantum gates for dihedral gauge theories

We describe the simulation of dihedral gauge theories on digital quantum computers. The nonabelian discrete gauge group $D_N$-- the dihedral group -- serves as an approximation to $U(1)\times\mathbb{Z}_2$ lattice gauge theory. In order to carry out such a lattice simulation, we detail the construction of efficient quantum circuits to realize basic primitives including the nonabelian Fourier transform over $D_N$, the trace operation, and the group multiplication and inversion operations. For each case the required quantum resources scale linearly or as low-degree polynomials in $n=\log N$. We experimentally benchmark our gates on the Rigetti Aspen-9 quantum processor for the case of $D_4$. The fidelity of all $D_4$ gates was found to exceed $80\%$.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2021

High-speed feedback control of an oscillating magnetic helicity injector using a graphics processing unit

A real-time control system has been developed to control the amplitude, phase, and offset of bulk plasma parameters inside an oscillating magnetic helicity injector. Control software running entirely on an Nvidia Tesla P40 graphical processing unit is able to receive digitizer inputs and send response patterns to a Pulse Width Modulation (PWM) controller with a minimum control loop period of 12.8μs. With an input digitization rate of 10 MS/s, a three-parameter proportional integral differential controller is shown to be sufficient to inform the PWM controller to drive the desired oscillating plasma waveform with a frequency of 16.6 kHz that is located near the resonance of a coupled RLC circuit. In particular, the temporal phase of the injector waveform is held within 10 degrees of the target value. Control is demonstrated over the toroidal modal structure of the imposed magnetic perturbations of the helicity injection system, allowing a new class of discharges to be studied.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2022

Random Forest Regressor-Based Approach for Detecting Fault Location and Duration in Power Systems

Power system failures or outages due to short-circuits or “faults” can result in long service interruptions leading to significant socio-economic consequences. It is critical for electrical utilities to quickly ascertain fault characteristics, including location, type, and duration, to reduce the service time of an outage. Existing fault detection mechanisms (relays and digital fault recorders) are slow to communicate the fault characteristics upstream to the substations and control centers for action to be taken quickly. Fortunately, due to availability of high-resolution phasor measurement units (PMUs), more event-driven solutions can be captured in real time. In this paper, we propose a data-driven approach for determining fault characteristics using samples of fault trajectories. A random forest regressor (RFR)-based model is used to detect real-time fault location and its duration simultaneously. This model is based on combining multiple uncorrelated trees with state-of-the-art boosting and aggregating techniques in order to obtain robust generalizations and greater accuracy without overfitting or underfitting. Four cases were studied to evaluate the performance of RFR: 1. Detecting fault location (case 1), 2. Predicting fault duration (case 2), 3. Handling missing data (case 3), and 4. Identifying fault location and length in a real-time streaming environment (case 4). A comparative analysis was conducted between the RFR algorithm and state-of-the-art models, including deep neural network, Hoeffding tree, neural network, support vector machine, decision tree, naive Bayesian, and K-nearest neighborhood. Experiments revealed that RFR consistently outperformed the other models in detection accuracy, prediction error, and processing time.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

A Modular 512-Channel Neural Signal Acquisition ASIC for High-Density 4096 Channel Electrophysiology

The complexity of information processing in the brain requires the development of technologies that can provide spatial and temporal resolution by means of dense electrode arrays paired with high-channel-count signal acquisition electronics. In this work, we present an ultra-low noise modular 512-channel neural recording circuit that is scalable to up to 4096 simultaneously recording channels. The neural readout application-specific integrated circuit (ASIC) uses a dense 8.2 mm × 6.8 mm 2D layout to enable high-channel count, creating an ultra-light 350 mg flexible module. The module can be deployed on headstages for small animals like rodents and songbirds, and it can be integrated with a variety of electrode arrays. The chip was fabricated in a TSMC 0.18 µm 1.8 V CMOS technology and dissipates a total of 125 mW. Each DC-coupled channel features a gain and bandwidth programmable analog front-end along with 14 b analog-to-digital conversion at speeds up to 30 kS/s. Additionally, each front-end includes programmable electrode plating and electrode impedance measurement capability. We present both standalone and in vivo measurements results, demonstrating the readout of spikes and field potentials that are modulated by a sensory input.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

In-pixel AI for lossy data compression at source for X-ray detectors

Integrating neural networks for data compression directly in the Read-Out Integrated Circuits (ROICs), i.e. the pixelated front-end, would result in a significant reduction in off-chip data transfer, overcoming the I/O bottleneck. Our ROIC test chip (AI-In-Pixel-65) is designed in a 65 nm Low Power CMOS process for the readout of pixelated X-ray detectors. Each pixel consists of an analog front-end for signal processing and a 10b analog-to-digital converter operating at 100KSPS. Here, we compare two non-reconfigurable techniques, Principal Component Analysis (PCA) and an AutoEncoder (AE) as lossy data compression engines implemented within the pixelated area. The PCA algorithm achieves 50$×$ compression, adds one clock cycle latency, and results in a 21% increase in the pixel area. The AE achieves 70$×$ compression, adds 30 clock cycle latency, and results in a similar area increase.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Digital fabrication of a small diameter polymer optical waveguide

A novel polymer optical waveguide and method of manufacturing is presented herein. A digitally manufactured process is described which utilizes a micro-dispensed UV optical adhesive as the contour guiding cladding, a fused deposition modeling technology for creating a core, and a subtractive laser process to finish the two ends of the optical interconnect. The optical waveguide can be printed directly on a circuit board in some embodiments. Alternatively, using a slightly modified process including a step to bond the optical fiber to the substrate, the optical interconnect can be manufactured on a flexible substrate.

Bhethanabotla, Venkat Rama↗
DOE OSTI2024

Scattering wave packets of hadrons in gauge theories: Preparation on a quantum computer

Quantum simulation holds promise of enabling a complete description of high-energy scattering processes rooted in gauge theories of the Standard Model. A first step in such simulations is preparation of interacting hadronic wave packets. To create the wave packets, one typically resorts to adiabatic evolution to bridge between wave packets in the free theory and those in the interacting theory, rendering the simulation resource intensive. In this work, we construct a wave-packet creation operator directly in the interacting theory to circumvent adiabatic evolution, taking advantage of resource-efficient schemes for ground-state preparation, such as variational quantum eigensolvers. By means of an ansatz for bound mesonic excitations in confining gauge theories, which is subsequently optimized using classical or quantum methods, we show that interacting mesonic wave packets can be created efficiently and accurately using digital quantum algorithms that we develop. Specifically, we obtain high-fidelity mesonic wave packets in the Z 2 and U(1) lattice gauge theories coupled to fermionic matter in 1+1 dimensions. Our method is applicable to both perturbative and non-perturbative regimes of couplings. The wave-packet creation circuit for the case of the Z 2 lattice gauge theory is built and implemented on the Quantinuum H1-1 trapped-ion quantum computer using 13 qubits and up to 308 entangling gates. The fidelities agree well with classical benchmark calculations after employing a simple symmetry-based noise-mitigation technique. This work serves as a step toward quantum computing scattering processes in quantum chromodynamics.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Integrated Spatial, Spectral, & Temporal Optical Reflectance System for Precision Occupancy & Location Sensing to Improve Building Energy Efficiency

Buildings consume approximately 35% of the electricity used in the U.S. and building owners can significantly reduce this energy use by providing services like heating, electrical power and lighting only when people are present. The ARPAe funded program titled “INTEGRATED SPATIAL, SPECTRAL, & TEMPORAL OPTICAL REFLECTANCE SYSTEM FOR PRECISION OCCUPANCY & LOCATION SENSING TO IMPROVE BUILDING ENERGY EFFICIENCY” demonstrates how a low cost sensor technology developed for measuring distances can be used to count and locate occupants with a high degree of precision with a very low error rates. This platform tells a building control system where occupants are located (but not who they are) so that energy consuming services can be provided only when the services are needed by building occupants. The original proof of concept involved using low cost, commercially available time-of-flight (TOF) sensors that measure distance, but the performance of these existing sensors was lacking, as they could not operate properly in the presence of sunlight, which blinded the simple TOF sensors and limited their utility in buildings. This project proposed a powerful new class of TOF sensors that used state-of-the-art integrated circuit (IC) fabrication processes that combined advanced photonics with conventional silicon chip circuitry for improved sensor performance. An equally important part of this project was to find ways to maximize occupant count and location accuracy while using the fewest number of sensors possible, in order to keep costs low. By using building blueprints to create digital twins of commercial building spaces, the team developed new algorithms to maximize occupant count and tracking accuracy by properly locating the minimum number of sensors at just the right spots in the building. This capability not only minimizes system costs but also simplified sensor installation and system commissioning. Our simulations of our sensor networks for a range of commercial floorplan designs demonstrated that our installed cost target of $0.08/sqft was attainable, though not fully demonstrated during the project. Finally, we noted that the TOF sensor concept could provide a valuable role in health and eldercare by tracking patients without the need for worn sensors and would be useful for fall detection and other patient safety metrics, including tracking healthcare/patient interactions. We feel that, when fully developed, this new class of sophisticated TOF sensors and support software will be a powerful new approach to improving building energy efficiency based on occupant centric control platforms and will also open new levels of patient safety in healthcare operations. To realize this potential, the team formed the Troy Sensor Company LLC to oversee licensing of the programs patents and continue to seek commercialization of this program’s activity sensing technologies.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2026

Reliability Assessment of Solid-State Circuit Breakers (CRADA CRD-21-21469, Project 4 Final Report)

Growth in power requirements and the complexity of emerging distribution systems are creating the need for new solid-state products for many applications. The qualification requirements, testing standards and life-cycle management practices of solid-state devices used in protection applications is not established. The project will leverage newly developed accelerated testing capabilities design specifically for protection applications to generate large data sets that will enable advanced digital techniques for data analysis and embedded health monitoring.

14 SOLAR ENERGY↗
DOE OSTI2025

Semiconductor-compatible topological digital alloys

Recently, GeSn alloys have attracted much interest for direct-gap infrared photonics and as potential topological materials which are compatible with the semiconductor industry. However, for photonics, the high-Sn content required leads to low detectivity, associated with poor material quality, and the (>35 %) Sn required for topological properties have been out of reach experimentally. Here, we demonstrate that by patterning the Sn distribution within Ge, the electronic properties have a far greater tunability than is possible with the random alloy. For the GeSn δ-digital alloy (DA) formed by confining Sn atoms in atomic layer(s) along the [111] direction of Ge, we show that ∼ 10 % Sn can lead to a triple-point semimetal. These findings are understood in terms of Sn ordering causing spatial separation of Sn and Ge band edges, leading to band inversion. This mechanism can also lead to a weak topological insulator, Weyl semimetal, and enables tunable direct bandgaps down to 2 meV, covering the entire infrared range. This DA induced topological properties are also identified in compound semiconductors, such as InAs 1-x Sb x , showing the general applicability of the DA design for realizing topological properties on conventional semiconductor platforms. Furthermore, our findings not only point to a new class of currently unexplored topological systems accessible by epitaxy, but also establish the promise of low-Sn GeSn DAs for application as infrared laser diodes and photodetectors in Si photonic integrated circuits and infrared image sensors.

3D topological semimetal↗