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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS2000

JavaGenes and Condor: Cycle-Scavenging Genetic Algorithms

A genetic algorithm code, JavaGenes, was written in Java and used to evolve pharmaceutical drug molecules and digital circuits. JavaGenes was run under the Condor cycle-scavenging batch system managing 100-170 desktop SGI workstations. Genetic algorithms mimic biological evolution by evolving solutions to problems using crossover and mutation. While most genetic algorithms evolve strings or trees, JavaGenes evolves graphs representing (currently) molecules and circuits. Java was chosen as the implementation language because the genetic algorithm requires random splitting and recombining of graphs, a complex data structure manipulation with ample opportunities for memory leaks, loose pointers, out-of-bound indices, and other hard to find bugs. Java garbage-collection memory management, lack of pointer arithmetic, and array-bounds index checking prevents these bugs from occurring, substantially reducing development time. While a run-time performance penalty must be paid, the only unacceptable performance we encountered was using standard Java serialization to checkpoint and restart the code. This was fixed by a two-day implementation of custom checkpointing. JavaGenes is minimally integrated with Condor; in other words, JavaGenes must do its own checkpointing and I/O redirection. A prototype Java-aware version of Condor was developed using standard Java serialization for checkpointing. For the prototype to be useful, standard Java serialization must be significantly optimized. JavaGenes is approximately 8700 lines of code and a few thousand JavaGenes jobs have been run. Most jobs ran for a few days. Results include proof that genetic algorithms can evolve directed and undirected graphs, development of a novel crossover operator for graphs, a paper in the journal Nanotechnology, and another paper in preparation.

Globus, Al↗
NASA NTRS1996

High-T(sub c) Superconductor-Normal-Superconductor Junctions with Polyimide-Passivated Ambient Temperature Edge Formation

The ability to controllably fabricate High-Temperature Superconductor (HTS) S-Normal-S (SNS) Josephson Juntions (JJ's) enhances the possibilities fro many applications, including digital circuits, SQUID's, and mixers. A wide variety of approaches to fabricating SNS-like junctions has been tried and analyzed in terms of proximity effect behavior.

HTS SNS Josephson Junction JJ polyimide films poly↗
NASA NTRS2004

Digital logic optimization using selection operators

According to the invention, a digital design method for manipulating a digital circuit netlist is disclosed. In one step, a first netlist is loaded. The first netlist is comprised of first basic cells that are comprised of first kernel cells. The first netlist is manipulated to create a second netlist. The second netlist is comprised of second basic cells that are comprised of second kernel cells. A percentage of the first and second kernel cells are selection circuits. There is less chip area consumed in the second basic cells than in the first basic cells. The second netlist is stored. In various embodiments, the percentage could be 2% or more, 5% or more, 10% or more, 20% or more, 30% or more, or 40% or more.

Whitaker, Sterling R.↗
NASA NTRS2008

Making Complex Electrically Conductive Patterns on Cloth

A method for automated fabrication of flexible, electrically conductive patterns on cloth substrates has been demonstrated. Products developed using this method, or related prior methods, are instances of a technology known as 'e-textiles,' in which electrically conductive patterns ar formed in, and on, textiles. For many applications, including high-speed digital circuits, antennas, and radio frequency (RF) circuits, an e-textile method should be capable of providing high surface conductivity, tight tolerances for control of characteristic impedances, and geometrically complex conductive patterns. Unlike prior methods, the present method satisfies all three of these criteria. Typical patterns can include such circuit structures as RF transmission lines, antennas, filters, and other conductive patterns equivalent to those of conventional printed circuits. The present method overcomes the limitations of the prior methods for forming the equivalent of printed circuits on cloth. A typical fabrication process according to the present method involves selecting the appropriate conductive and non-conductive fabric layers to build the e-textile circuit. The present method uses commercially available woven conductive cloth with established surface conductivity specifications. Dielectric constant, loss tangent, and thickness are some of the parameters to be considered for the non-conductive fabric layers. The circuit design of the conductive woven fabric is secured onto a non-conductive fabric layer using sewing, embroidery, and/or adhesive means. The portion of the conductive fabric that is not part of the circuit is next cut from the desired circuit using an automated machine such as a printed-circuit-board milling machine or a laser cutting machine. Fiducials can be used to align the circuit and the cutting machine. Multilayer circuits can be built starting with the inner layer and using conductive thread to make electrical connections between layers.

Chu, Andrew↗
NASA NTRS2009

Digital Synchronizer without Metastability

A proposed design for a digital synchronizing circuit would eliminate metastability that plagues flip-flop circuits in digital input/output interfaces. This metastability is associated with sampling, by use of flip-flops, of an external signal that is asynchronous with a clock signal that drives the flip-flops: it is a temporary flip-flop failure that can occur when a rising or falling edge of an asynchronous signal occurs during the setup and/or hold time of a flip-flop. The proposed design calls for (1) use of a clock frequency greater than the frequency of the asynchronous signal, (2) use of flip-flop asynchronous preset or clear signals for the asynchronous input, (3) use of a clock asynchronous recovery delay with pulse width discriminator, and (4) tying the data inputs to constant logic levels to obtain (5) two half-rate synchronous partial signals - one for the falling and one for the rising edge. Inasmuch as the flip-flop data inputs would be permanently tied to constant logic levels, setup and hold times would not be violated. The half-rate partial signals would be recombined to construct a signal that would replicate the original asynchronous signal at its original rate but would be synchronous with the clock signal.

Simle, Robert M.↗
NASA NTRS2007

JavaGenes Molecular Evolution

JavaGenes is a general-purpose, evolutionary software system written in Java. It implements several versions of a genetic algorithm, simulated annealing, stochastic hill climbing, and other search techniques. This software has been used to evolve molecules, atomic force field parameters, digital circuits, Earth Observing Satellite schedules, and antennas. This version differs from version 0.7.28 in that it includes the molecule evolution code and other improvements. Except for the antenna code, JaveGenes is available for NASA Open Source distribution.

Lohn, Jason↗
NASA NTRS2010

Effects of Temperature on the Performance and Stability of Recent COTS Silicon Oscillators

Silicon oscillators have lately emerged to serve as potential replacement for crystal and ceramic resonators to provide timing and clock signals in electronic systems. These semiconductor-based devices, including those that are based on MEMS technology, are reported to be resistant to vibration and shock (an important criteria for systems to be deployed in space), immune to EMI, consume very low current, require few or no external components, and cover a wide range of frequency for analog and digital circuits. In this work, the performance of five recently-developed COTS silicon oscillator chips from different manufacturers was determined within a temperature range that extended beyond the individual specified range of operation. In addition, restart capability at extreme temperatures, i.e. power switched on while the device was soaking at extreme (hot or cold) temperature, and the effects of thermal cycling under a wide temperature range on the operation of these silicon oscillators were also investigated. Performance characterization of each oscillator was obtained in terms of its output frequency, duty cycle, rise and fall times, and supply current at specific test temperatures. The five different oscillators tested operated beyond their specified temperature region, with some displaying excellent stability throughout the whole test temperature range. Others experienced some instability at certain temperature test points as evidenced by fluctuation in the output frequency. Recovery from temperature-induced changes took place when excessive temperatures were removed. It should also be pointed out that all oscillators were able to restart at the extreme test temperatures and to withstand the limited thermal cycling without undergoing any significant changes in their characteristics. In addition, no physical damage was observed in the packaging material of any of these silicon oscillators due to extreme temperature exposure and thermal cycling. It is recommended that additional and more comprehensive testing under long term cycling be carried out to fully establish the reliability of these devices and to determine their suitability for use in space exploration missions under extreme temperature conditions.

Patterson, Richard L.↗
NASA NTRS2005

Software-Reconfigurable Processors for Spacecraft

A report presents an overview of an architecture for a software-reconfigurable network data processor for a spacecraft engaged in scientific exploration. When executed on suitable electronic hardware, the software performs the functions of a physical layer (in effect, acts as a software radio in that it performs modulation, demodulation, pulse-shaping, error correction, coding, and decoding), a data-link layer, a network layer, a transport layer, and application-layer processing of scientific data. The software-reconfigurable network processor is undergoing development to enable rapid prototyping and rapid implementation of communication, navigation, and scientific signal-processing functions; to provide a long-lived communication infrastructure; and to provide greatly improved scientific-instrumentation and scientific-data-processing functions by enabling science-driven in-flight reconfiguration of computing resources devoted to these functions. This development is an extension of terrestrial radio and network developments (e.g., in the cellular-telephone industry) implemented in software running on such hardware as field-programmable gate arrays, digital signal processors, traditional digital circuits, and mixed-signal application-specific integrated circuits (ASICs).

Farrington, Allen↗
NASA NTRS2012

Correlation Between Analog Noise Measurements and the Expected Bit Error Rate of a Digital Signal Propagating Through Passive Components

A method of determining the bit error rate (BER) of a digital circuit from the measurement of the analog S-parameters of the circuit has been developed. The method is based on the measurement of the noise and the standard deviation of the noise in the S-parameters. Once the standard deviation and the mean of the S-parameters are known, the BER of the circuit can be calculated using the normal Gaussian function.

Warner, Joseph D.↗
NASA NTRS1973

Airborne Laser Polar Nephelometer

A polar nephelometer has been developed at NCAR to measure the angular variation of the intensity of light scattered by air molecules and particles. The system has been designed for airborne measurements using outside air ducted through a 5-cm diameter airflow tube; the sample volume is that which is common to the intersection of a collimated source beam and the detector field of view within the airflow tube. The source is a linearly polarized helium-neon laser beam. The optical system defines a collimated field-of-view (0.5deg half-angle) through a series of diaphragms located behind a I72-mm focal length objective lens. A photomultiplier tube is located immediately behind an aperture in the focal plane of the objective lens. The laser beam is mechanically chopped (on-off) at a rate of 5 Hz; a two-channel pulse counter, synchronized to the laser output, measures the photomultiplier pulse rate with the light beam both on and off. The difference in these measured pulse rates is directly proportional to the intensity of the scattered light from the volume common to the intersection of the laser beam and the detector field-of-view. Measurements can be made at scattering angles from 15deg to 165deg with reference to the direction of propagation of the light beam. Intermediate angles are obtained by selecting the angular increments desired between these extreme angles (any multiple of 0.1deg can be selected for the angular increment; 5deg is used in normal operation). Pulses provided by digital circuits control a stepping motor which sequentially rotates the detector by pre-selected angular increments. The synchronous photon-counting system automatically begins measurement of the scattered-light intensity immediately after the rotation to a new angle has been completed. The instrument has been flown on the NASA Convair 990 airborne laboratory to obtain data on the complex index of refraction of atmospheric aerosols. A particle impaction device is operated simultaneously to collect particles from the same airflow tube used to make the scattered-light measurements. A size distribution function is obtained by analysis of the particles collected by the impaction device. Calculated values of the angular variation of the scattered-light intensity are obtained by applying Mie scattering theory to the observed size distribution function and assuming different values of the complex index of refraction of the particles. The calculated values are then compared with data on the actual variation of the scattered-light intensity obtained with the polar nephelometer. The most probable value of the complex refractive index is that which provides the best fit between the experimental light scattering data and the parameters calculated from the observed size distribution function.

Grams, Gerald W.↗
NASA NTRS2003

Increasing software testability with standard access and control interfaces

Testing is the most common method of determining whether a software system satisfies its requirements. Traditionally, testing starts with the detailed examination of individual functions or methods, progresses through the integration of functions or methods into subsystems, and ends with testing the functionality and behavior of the completely integrated system. At each stage of testing, the amount of functionality and behavior of the artifact being tested is increasingly limited. One reason for this is that it becomes impossible to test all paths through the system within a reasonable amount of time. However, another reason for this progressive decrease of test coverage has to do with increasingly limited control of and visibility into the state of the artifact being tested. During unit test, it is rather simple to control the inputs of individual functions or methods or view their internal state - modem development environments provide adequate facilities for doing so. However, these facilities do not scale up to the testing of partially or completely integrated systems. Control of and visibility into the system's state is then limited to the input and output facilities provided by the software itself as well as the hardware on which the software is hosted during the test. These facilities are usually insufficient to precisely control the state of individual components or sets of components of the system; they are also inadequate to the task of displaying on demand the state of specific components. We describe an approach to improving the testability of complex software systems with software constructs modeled after the hardware JTAG bus, used to provide visibility and controllability in testing digital circuits.

Tamir, Yuval↗
NASA NTRS1984

Upset susceptibility study employing circuit analysis and digital simulation

This paper describes an approach to predicting the susceptibility of digital systems to signal disturbances. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, Electromagnetic Interference (EMI) and Electromagnetic Pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload will bring the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The Super-Sceptre (system for circuit evaluation of transient radiation effects) Program was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.

Carreno, V. A.↗
NASA NTRS1984

Upset susceptibility study employing circuit analysis and digital simulation

An approach to predict the susceptibility of digital systems to signal disturbances is described. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, electromagnetic interference (EMI), and electromagnetic pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload brings the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The super-sceptre (system for circuit evaluation of transient radiation effects) programs was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.

Carreno, V. A.↗
NASA NTRS1991

Mixed application MMIC technologies - Progress in combining RF, digital and photonic circuits

Approaches for future 'mixed application' monolithic integrated circuits (ICs) employing optical receive/transmit, RF amplification and modulation and digital control functions are discussed. We focus on compatibility of the photonic component fabrication with conventional RF and digital IC technologies. Recent progress at Honeywell in integrating several parts of the desired RF/digital/photonic circuit integration suite required for construction of a future millimeter-wave optically-controlled phased-array element are illustrated.

Swirhun, S.↗
NASA NTRS1981

An evaluation of the Intel 2920 digital signal processing integrated circuit

The circuit consists of a digital to analog converter, accumulator, read write memory and UV erasable read only memory. The circuit can convert an analog signal to a digital representation, perform mathematical operations on the digital signal and subsequently convert the digital signal to an analog output. Development software tailored for programming the 2920 is presented.

Heller, J.↗