Advanced investigation of two-phase charge-coupled devices
The performance of experimental two phase, charge-coupled shift registers constructed using polysilicon gates overlapped by aluminum gates was studied. Shift registers with 64, 128, and 500 stages were built and operated. Devices were operated at the maximum clock frequency of 20 MHz. Loss per transfer of less than .0001 was demonstrated for fat zero operation. The effect upon transfer efficiency of various structural and materials parameters was investigated including substrate orientation, resistivity, and conductivity type; channel width and channel length; and method of channel confinement. Operation of the devices with and without fat zero was studied as well as operation in the complete charge transfer mode and the bias charge, or bucket brigade mode.