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All sourcesNASA NTRSDOE OSTI
NASA NTRS1990

LWIR detector research in InAsSb/InAs

The InAsSb/InSb strained-layer system forms a type-II superlattice in the Sb-rich region of the phase diagram. The band gap of InAsSb/InSb strained-layer superlattices grown on lattice-matched buffers can be varied continuously to produce semiconducting systems with band gaps ranging from that of InSb (0.23 eV with an absorption edge at 5.5 microns at 77 K) to 0. The semiconductor to semimetal transition occurs at As concentrations of approximately 33 percent, with the precise value dependent upon the strain and quantum well dimensions. At higher As content, the system is a semimetal. The authors fabricated photovoltaic detectors with high D asterisk at 77 K at wavelengths beyond 10 microns, and both photovoltaic and photoconductive detectors have been demonstrated with response to 15 microns. The photoconductive detectors exhibit gain of up to 100. Details of the materials growth, studies of the band structure and properties, device processing and the detector performance observed to date in these systems are discussed.

Peercy, Paul S.↗
NASA NTRS2000

Assessment and Assurance of Microelectronics Packaging Technology of Microelectromechanical Systems (MEMS)

Microelectromechanical systems (MEMS) have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, etc. Standard semiconductor microelectronics packaging needs the integrated circuits to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the packaging technology. In the case of MEMS the microstructures (active elements) often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it 'measures to assure the MEMS technology by lowering the risk to zero. MEMS technology has a major application in developing a microspacecraft for space systems provided assurance of MEMS technology is sufficiently addressed nondestructively. This technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's safety and mission assurance goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively by teaming-up with the other NASA centers using the limited resources available. This paper discusses the latest developments in the MEMS technology and challenging issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices based on silicon, poly-silicon, and other materials for microspacecraft applications considering the space environment and reliability assurance qualification guidelines in perspective. Acknowledgments: The above research work is supported by the NASA Electronics Parts and Packaging Program (NEPP) and performed by the Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA under a contract with the NASA - Code Q for the Office of Safety and Mission Assurance Program 323-79.

Ramesham, Rajeshuni↗
NASA NTRS2007

Circuit and Method for Communication Over DC Power Line

A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.

Krasowski, Michael J.↗
NASA NTRS1991

Plasma-deposited germanium nitride gate insulators for indium phosphide metal-insulator-semiconductor field-effect transistors

Plasma-deposited germanium nitride was investigated for the first time as a possible gate insulator for InP compound semiconductor metal-insulator-semiconductor FET (MISFET) technology. The germanium nitride films were successfully deposited in a capacitively coupled parallel plate reactor at 13.56 MHz operation using GeH4/N2/NH3 and GeH4/N2 mixtures as reactant gases. The former process produced better quality films with enhanced uniformity, increased deposition rates, and increased resistivity. The breakdown field strength of the films was greater than 10 to the 6th V/cm. Auger electron spectroscopy did not indicate significant chemical composition differences between the two processes. For MISFETs with 2-micron channel lengths fabricated on InP, the device transconductance and threshold voltage for the GeH4/N2/NH3 process were 17 mS/mm and -3.6 V, respectively. The drain-source breakdown voltages were greater than 10 V.

Johnson, Gregory A.↗
NASA NTRS2000

Reliable, Low-Cost, Low-Weight, Non-Hermetic Coating for MCM Applications

Through an Air Force Research Laboratory sponsored STM program, reliable, low-cost, low-weight, non-hermetic coatings for multi-chip-module(MCK applications were developed. Using the combination of Sandia Laboratory ATC-01 test chips, AvanTeco's moisture sensor chips(MSC's), and silicon slices, we have shown that organic and organic/inorganic overcoatings are reliable and practical non-hermetic moisture and oxidation barriers. The use of the MSC and unpassivated ATC-01 test chips provided rapid test results and comparison of moisture barrier quality of the overcoatings. The organic coatings studied were Parylene and Cyclotene. The inorganic coatings were Al2O3 and SiO2. The choice of coating(s) is dependent on the environment that the device(s) will be exposed to. We have defined four(4) classes of environments: Class I(moderate temperature/moderate humidity). Class H(high temperature/moderate humidity). Class III(moderate temperature/high humidity). Class IV(high temperature/high humidity). By subjecting the components to adhesion, FTIR, temperature-humidity(TH), pressure cooker(PCT), and electrical tests, we have determined that it is possible to reduce failures 50-70% for organic/inorganic coated components compared to organic coated components. All materials and equipment used are readily available commercially or are standard in most semiconductor fabrication lines. It is estimated that production cost for the developed technology would range from $1-10/module, compared to $20-200 for hermetically sealed packages.

Jones, Eric W.↗
NASA NTRS2003

Electrical Devices and Circuits for Low Temperature Space Applications

The environmental temperature in many NASA missions, such as deep space probes and outer planetary exploration, is significantly below the range for which conventional commercial-off-the-shelf electronics is designed. Presently, spacecraft operating in the cold environment of such deep space missions carry a large number of radioisotope or other heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronic devices and circuits capable of operation at cryogenic temperatures will not only tolerate the harsh environment of deep space but also will reduce system size and weight by eliminating or reducing the heating units and their associate structures; thereby reducing system development cost as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior in the electrical and thermal properties of some semiconductor and dielectric materials at low temperatures. An on-going research and development program on low temperature electronics at the NASA Glenn Research Center focuses on the development of efficient electrical systems and circuits capable of surviving and exploiting the advantages of low temperature environments. An overview of the program will be presented in this paper. A description of the low temperature test facilities along with selected data obtained from in-house component testing will also be discussed. On-going research activities that are being performed in collaboration with various organizations will also be presented.

Patterson, R. L.↗
NASA NTRS1995

Thermally stable, low resistance contact systems for use with shallow junction p(+) nn(+) and n(+)pp(+) InP solar cells

Two contact systems for use on shallow junction InP solar cells are described. The feature shared by these two contact systems is the absence of the metallurgical intermixing that normally takes place between the semiconductor and the contact metallization during the sintering process. The n(+)pp(+) cell contact system, consisting of a combination of Au and Ge, not only exhibits very low resistance in the as-fabricated state, but also yields post-sinter resistivity values of 1(exp -7) ohms-sq cm, with effectively no metal-InP interdiffusion. The n(+)pp(+)cell contact system, consisting of a combination of Ag and Zn, permits low resistance ohmic contact to be made directly to a shallow junction p/n InP device without harming the device itself during the contacting process.

Weizer, V. G.↗
NASA NTRS2010

Characterization of Low Noise, Precision Voltage Reference REF5025-HT Under Extreme Temperatures

The performance of Texas Instruments precision voltage reference REF5025-HT was assessed under extreme temperatures. This low noise, 2.5 V output chip is suitable for use in high temperature down-hole drilling applications, but no data existed on its performance at cryogenic temperatures. The device was characterized in terms of output voltage and supply current at different input voltage levels as a function of temperature between +210 C and -190 C. Line and load regulation characteristics were also established at six load levels and at different temperatures. Restart capability at extreme temperatures and the effects of thermal cycling, covering the test temperature range, on its operation and stability were also investigated. Under no load condition, the voltage reference chip exhibited good stability in its output over the temperature range of -50 C to +200 C. Outside that temperature range, output voltage did change as temperature was changed. For example, at the extreme temperatures of +210 C and - 190 C, the output level dropped to 2.43 V and 2.32 V, respectively as compared to the nominal value of 2.5 V. At cryogenic test temperatures of -100 C and -150 C the output voltage dropped by about 20%. The quiescent supply current of the voltage reference varied slightly with temperature but remained close to its specified value. In terms of line regulation, the device exhibited excellent stability between -50 C and +150 C over the entire input voltage range and load levels. At the other test temperatures, however, while line regulation became poor at cryogenic temperatures of -100 C and below, it suffered slight degradation at the extreme high temperature but only at the high load level of 10 mA. The voltage reference also exhibited very good load regulation with temperature down to -100 C, but its output dropped sharply at +210 C only at the heavy load of 10 mA. The semiconductor chip was able restart at the extreme temperatures of -190 C and +210 C, and the limited thermal cycling did not influence its characteristics and had no impact on its packaging as no structural or physical damage was observed.

Patterson, Richard↗
NASA NTRS2010

Modeling of Sonos Memory Cell Erase Cycle

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Phillips, Thomas A.↗
NASA NTRS1990

Applications of ultrashort laser pulses in science and technology; Proceedings of the Meeting, The Hague, Netherlands, Mar. 12, 13, 1990

Topics discussed are on the generation of high-intensity femtosecond lasers, the high-repetition and infrared femtosecond pulses, and physics of semiconductors and applications. Papers are presented on the femtosecond pulse generation at 193 nm; the generation of intense subpicosecond and femtosecond pulses; intense tunable subpicosecond and femtosecond pulses in the visible and infrared, generated by optical parametric oscillators; a high-efficiency high-energy optical amplifier for femtosecond pulses; and the generation of solitons, periodic pulsing, and nonlinearities in GaAs. Other papers are on ultrafast relaxation dynamics of photoexcited carriers in GaAs, high-order optical nonlinear susceptibilities of transparent glasses, subnanosecond risetime high-power pulse generation using photoconductive bulk GaAs devices, femtosecond studies of plasma formation in crystalline and amorphous silicon, and subpicosecond dynamics of hot carrier relaxation in InP and GaAs.

Antonetti, Andre↗
NASA NTRS2001

Ab-Initio Description and Prediction of Properties of Carbon-Based and Other Non-Metallic Materials

We have resolved the long-standing problem consisting of 30%-50% theoretical underestimates of the band gaps of non-metallic materials. We describe the Bagayoko, Zhao, and Williams (BZW) method that rigorously circumvents the basis-set and variational effect presumed to be a cause of these underestimates. We present ab-initio, computational results that are in agreement with experiment for diamond (C), silicon (Si), silicon carbides (3C-SiC and 4H-SiC), and other semiconductors (GaN, BaTiO3, AlN, ZnSe, ZnO). We illustrate the predictive capability of the BZW method in the case of the newly discovered cubic phase of silicon nitride (c-Si3N4) and of selected carbon nanotabes [(10,0), and (8,4)]. Our conclusion underscores the inescapable need for the BZW method in ab-initio calculations that employ a basis set in a variational approach. Current nanoscale trends amplify this need. We estimate that the potential impact of applications of the BZW method in advancing our understanding of nonmetallic materials, in informing experiment, and particularly in guiding device design and fabrication is simply priceless.

Bagayoko, D.↗
NASA NTRS2018

2.0 um Wavelength Injection Seed Semiconductor Laser for Lidar Transmitter for Global-Scale Measurements of CO2

Many of the high accuracy Earth science survey missions are planned to use laser-based remote sensing instruments. The 2-μm laser wavelength is of particular interest due to the presence of many CO2 and H20 absorption lines in its vicinity1. Transmitter architectures are typically composed of an optically pumped, frequency-stable, solid-state seed laser and a high-power optical amplifier.2, 3 Taking advantage of the reliability and relative simplicity of semiconductor lasers, this architecture can substantially improve by replacing the solid-state light source with semiconductor lasers of comparable performance. This approach will greatly improve the system reliability, and will simplify instrument integration and space qualification. There are currently very limited semiconductor lasers operating in the 2-m range with performance satisfactory enough for use as an injection seed in a laser absorption spectrometer. Optimally, seed lasers producing greater than 50 mW of continuous-wave (CW), with frequency jitter of less than 1 MHz are desired to reliably resolve the CO2 absorption lines near 2-µm. In this paper, we report the demonstration of high-power, single-longitudinal-mode laterally coupled distributed feedback (LC-DFB) lasers at 2.05 µm wavelength. We measured more than 80 mW of CW power at -10 ºC for devices with a 4-µm-wide ridge and 2-mm-long cavity.

Fradet, Mathieu↗
NASA NTRS1981

Development of design, qualification, screening, and application requirements for plastic encapsulated solid-state devices for space applications

Test data were collected on 1035 plastic encapsulated devices and 75 hermetically scaled control group devices that were purchased from each of five different manufacturers in the categories of (1) low power Schottsky TTL (bipolar) digital circuits; (2) CMOS digital circuits; (3) operational amplifier linear circuits; and (4) NPN transistors. These parts were subjected to three different initial screening conditions, then to extended life testing, to determine any possible advantages or trends for any particular screen. Several tests were carried out in the areas of flammability testing, humidity testing, high pressure steam (auroclave) testing, and high temperature storage testing. Test results are presented. Procurement and application considerations for use of plastic encapsulated semiconductors are presented and a statistical analysis program written to study the log normal distributions resulting from life testing is concluded.

Source record↗
NASA NTRS2006

Long-Wavelength Infrared (LWIR) Quantum Dot Infrared Photodetector (QDIP) Focal Plane Array

We have exploited the artificial atomlike properties of epitaxially self-assembled quantum dots for the development of high operating temperature long wavelength infrared (LWIR) focal plane arrays. Quantum dots are nanometer-scale islands that form spontaneously on a semiconductor substrate due to lattice mismatch. QDIPs are expected to outperform quantum well infrared detectors (QWIPs) and are expected to offer significant advantages over II-VI material based focal plane arrays. QDIPs are fabricated using robust wide bandgap III-V materials which are well suited to the production of highly uniform LWIR arrays. We have used molecular beam epitaxy (MBE) technology to grow multi-layer LWIR quantum dot structures based on the InAs/InGaAs/GaAs material system. JPL is building on its significant QWIP experience and is basically building a Dot-in-the-Well (DWELL) device design by embedding InAs quantum dots in a QWIP structure. This hybrid quantum dot/quantum well device offers additional control in wavelength tuning via control of dot-size and/or quantum well sizes. In addition the quantum wells can trap electrons and aide in ground state refilling. Recent measurements have shown a 10 times higher photoconductive gain than the typical QWIP device, which indirectly confirms the lower relaxation rate of excited electrons (photon bottleneck) in QDPs. Subsequent material and device improvements have demonstrated an absorption quantum efficiency (QE) of approx. 3%. Dot-in-the-well (DWELL) QDIPs were also experimentally shown to absorb both 45 deg. and normally incident light. Thus we have employed a reflection grating structure to further enhance the quantum efficiency. JPL has demonstrated wavelength control by progressively growing material and fabricating devices structures that have continuously increased in LWIR response. The most recent devices exhibit peak responsivity out to 8.1 microns. Peak detectivity of the 8.1 micrometer devices has reached approx. 1 x 10(exp 10) Jones at 77 K. Furthermore, we have fabricated the first long-wavelength 640x512 pixels QDP focal plane array. This QDIP focal plane may has produced excellent infrared imagery with noise equivalent temperature difference of 40 mK at 60K operating temperature. In addition, we have managed to increase the quantum efficiency of these devices from 0.1% (according to the data published in literature) to 20% in discrete devices. This is a factor of 200 increase in quantum efficiency. With these excellent results, for the first time QDIP performance has surpassed the QWIP performance. Our goal is to operate these long-wavelength detectors at much higher operating temperature than 77K which can be passively achieved in space. This will be a huge leap in high performance infrared detectors specifically applicable to space science instruments.

infrared imaging↗
NASA NTRS2015

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

JFET↗
NASA NTRS1977

Room-temperature-operation visible-emission semiconductor diode lasers

There were two main approaches taken to develop shorter wavelength lasers. (1) Based on (AlGa)As and liquid-phase epitaxy, significant new results were obtained: Properties of these laser diodes (power output, spectra, and beam patterns), materials considerations, laser theory, and growth problems are discussed. The design of (AlGa)As layers is discussed from the vertical point of view, and various design curves are given. Horizontal structural requirements are also discussed. Experimental results from measurements done as a function of hydrostatic pressure are correlated with other results. (2) The first heterojunction laser structures using GaAs sub l-x P sub x and In sub y Ga sub l-y P at compositions, where the lattice constants are matched, were grown using vapor-phase growth technology and are described in detail, including experimental device results. Threshold current densities from 3,000 to 5,000 A per sq cm. and emission wavelengths from 6,520 A to 6,640 A were obtained at 77 K. The limiting factor in these devices is nonradiative recombination at the heterojunctions. Life tests on facet-coated (AlGa)As CW diodes are reported.

Ladany, I.↗
NASA NTRS2000

Methods for forming group III-V arsenide-nitride semiconductor materials

Methods are disclosed for forming Group III--arsenide-nitride semiconductor materials. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V crystals varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V crystals can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

Major, Jo S.↗
NASA NTRS2002

Methods for forming group III-arsenide-nitride semiconductor materials

Methods are disclosed for forming Group III-arsenide-nitride semiconductor materials. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V crystals varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V crystals can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

Major, Jo S.↗