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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,225 records · Page 68
All sourcesNASA NTRSDOE OSTI
NASA NTRS1983

A perspective of theoretical and applied computational fluid dynamics

The present effectiveness and future promise of computational fluid dynamics (CFD) are discussed. The CFD ideal of computer-designed flight vehicles and the progress that has been made toward its achievement, expressed in terms of primary and secondary pacing items, are also addressed. The primary pacing items listed by Chapman - grid generation, turbulence modeling, solution methodology development, and mainframe computer methods and architecture - are modified and reviewed. Important secondary pacing items in CFD development are also examined: algorithm development, complex geometry definition, and predata and postata processing. In addition, user requirements placed on CFD computer codes are defined and some problems associated with the dissemination of CFD technology are identified.

Kutler, P.↗
DOE OSTI2016

VTK-m: Accelerating the Visualization Toolkit for Massively Threaded Architectures

Execution on massively threaded processors is one of the most critical challenges for high-performance computing (HPC) scientific visualization. Of the many fundamental changes we are seeing in HPC systems, one of the most profound is a reliance on new processor types optimized for execution bandwidth over latency hiding. Moreover, our current production scientific visualization software is not designed for these new types of architectures. In order to address this issue, the VTK-m framework serves as a container for algorithms, provides flexible data representation, and simplifies the design of visualization algorithms on new and future computer architecture.

97 MATHEMATICS AND COMPUTING↗
NASA NTRSDate not supplied

Computational Modeling Development of Solid-state Architecture Batteries for Enhanced Rechargeability and Safety for Electric Aircraft

All electric vertical take-off and landing vehicles (eVTOL) for urban air mobility (UAM) concepts face numerous challenging technical barriers before their introduction into the consumer marketplace. The most challenging of these technical barriers to overcome is developing an energy storage system capable of meeting the rigorous aerospace safety and performance criteria. The performance metrics for eVTOL craft are at least 2 times greater than those of electric automobiles. Furthermore, safety is essential for operation of commercial electric aerovehicles. Preliminary systems level analysis has indicated that there are five key properties which must be optimized for successful implementation of battery systems. Those five key criteria are: safety, energy density, power, packaging design and scalability. Current state-of-the-art (SOA) lithium-ion batteries meet or exceed the requirements for electric aviation in the areas of power and scalability, yet are insufficient in the key performance criteria of energy, safety and packaging design. The SABERS concept proposes a battery that meets all five key performance criteria through development of a solid-state architecture battery utilizing high energy density and power density sulfur-selenium cathode with a lithium metal anode. The combination of sulfur and selenium offers a balanced energy-to-power density ratio, which can be tailored to the specific application by altering the stoichiometric ratios of sulfur to selenium. This cathode will be developed by implementing NASA patented holey graphene technology as a highly conductive, ultra-lightweight electrode scaffold. A solid-state electrolyte will be used as a safe, non-flammable replacement to the highly flammable liquid organic electrolytes currently used in SOA lithium-ion batteries. This solid-state lithium-sulfur-selenium cell will be designed into a serial stacking configuration to enable dense packaging of the battery cells. The serial stacking configuration is termed a bipolar stack, which has the advantages of reducing overall cell weight, reducing the amount of interfaced connections for the cell, and minimizing the cooling requirements for the cell. Lastly, optimization of battery components will occur through a robust and rigorous combination of various computational modeling techniques covering multiple length scales. The expected result will be a fully solid-state battery with operational temperatures from 0 °C to 150 °C which provides the required energy density, discharge rates, and inherent safety to meet the strict aerospace performance criteria. This presentation will show initial results that demonstrate the SABERS Team has developed a composite carbon-sulfur cathode which exceeds 1100 Wh/kg at a discharge rate of 0.4C, and 804 Wh/kg at a discharge rate of 1C. Additionally, this presentation will show the SABERS Team multiscale computational modeling approach and has produced a novel particle dynamics method called Solid Electrolyte Sphere Approximation Model (SESAM). SESAM is on the 1-10 µm scale and provides electromechanical and grain interactions for predictive design guidelines for the experimental team to follow.

Urban Air Mobility (UAM) Vehicles↗
DOE OSTI2023

GPU-acceleration of tensor renormalization with PyTorch using CUDA

We show that numerical computations based on tensor renormalization group (TRG) methods can be significantly accelerated with PyTorch on graphics processing units (GPUs) by leveraging NVIDIA's Compute Unified Device Architecture (CUDA). Here we find improvement in the runtime and its scaling with bond dimension for two-dimensional systems. Our results establish that the utilization of GPU resources is essential for future precision computations with TRG.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1989

Parallel Architectures for Planetary Exploration Requirements (PAPER)

The Parallel Architectures for Planetary Exploration Requirements (PAPER) project is essentially research oriented towards technology insertion issues for NASA's unmanned planetary probes. It was initiated to complement and augment the long-term efforts for space exploration with particular reference to NASA/LaRC's (NASA Langley Research Center) research needs for planetary exploration missions of the mid and late 1990s. The requirements for space missions as given in the somewhat dated Advanced Information Processing Systems (AIPS) requirements document are contrasted with the new requirements from JPL/Caltech involving sensor data capture and scene analysis. It is shown that more stringent requirements have arisen as a result of technological advancements. Two possible architectures, the AIPS Proof of Concept (POC) configuration and the MAX Fault-tolerant dataflow multiprocessor, were evaluated. The main observation was that the AIPS design is biased towards fault tolerance and may not be an ideal architecture for planetary and deep space probes due to high cost and complexity. The MAX concepts appears to be a promising candidate, except that more detailed information is required. The feasibility for adding neural computation capability to this architecture needs to be studied. Key impact issues for architectural design of computing systems meant for planetary missions were also identified.

Cezzar, Ruknet↗
DOE OSTI2025

Bridging paradigms: Designing for HPC-Quantum convergence

Here, this paper presents a comprehensive software stack architecture for integrating quantum computing (QC) capabilities with High-Performance Computing (HPC) environments. While quantum computers show promise as specialized accelerators for scientific computing, their effective integration with classical HPC systems presents significant technical challenges. We propose a hardware-agnostic software framework that supports both current noisy intermediate-scale quantum devices and future fault-tolerant quantum computers, while maintaining compatibility with existing HPC workflows. The architecture includes a quantum gateway interface, standardized APIs for resource management, and robust scheduling mechanisms to handle both simultaneous and interleaved quantum–classical workloads. Key innovations include: (1) a unified resource management system that efficiently coordinates quantum and classical resources, (2) a flexible quantum programming interface that abstracts hardware-specific details, (3) A Quantum Platform Manager API that simplifies the integration of various quantum hardware systems, and (4) a comprehensive tool chain for quantum circuit optimization and execution. We demonstrate our architecture through implementation of quantum–classical algorithms, including the variational quantum linear solver, showcasing the framework’s ability to handle complex hybrid workflows while maximizing resource utilization. This work provides a foundational blueprint for integrating QC capabilities into existing HPC infrastructures, addressing critical challenges in resource management, job scheduling, and efficient data movement between classical and quantum resources.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2018

Symplectic multi-particle tracking on GPUs

A symplectic multi-particle tracking model is implemented on the Graphic Processing Units (GPUs) using the Compute Unified Device Architecture (CUDA) language. The symplectic tracking model can preserve phase space structure and reduce non-physical effects in long term simulation, which is important for beam property evaluation in particle accelerators. Though this model is computationally expensive, it is very suitable for parallelization and can be accelerated significantly by using GPUs. In this paper, we optimized the implementation of the symplectic tracking model on both single GPU and multiple GPUs. Using a single GPU processor, the code achieves a factor of 2-10 speedup for a range of problem sizes compared with the time on a single state-of-the-art Central Processing Unit (CPU) node with similar power consumption and semiconductor technology. It also shows good scalability on a multi-GPU cluster at Oak Ridge Leadership Computing Facility. In an application to beam dynamics simulation, the GPU implementation helps save more than a factor of two total computing time in comparison to the CPU implementation.

43 PARTICLE ACCELERATORS↗
DOE OSTI2014

Computer Science Research Institute (CSRI) Summer Proceedings 2013

The Computer Science Research Institute (CSRI) brings university faculty and students to Sandia National Laboratories for focused collaborative research on computer science, computational science, and mathematics problems that are critical to the mission of the laboratories, the Department of Energy, and the United States. The CSRI provides a mechanism by which university researchers learn about and impact national— and global—scale problems while simultaneously bringing new ideas from the academic research community to bear on these important problems. A key component of CSRI programs over the last decade has been an active and productive summer program where students from around the country conduct internships at CSRI. Each student is paired with a Sandia staff member who serves as technical advisor and mentor. The goals of the summer program are to expose the students to research in mathematical and computer sciences at Sandia and to conduct a meaningful and impactful summer research project with their Sandia mentor. Every effort is made to align summer projects with the student's research objectives and all work is coordinated with the ongoing research activities of the Sandia mentor in alignment with Sandia technical thrusts. For the 2013 CSRI Proceedings, research articles have been organized into the following broad technical focus areas — Computational Mathematics and Algorithms, Combinatorial Algorithms and Visualization, Advanced Architectures and Systems Software, Computational Applications — which are well aligned with Sandia's strategic thrusts in computer and information sciences.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1972

A survey of an introduction to fault diagnosis algorithms

This report surveys the field of diagnosis and introduces some of the key algorithms and heuristics currently in use. Fault diagnosis is an important and a rapidly growing discipline. This is important in the design of self-repairable computers because the present diagnosis resolution of its fault-tolerant computer is limited to a functional unit or processor. Better resolution is necessary before failed units can become partially reuseable. The approach that holds the greatest promise is that of resident microdiagnostics; however, that presupposes a microprogrammable architecture for the computer being self-diagnosed. The presentation is tutorial and contains examples. An extensive bibliography of some 220 entries is included.

Mathur, F. P.↗
NASA NTRS2000

Dynamic Load-Balancing for Distributed Heterogeneous Computing of Parallel CFD Problems

The developed methodology is aimed at improving the efficiency of executing block-structured algorithms on parallel, distributed, heterogeneous computers. The basic approach of these algorithms is to divide the flow domain into many sub- domains called blocks, and solve the governing equations over these blocks. Dynamic load balancing problem is defined as the efficient distribution of the blocks among the available processors over a period of several hours of computations. In environments with computers of different architecture, operating systems, CPU speed, memory size, load, and network speed, balancing the loads and managing the communication between processors becomes crucial. Load balancing software tools for mutually dependent parallel processes have been created to efficiently utilize an advanced computation environment and algorithms. These tools are dynamic in nature because of the chances in the computer environment during execution time. More recently, these tools were extended to a second operating system: NT. In this paper, the problems associated with this application will be discussed. Also, the developed algorithms were combined with the load sharing capability of LSF to efficiently utilize workstation clusters for parallel computing. Finally, results will be presented on running a NASA based code ADPAC to demonstrate the developed tools for dynamic load balancing.

Ecer, A.↗
DOE OSTI2019

NoC-enabled Software/Hardware Co-Design Framework for Accelerating k-mer Counting

Counting k-mers (substrings of fixed length k) in DNA and protein sequences generate non-uniform and irregular memory access patterns. Processing-in-Memory (PIM) architectures have potential to significantly reduce the overheads associated with such frequent and irregular memory accesses. However, existing k-mer counting algorithms are not designed to exploit the advantages of PIM architectures. Furthermore, owing to thermal constraints, the allowable power budget is limited in conventional PIM designs. Moreover, k-mer counting generates long-range, non-uniform traffic patterns which needs to be handled by an efficient Network-on-Chip (NoC). In this paper, we present an NoC-enabled hardware/software co-design framework to implement high-performance k-mer counting. The proposed architecture enables more computational power, efficient communication between cores/memory – all without creating a thermal bottleneck. The software component overcomes the I/O bottleneck, aids in NoC design and exposes more in-memory opportunities to exploit in PIM. Experimental results show that the proposed architecture outperforms a state-of-the-art software implementation using Hybrid Memory Cube (HMC), by up to 7.14X, while allowing significantly higher power budget.

Joardar, Biresh K.↗
DOE OSTI2017

XPRESS: eXascale PRogramming Environment and System Software

The XPRESS project is the research and development of a complete software architecture for Exascale computing. The four major R&D thrusts include: 1) an Exascale lightweight kernel operating system (LXK), based on the Kitten operating system (OS), to manage billion way hardware parallelism, management of faults and power, management of global virtual name space, and other features of future system architectures; 2) a runtime system (HPX-5), co-designed with LXK, based on the ParalleX execution model that supports dynamic resource management and task scheduling; 3) system interfaces for interoperability between the runtime system and both the OS and the runtime system (RIOS); 4) compilation strategies and systems to translate MPI and OpenMP legacy codes to a form that can be run with performance at least as good as a native code implementation. The software architecture development has been driven by performance evaluation of mini-applications developed at Department of Energy Co-Design Centers as well as ancillary in-house developed applications and benchmarks. Research on the ParalleX execution model has been driven by the development of formal semantics and model checkers for the execution model. The major components of the software architecture are: ParalleX execution model – guiding principles for co-design of components of the system stack with advances in locality management and task prioritization through introspection; HPX runtime system – support of application dynamic adaptive resource management, task scheduling, and introspective control policies; LXK operating system – lightweight kernel operating system for order-constant scalability and low/no noise to manage resources; RIOS – a realm of Exascale system operation unique in the XPRESS project that includes the relationship between the new generation of lightweight kernel operating systems and runtime system software; XPI advanced programming model – intermediate form and low-level (readable) programming interface reflecting the ParalleX model, providing a target for source-to- source high level parallel language translation, and supporting early direct programming experimentation and measurement; Performance models & metrics – providing parameters and their mutual sensitivities to guide co-design and quantify operational behavior; Legacy migration – ensuring seamless transition of legacy codes and programming methods to the future generation of ParalleX-based Exascale systems; . Experiments and evaluation – critical to determining degree of effectiveness and likelihood of ultimate success as well as guiding corrective design changes to achieve DOE objectives; and Applications – collaborations with Co-Design Centers and other mission critical codes. The exemplar implementation of the ParalleX execution model, HPX-5, has been released along with five fully ported applications (LULESH, HPCG, SSSP, WAMR, and DASHMM) and multiple microbenchmarks. Using these applications, the system architecture demonstrated dynamic load balancing through active migration, legacy code migration, and data-driven approaches to for graph-like applications. Crucially for Exascale and billion way parallelism, the needs and patterns of irregular applications in HPX-5 were addressed using local flow control rather than relying on globally synchronized data structures.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2017

A historical survey of algorithms and hardware architectures for neural-inspired and neuromorphic computing applications

In this study, biological neural networks continue to inspire new developments in algorithms and microelectronic hardware to solve challenging data processing and classification problems. Here in this research, we survey the history of neural-inspired and neuromorphic computing in order to examine the complex and intertwined trajectories of the mathematical theory and hardware developed in this field. Early research focused on adapting existing hardware to emulate the pattern recognition capabilities of living organisms. Contributions from psychologists, mathematicians, engineers, neuroscientists, and other professions were crucial to maturing the field from narrowly-tailored demonstrations to more generalizable systems capable of addressing difficult problem classes such as object detection and speech recognition. Algorithms that leverage fundamental principles found in neuroscience such as hierarchical structure, temporal integration, and robustness to error have been developed, and some of these approaches are achieving world-leading performance on particular data classification tasks. Additionally, novel microelectronic hardware is being developed to perform logic and to serve as memory in neuromorphic computing systems with optimized system integration and improved energy efficiency. Key to such advancements was the incorporation of new discoveries in neuroscience research, the transition away from strict structural replication and towards the functional replication of neural systems, and the use of mathematical theory frameworks to guide algorithm and hardware developments.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

A Framework for Self-Adaptive Dispersal of Computing Services

Modern networking architectures are making it increasingly possible to disperse services not just across servers but into intermediate network devices as well. Here we introduce the Misson-oriented Adaptive Placement (MAP) architecture, which synthesizes prior work on middleware, load-balancing, constraint solving, and aggregate programming into a framework for self-adaptive management of dispersed services. We provide a first evaluation of the efficacy and resilience that can be provided through this approach: results in simulation demonstrating that MAP can autonomously change the deployment of services to adapt to changing needs and failures.

Paulos, Aaron↗