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At least 1,207 records · Page 67

Performance analysis of a hybrid ARQ error control scheme for near earth satellite communications

A robust error control coding scheme is presented. The scheme is a cascaded forward error correction (FEC) scheme supported by parity retransmissions for further error correction in the erroneous data words. The error performance and throughput efficiency of the scheme are analyzed. Two specific schemes are proposed for NASA near earth satellite communications. It is shown that both schemes provide high reliability and throughput efficiency even for high channel bit error rates in the range of .002. The schemes are suitable for high data rate file transfer.

Lin, Shu↗

Recursive least squares estimation and Kalman filtering by systolic arrays

One of the most promising new directions for high-throughput-rate problems is that based on systolic arrays. In this paper, using the matrix-decomposition approach, a systolic Kalman filter is formulated as a modified square-root information filter consisting of a whitening filter followed by a simple least-squares operation based on the systolic QR algorithm. By proper skewing of the input data, a fully pipelined time and measurement update systolic Kalman filter can be achieved with O(n squared) processing cells, resulting in a system throughput rate of O (n).

Chen, M. J.↗

Systolic array processing of the Viterbi algorithm

Results on efficient forms of decoding convolutional codes based on the Viterbi algorithm by using systolic arrays are presented. Various properties of convolutional codes are discussed. A technique called strongly connected trellis decoding is introduced to increase the efficient utilization of all the systolic array processors. Issues dealing with the composite branch metric generation, survivor updating, overall system architecture, throughput rate, and computational overhead ratio also investigated. The scheme is applicable to both hard and soft decoding of any rate b/n convolutional code. It is shown that as the length of the code becomes large, the systolic Viterbi decoder maintains a regular and general interconnection structure as well as moderate throughput rate gain over the sequential Viterbi decoder.

Chang, Chi-Yung↗

Performance analysis of local area networks

A simulation of the TCP/IP protocol running on a CSMA/CD data link layer was described. The simulation was implemented using the simula language, and object oriented discrete event language. It allows the user to set the number of stations at run time, as well as some station parameters. Those parameters are the interrupt time and the dma transfer rate for each station. In addition, the user may configure the network at run time with stations of differing characteristics. Two types are available, and the parameters of both types are read from input files at run time. The parameters include the dma transfer rate, interrupt time, data rate, average message size, maximum frame size and the average interarrival time of messages per station. The information collected for the network is the throughput and the mean delay per packet. For each station, the number of messages attempted as well as the number of messages successfully transmitted is collected in addition to the throughput and mean packet delay per station.

Alkhatib, Hasan S.↗

Methods for the development of a bioregenerative life support system

Presented here is a rudimentary approach to designing a life support system based on the utilization of plants and animals. The biggest stumbling block in the initial phases of developing a bioregenerative life support system is encountered in collecting and consolidating the data. If a database existed for the systems engineer so that he or she may have accurate data and a better understanding of biological systems in engineering terms, then the design process would be simplified. Also addressed is a means of evaluating the subsystems chosen. These subsystems are unified into a common metric, kilograms of mass, and normalized in relation to the throughput of a few basic elements. The initial integration of these subsystems is based on input/output masses and eventually balanced to a point of operation within the inherent performance ranges of the organisms chosen. At this point, it becomes necessary to go beyond the simplifying assumptions of simple mass relationships and further define for each organism the processes used to manipulate the throughput matter. Mainly considered here is the fact that these organisms perform input/output functions on differing timescales, thus establishing the need for buffer volumes or appropriate subsystem phasing. At each point in a systematic design it is necessary to disturb the system and discern its sensitivity to the disturbance. This can be done either through the introduction of a catastrophic failure or by applying a small perturbation to the system. One example is increasing the crew size. Here the wide range of performance characteristics once again shows that biological systems have an inherent advantage in responding to systemic perturbations. Since the design of any space-based system depends on mass, power, and volume requirements, each subsystem must be evaluated in these terms.

Goldman, Michelle↗

Research in software allocation for advanced manned mission communications and tracking systems

An assessment of the planned processing hardware and software/firmware for the Communications and Tracking System of the Space Station Freedom (SSF) was performed. The intent of the assessment was to determine the optimum distribution of software/firmware in the processing hardware for maximum throughput with minimum required memory. As a product of the assessment process an assessment methodology was to be developed that could be used for similar assessments of future manned spacecraft system designs. The assessment process was hampered by changing requirements for the Space Station. As a result, the initial objective of determining the optimum software/firmware allocation was not fulfilled, but several useful conclusions and recommendations resulted from the assessment. It was concluded that the assessment process would not be completely successful for a system with changing requirements. It was also concluded that memory requirements and hardware requirements were being modified to fit as a consequence of the change process, and although throughput could not be quantitized, potential problem areas could be identified. Finally, inherent flexibility of the system design was essential for the success of a system design with changing requirements. Recommendations resulting from the assessment included development of common software for some embedded controller functions, reduction of embedded processor requirements by hardwiring some Orbital Replacement Units (ORUs) to make better use of processor capabilities, and improvement in communications between software development personnel to enhance the integration process. Lastly, a critical observation was made regarding the software integration tasks did not appear to be addressed in the design process to the degree necessary for successful satisfaction of the system requirements.

Warnagiris, Tom↗

An error control system with multiple-stage forward error corrections

A robust error-control coding system is presented. This system is a cascaded FEC (forward error control) scheme supported by parity retransmissions for further error correction in the erroneous data words. The error performance and throughput efficiency of the system are analyzed. Two specific examples of the error-control system are studied. The first example does not use an inner code, and the outer code, which is not interleaved, is a shortened code of the NASA standard RS code over GF(28). The second example, as proposed for NASA, uses the same shortened RS code as the base outer code C2, except that it is interleaved to a depth of 2. It is shown that both examples provide high reliability and throughput efficiency even for high channel bit-error rates in the range of 0.01.

Takata, Toyoo↗

Queueing in networks of computers

The designers of networks of computers must assess the capacity of the network to complete work within reasonable times. The utilization law, Little's law, forced-flow law, and response time formula are simple tools that can be used to calculate throughput and response times of networks. Bottleneck analysis can be used to calculate simple lower bounds on response time in terms of individual server parameters and the load on network as a whole. These simple results are important tools for all users of scientific networks - back of the envelope calculations can quickly reveal the effects of distant servers on local throughput and response time.

Denning, Peter J.↗

Fault-tolerance techniques for high-speed fiber-optic networks

Four fiber optic network topologies (linear bus, ring, central star, and distributed star) are discussed relative to their application to high data throughput, fault tolerant networks. The topologies are also examined in terms of redundancy and the need to provide for single point, failure free (or better) system operation. Linear bus topology, although traditionally the method of choice for wire systems, presents implementation problems when larger fiber optic systems are considered. Ring topology works well for high speed systems when coupled with a token passing protocol, but it requires a significant increase in protocol complexity to manage system reconfiguration due to ring and node failures. Star topologies offer a natural fault tolerance, without added protocol complexity, while still providing high data throughput capability.

Deruiter, John↗

Sloppy-slotted ALOHA

Random access signaling, which allows slotted packets to spill over into adjacent slots, is investigated. It is shown that sloppy-slotted ALOHA can always provide higher throughput than conventional slotted ALOHA. The degree of improvement depends on the timing error distribution. Throughput performance is presented for Gaussian timing error distributions, modified to include timing error corrections. A general channel capacity lower bound, independent of the specific timing error distribution, is also presented.

Crozier, Stewart N.↗

Applying generalized stochastic Petri nets to manufacturing systems containing nonexponential transition functions

Generalized stochastic Petri nets (GSPNs) are applied to flexible manufacturing systems (FMSs). Throughput subnets and s-transitions are presented. Two FMS examples containing nonexponential distributions which were analyzed in previous papers by queuing theory and probability theory, respectively, are treated using GSPNs developed using throughput subnets and s-transitions. The GSPN results agree with the previous results, and developing and analyzing the GSPN models are straightforward and relatively easy compared to other methodologies.

Watson, James F., III↗

An ultrareliable integrated digital computer for helicopters

The US Army Fault-Tolerant Architecture (AFTA) has been defined to meet real-time fault-tolerant processing requirements of future Army applications. AFTA is the enabling technology that will allow the Army to configure existing processors and other hardware to provide high throughput and ultrahigh reliability necessary for terrain-following/terrain-avoidance (TF/TA) and nap-of-the-earth (NOE) flight control and other advanced Army applications. A brief description of AFTA's relevant attributes and theory of operation is given. The systems engineering models which permit the configuration on an AFTA to meet mission requirements as they evolve are presented, along with an example of their use to engineer an AFTA configuration. The resulting AFTA configuration, its predicted throughput, reliability, availability, weight, power, volume, and life-cycle cost impact, and the effects of possible engineering tradeoffs are presented.

Harper, Richard E.↗

Spatial heterodyne spectroscopy for the exploration of diffuse interstellar emission lines at far-ultraviolet wavelengths

Spatial heterodyne spectroscopy (SHS) is a new instrumental technique for interference spectroscopy which promises to extend into the FUV (1200-2000 A) spectral region the large throughput advantage at high spectral resolution usually associated with Fabry-Perot and Michelson interferometers. In addition, SHS systems are compact in size, can be field-widened to increase their throughput even further, have no moving parts, and can be built in all-reflection configurations. SHS appears to be well suited for high resolution, space-based spectroscopy of faint interstellar emission lines in the ultraviolet. This has significant implications for the study of the dynamics and distribution of hot gas within the Galactic disk and halo. For example, a field-widened SHS incorporating 5 x 5 cm gratings could obtain a radial velocity resolved (20 km/s), 3 deg angular resolution map of the high-latitude interstellar C IV 1550 emission in less than 1 year.

Harlander, J.↗

Striped tape arrays

A growing number of applications require high capacity, high throughput tertiary storage systems. How data striping ideas apply to arrays of magnetic tape drives is investigated. Data striping increases throughput and reduces response time for large accesses to a storage system. Striped magnetic tape systems are particularly appealing because many inexpensive magnetic tape drives have low bandwidth; striping may offer dramatic performance improvements for these systems. There are several important issues in designing striped tape systems: the choice of tape drives and robots, whether to stripe within or between robots, and the choice of the best scheme for distributing data on cartridges. One of the most troublesome problems in striped tape arrays is the synchronization of transfers across tape drives. Another issue is how improved devices will affect the desirability of striping in the future. The results of simulations comparing the performance of striped tape systems to non-striped systems are presented.

Drapeau, Ann L.↗

Firmware Development Improves System Efficiency

Most manufacturing processes require physical pointwise positioning of the components or tools from one location to another. Typical mechanical systems utilize either stop-and-go or fixed feed-rate procession to accomplish the task. The first approach achieves positional accuracy but prolongs overall time and increases wear on the mechanical system. The second approach sustains the throughput but compromises positional accuracy. A computer firmware approach has been developed to optimize this point wise mechanism by utilizing programmable interrupt controls to synchronize engineering processes 'on the fly'. This principle has been implemented in an eddy current imaging system to demonstrate the improvement. Software programs were developed that enable a mechanical controller card to transmit interrupts to a system controller as a trigger signal to initiate an eddy current data acquisition routine. The advantages are: (1) optimized manufacturing processes, (2) increased throughput of the system, (3) improved positional accuracy, and (4) reduced wear and tear on the mechanical system.

Chern, E. James↗

X Ray, Far, and Extreme Ultraviolet Coatings for Space Applications

The idea of utilizing imaging mirrors as narrow band filters constitutes the basis of the design of extreme ultraviolet imagers operating at 58.4 nm and 83.4 nm. The net throughput of both imaging-filtering systems is better than 20 percent. The superiority of the EUV self-filtering camera/telescope becomes apparent when compared to previously theoretically designed 83.4-nm filtering-imaging systems, which yielded transmissions of less than a few percent and therefore less than 0.1 percent throughput when combined with at least two imaging mirrors. Utilizing the self-filtering approach, instruments with similar performances are possible for imaging at other EUV wavelengths, such as 30.4 nm. The self-filtering concept is extended to the X-ray region where its application can result in the new generation of X-ray telescopes, which could replace current designs based on large and heavy collimators.

Zukic, M.↗

Using Transparent Informed Prefetching (TIP) to reduce file read latency

As processor performance gains continue to outstrip Input/Output gains, I/O performance is becoming critical to overall system performance. File read latency is the most significant bottleneck for high performance I/O. Other aspects of I/O performance benefit from recent advances in disk bandwidth and throughput resulting from disk arrays, and in write performance derived from buffered write behind and the Log-structured File System. The access gap problem limiting improvements in read latency is exacerbated by distributed file systems operating over networks with diverse bandwidth. Focus is on extending the power of caching and prefetching to reduce file read latencies by exploiting hints from high-levels of a system. Such Transparent Informed Prefetching, TIP, and its benefits are described. It is argued that hints that disclose high level knowledge are a means for transferring optimization information across, without violating, module boundaries. How TIP can be used to convert the high throughput of new technologies such as disk arrays and log-structured file systems into low latency for applications is discussed. Our preliminary experiments show reductions in wall - clock execution time of 13 percent and 20 percent for a multiple module compilation tool (make) accessing data on a local disk and remote Coda file server, respectively, and a reduction of 30 percent for a text search (grep) remotely accessing many small files.

Patterson, R. H.↗

Matrix-vector multiplication using digital partitioning for more accurate optical computing

Digital partitioning offers a flexible means of increasing the accuracy of an optical matrix-vector processor. This algorithm can be implemented with the same architecture required for a purely analog processor, which gives optical matrix-vector processors the ability to perform high-accuracy calculations at speeds comparable with or greater than electronic computers as well as the ability to perform analog operations at a much greater speed. Digital partitioning is compared with digital multiplication by analog convolution, residue number systems, and redundant number representation in terms of the size and the speed required for an equivalent throughput as well as in terms of the hardware requirements. Digital partitioning and digital multiplication by analog convolution are found to be the most efficient alogrithms if coding time and hardware are considered, and the architecture for digital partitioning permits the use of analog computations to provide the greatest throughput for a single processor.

Gary, C. K.↗