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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,207 records · Page 67
All sourcesNASA NTRSDOE OSTI
DOE OSTI2014

Scaling Graph Community Detection on the Tilera Many-core Architecture

In an era when power constraints and data movement are proving to be significant barriers for the application of high-end computing, the Tilera many-core architecture offers a low-power platform exhibiting many important characteristics of future systems, including a large number of simple cores, a sophisticated network-on-chip, and fine-grained control over memory and caching policies. While this emerging architecture has been previously studied for structured compute-intensive kernels, benchmarking the platform for data-bound, irregular applications present significant challenges that have remained unexplored. Community detection is an advanced prototypical graph-theoretic operation with applications in numerous scientific domains including life sciences, cyber security, and power systems. In this work, we explore multiple design strategies toward developing a scalable tool for community detection on the Tilera platform. Using several memory layout and work scheduling techniques we demonstrate speedups of up to 46x on 36 cores of the Tilera TileGX36 platform over the best serial implementation, and also show results that have comparable quality and performance to mainstream x86 platforms. To the best of our knowledge this is the first work addressing graph algorithms on the Tilera platform. This study demonstrates that through careful design space exploration, low-power many-core platforms like Tilera can be effectively exploited for graph algorithms that that embody all the essential characteristics of an irregular application.

community detection↗
DOE OSTI2019

Inferring Convolutional Neural Networks' Accuracies from Their Architectural Characterizations

The challenge of choosing an appropriate convolutional neural network (CNN) architecture for specific applications and different data sets is still poorly understood in the literature. This is problematic, since CNNs have shown strong promise for analyzing scientific data from many domains including particle imaging detectors. In this paper, we proposed a systematic language that is useful for comparison between different CNN's architectures before training time. This helps us predict whether a network can perform better than a certain threshold accuracy before training up to 70% accuracy using simple machine learning models. Additionally, we found a coefficient of determination of 0.966 for an Ordinary Least Squares model in a regression task to predict accuracy of a large population of networks.

Hoang, Duc↗
DOE OSTI2018

Efficient, Parallel At-scale Correlation Analysis for Atom Probe Tomography on Hybrid Architectures

Atom probe tomography (APT) is a material probing technique that has undergone dramatic improvements in its capability to map individual atoms within a material sample resulting in data files with hundreds of millions of atoms. Understanding the nano-structural features hidden in these massive amounts of atomic data is a crucial analysis task for materials scientists. However, fast analysis capabilities for large APT workloads remains a critical bottleneck. In this paper, we present the design, implementation and detailed performance evaluations of a parallel software capable of efficiently performing extremely time-consuming correlation analyses of massive high density APT data. Starting with shared memory implementations to motivate our design choices, we extend the implementation to hybrid architectures keeping realistic APT workloads in mind. Detailed performance analyses of three different parallel implementations of the software are supported by empirical results on a Cray XC30 and a Cray XC40 architecture. Its usefulness is demonstrated by reducing the turnaround time of an end-to-end APT correlation analysis on 100 millions atoms by three orders of magnitude using 2048 MPI ranks on 1024 nodes (24 cores per node) of a Cray XC30. The software reported here equips material scientists for the first time with a high-speed scalable capability for efficient and timely analyses of massive APT data.

Lu, Hao↗
DOE OSTI2021

Revisiting Huffman Coding: Toward Extreme Performance on Modern GPU Architectures

Today's high-performance computing (HPC) applications are producing vast volumes of data, which are challenging to store and transfer efficiently during the execution, such that data compression is becoming a critical technique to mitigate the storage burden and data movement cost. Huffman coding is arguably the most efficient Entropy coding algorithm in information theory, such that it could be found as a fundamental step in many modern compression algorithms such as DEFLATE. On the other hand, today's HPC applications are more and more relying on the accelerators such as GPU on supercomputers, while Huffman encoding suffers from low throughput on GPUs, resulting in a significant bottleneck in the entire data processing. In this paper, we propose and implement an efficient Huffman encoding approach based on modern GPU architectures, which addresses two key challenges: (1) how to parallelize the entire Huffman encoding algorithm, including codebook construction, and (2) how to fully utilize the high memory-bandwidth feature of modern GPU architectures. The detailed contribution is fourfold. (1) We develop an efficient parallel codebook construction on GPUs that scales effectively with the number of input symbols. (2) We propose a novel reduction based encoding scheme that can efficiently merge the codewords on GPUs. (3) We optimize the overall GPU performance by leveraging the state-of-the-art CUDA APIs such as Cooperative Groups. (4) We evaluate our Huffman encoder thoroughly using six real-world application datasets on two advanced GPUs and compare with our implemented multi-threaded Huffman encoder. Experiments show that our solution can improve the encoding throughput by up to 5.0x and 6.8x on NVIDIA RTX 5000 and V100, respectively, over the state-of-the-art GPU Huffman encoder, and by up to 3.3x over the multi-thread encoder on two 28-core Xeon Platinum 8280 CPUs.

Tian, Jiannan↗
DOE OSTI2014

Conceptual Architecture of Building Energy Management Open Source Software (BEMOSS)

The objective of this paper is to present a conceptual architecture of a Building Energy Management Open Source Software (BEMOSS) platform. The proposed BEMOSS platform is expected to improve sensing and control of equipment in small- and medium-sized buildings, reduce energy consumption and help implement demand response (DR). It aims to offer: scalability, robustness, plug and play, open protocol, interoperability, cost-effectiveness, as well as local and remote monitoring. In this paper, four essential layers of BEMOSS software architecture -- namely User Interface, Application and Data Management, Operating System and Framework, and Connectivity layers -- are presented. A laboratory test bed to demonstrate the functionality of BEMOSS located at the Advanced Research Institute of Virginia Tech is also briefly described.

agents↗
DOE OSTI2020

Comparison of Linear and Rotary Electric Machine Topologies for a Hybrid Hydraulic Electric Architecture of Off-Highway Vehicles

Electrification of off-highway vehicles offers the benefits of improved energy efficiency, enhanced controllability, and reduction in greenhouse gas emissions. However, progress towards electrification has been limited by the low power density of electric components compared to hydraulic components. A recently proposed hybrid hydraulic electric vehicle architecture provides a potential solution to these power density challenges by minimizing the required power rating of the electric components. This paper investigates the optimal design of linear and rotary electric machines for this new system architecture. Key performance metrics are identified for the electric machine, several variants of electric machines are analytically sized and compared for two different power levels, and an FEA-assisted design optimization is performed on promising candidates. Based on the optimization results, it is shown that an axial flux rotary machine is most suitable for implements requiring high power ratings, while the linear machine's form factor makes it a compelling candidate for lower power implements.

42 ENGINEERING↗
DOE OSTI2023

Machine-Learning Architecture for Ultrasonic Thermometry

Temperature distribution in solids can be inverted from the speed of sound (SOS) measurements, as has been shown feasible by timing the propagation of the excitation pulse and the train of echoes in ultrasonically segmented waveguides (WGs) and metal components. However, complicated geometries and closely-space echogenic features (EFs) create complex waveforms, from which the segmental time of flights (TOFs) are impossible to estimate using traditional methods. This work describes a machine learning architecture shown to extract temperature information from complex ultrasonic waveforms without explicit measurements of segmental TOFs. We accomplish this by using an autoencoder neural network (NN) to map ultrasonic waveforms into a low-dimensional latent space. A second NN then maps the latent space into unknown temperature distribution along the WG. The proposed architecture was tested in simulations and experimentally. The autoencoder accurately reconstructs the waveforms from their latent representation, several orders of magnitude lower in dimensionality. The obtained latent space was successfully mapped into the temperature of the propagation path.

John, Mason↗
DOE OSTI2018

Silicon Photonic Switch Fabrics: Technology and Architecture

We present that photonic switching technologies show potential for transforming communication networks across diverse markets from long-haul to short-reach distance scales due to their large bandwidth density, high energy efficiency, and potential for low cost. In recent years, numerous outstanding advancements have been made in scaled silicon photonic switching fabrics: spanning a variety of manufacturing platforms and packaging methods, relying on different switching mechanisms, and assembled on-chip in a diverse mixture of loosely related architectures. This work reviews the current approaches employed by leading researchers in this area, and surveys the state of the art in achieved performance at both the technological and the architectural level. Specifically, we consider thermo-optic, electrooptic, and MEMS-based switch actuation embedded in Mach Zehnder interferometer, ring resonator, and directional coupler based silicon photonic switches. We define common metrics and compare performances. We outline critical requirements for constructing scaled switch fabrics from elementary cells. Lastly, we investigate similarities and differences between a number of commonly utilized topologies. And, we survey recent accomplishments in scaled switch fabrics at the chip and package level. Moving these demonstrations from research to product will require many further advancements, and we highlight areas that we believe will be critical for market adoption.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

The Computing Architectures Donnybrook

Explains the context and framework I'm creating as the Computer Architectures associate editor for IEEE Computer Magazine. The article is largely a historical recitation of computer architectures.

Williams, Joseph A.↗
DOE OSTI2016

VTK-m: Accelerating the Visualization Toolkit for Massively Threaded Architectures

Execution on massively threaded processors is one of the most critical challenges for high-performance computing (HPC) scientific visualization. Of the many fundamental changes we are seeing in HPC systems, one of the most profound is a reliance on new processor types optimized for execution bandwidth over latency hiding. Moreover, our current production scientific visualization software is not designed for these new types of architectures. In order to address this issue, the VTK-m framework serves as a container for algorithms, provides flexible data representation, and simplifies the design of visualization algorithms on new and future computer architecture.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

ByzSec — A Multi-layered Byzantine Resilient Architecture for Bulk Power System Protective Relays

Reliability, selectivity, and sensitivity are the fundamental attributes of any protection system, acting as the main drivers in the selection of schemes, and equipment. In high-voltage systems, microprocessor-based relays represent the industry’s preferred solution, providing engineers with a vast array of benefits. However, they remain vulnerable to cybersecurity events that may compromise their functionality. To help mitigate against potential cybersecurity risks, this paper presents a fault-tolerant, Byzantine Resilient (BR) architecture that significantly increases the cybersecurity attributes of a protection system while minimizing the amount of performance impacts and integration overheads introduced. The solution relies on an array of independent relays that utilize robust consensus methods (based on Spire [1], [2]) to ensure correct system behavior is achieved even when a relay has been compromised. Furthermore, the solution has been complemented with a custom-built Situational Awareness engine that can be used to detect and identify potential threats. The implemented solution has been developed in consultation with three hardware vendors and has been tested to comply with the performance requirements of a 345kV differential protection scheme (87T). The results indicate that the proposed architecture is a comprehensive solution that: supports the strict correctness and performance requirements of the bulk power grid while providing a cost-effective alternative that offers a seamless, long-term solution.

byzantine security, Fault Tolerant Application Sof↗
DOE OSTI2024

A new HVdc Substation Architecture with Higher Power Transfer Capability

The power transferred through high voltage direct current transmission (HVdc) systems is increasing with increased resilience and reliability needs as well as large scale deployment of renewable energy systems. In this paper, a new HVdc substation (SS) architecture with higher power transfer capability is proposed. The HVdc converters or valve groups (VG) are connected in series and parallel fashion such that the total power rating of the SS is increased. The control challenges associated with such SS architecture are identified and appropriate control modifications are proposed. The same is verified through PSCAD based simulations.

Jaldanki, Sreenivasa↗
DOE OSTI2023

A Hierarchical Control Architecture: Utilization of Behind-the-Meter Appliances with Increased Visibility and Controllability

Optimal operations of distribution systems to enhance reliability and resiliency can be achieved if information with higher fidelity can be accessed from grid premise devices. This paper discusses a hierarchical control architecture that can introduce higher visibility and controllability by utilizing the estimated injection and absorption of different behind-the-meter controllable loads, and DERs, including EVs, within a premise. The acquired information is used to make control decisions for scheduling the premise appliances to reduce energy consumptions. The premise controller can also optimize the consumptions on a day-to-day basis in addition to taking input signals from the utility operators to support grid-service events (e.g., peak shaving). The entire control architecture is designed in a modular and scalable fashion that provides benefits to the utility from the reuse of existing infrastructure while creating opportunities for various grid services to be enabled by the operation of premise controllers.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

PLEXUS: A Pattern-Oriented Runtime System Architecture for Resilient Extreme-Scale High-Performance Computing Systems

For high-performance computing (HPC) system designers and users, meeting the myriad challenges of next-generation exascale supercomputing systems requires rethinking their approach to application and system software design. Among these challenges, providing resiliency and stability to the scientific applications in the presence of high fault rates requires new approaches to software architecture and design. As HPC systems become increasingly complex, they require intricate solutions for detection and mitigation for various modes of faults and errors that occur in these large-scale systems, as well as solutions for failure recovery. These resiliency solutions often interact with and affect other system properties, including application scalability, power and energy efficiency. Therefore, resilience solutions for HPC systems must be thoughtfully engineered and deployed.In previous work, we developed the concept of resilience design patterns, which consist of templated solutions based on well-established techniques for detection, mitigation and recovery. In this paper, we use these patterns as the foundation to propose new approaches to designing runtime systems for HPC systems. The instantiation of these patterns within a runtime system enables flexible and adaptable end-to-end resiliency solutions for HPC environments. The paper describes the architecture of the runtime system, named Plexus, and the strategies for dynamically composing and adapting pattern instances under runtime control. This runtime-based approach enables actively balancing the cost-benefit trade-off between performance overhead and protection coverage of the resilience solutions. Based on a prototype implementation of PLEXUS, we demonstrate the resiliency and performance gains achieved by the pattern-based runtime system for a parallel linear solver application.

Hukerikar, Saurabh↗
DOE OSTI2024

Architecture Design for Remote Operation of Microreactors: Poster

The nuclear sector is pursuing a number of advanced reactor concepts, one of which is the microreactor, an advanced reactor characterized by a power output of less than 20 MWth. These reactors are intended for use in applications where traditional power solutions are economically or logistically impractical. One key feature required for the successful deployment of microreactors is a remote operation capability, which can dramatically cut staffing expenses by eliminating the need for licensed operators to be present at the site of each reactor and instead concentrate in a centrally located operations center. In moving to a remote operations framework for nuclear reactors, the number of potential attack surfaces for a cyber adversary looking to cause harm or disruption increases. Therefore, a robust cybersecurity architecture is required to mitigate these potential vulnerabilities. This paper explores the functional infrastructure, security, and communication requirements to adapt remote operations to nuclear applications. It then presents a reference architecture for remote operations of microreactors that applies best practices in cybersecurity and remote communications in the context of a digital twin remote operation system.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2012

Scalable Triadic Analysis of Large-Scale Graphs: Multi-Core vs. Multi-Processor vs. Multi-Threaded Shared Memory Architectures

Triadic analysis encompasses a useful set of graph mining methods that is centered on the concept of a triad, which is a subgraph of three nodes and the configuration of directed edges across the nodes. Such methods are often applied in the social sciences as well as many other diverse fields. Triadic methods commonly operate on a triad census that counts the number of triads of every possible edge configuration in a graph. Like other graph algorithms, triadic census algorithms do not scale well when graphs reach tens of millions to billions of nodes. To enable the triadic analysis of large-scale graphs, we developed and optimized a triad census algorithm to efficiently execute on shared memory architectures. We will retrace the development and evolution of a parallel triad census algorithm. Over the course of several versions, we continually adapted the code’s data structures and program logic to expose more opportunities to exploit parallelism on shared memory that would translate into improved computational performance. We will recall the critical steps and modifications that occurred during code development and optimization. Furthermore, we will compare the performances of triad census algorithm versions on three specific systems: Cray XMT, HP Superdome, and AMD multi-core NUMA machine. These three systems have shared memory architectures but with markedly different hardware capabilities to manage parallelism.

Triadic analysis, triads, triad census, large-scal↗
DOE OSTI2012

Efficient Sorting on the Tilera Manycore Architecture

e present an efficient implementation of the radix sort algo- rithm for the Tilera TILEPro64 processor. The TILEPro64 is one of the first successful commercial manycore processors. It is com- posed of 64 tiles interconnected through multiple fast Networks- on-chip and features a fully coherent, shared distributed cache. The architecture has a large degree of flexibility, and allows various optimization strategies. We describe how we mapped the algorithm to this architecture. We present an in-depth analysis of the optimizations for each phase of the algorithm with respect to the processor’s sustained performance. We discuss the overall throughput reached by our radix sort implementation (up to 132 MK/s) and show that it provides comparable or better performance-per-watt with respect to state-of-the art implemen- tations on x86 processors and graphic processing units.

manycore↗
DOE OSTI2018

A Multilevel DC to Three-phase AC Architecture for Photovoltaic Power Plants

This study presents a photovoltaic (PV) inverter architecture composed of stackable dc to three-phase ac converter blocks. Several such blocks, each containing a converter power stage and controls, are connected in series on their ac sides to obtain transformerless medium-voltage ac interfaces for PV power plants. The series-connected structure is made possible by a quadruple active bridge dc-dc converter that provides isolation between the PV input and each of the three ac-side phases within each block. Furthermore, since incoming PV power is transferred as constant balanced three-phase ac power, instantaneous inputoutput power balance bypasses the need for bulk energy storage. To streamline implementation and maximize system scalability and resilience, decentralized block-level controllers accomplish dc-link voltage regulation, maximum power point tracking, and ac-side power sharing without centralized means. The proposed architecture is validated by simulations of a PV string to mediumvoltage ac system consisting of six blocks and on a proof-of-concept hardware prototype that consists of three cascaded converter blocks.

14 SOLAR ENERGY↗