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At least 1,189 records · Page 66

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NASA NTRS1974

Design, processing, and testing of LSI arrays for space station

The development of a beam-leaded low power, high performance metal-oxide-semiconductor (MOS), 256-bit random access memory (RAM) was reported. Previous success with the aluminum-gate current-sense version and a silicon-gate voltage-sense version led to the present effort to make a beam-leaded silicon-gate RAM. Some problems unique to the silicon-on-sapphire beam-lead process development are presented. Beam-leaded SOS TA5388 devices using a Si3N4 passivation layer were shown to have good electrical parameters.

Schneider, W. C.↗

NASA NTRS1999

Growth of Compound Semiconductors in a Low Gravity Environment: Microgravity Growth of PbSnTe

The growth of the alloy compound semiconductor lead tin telluride (PbSnTe) was chosen for a microgravity flight experiment in the Advanced Automated Directional Solidification Furnace (AADSF), on the United States Microgravity Payload-3 (USNP-3) in February, 1996 and on USNW- 4 in November, 1997. The objective of these experiments was to determine the effect of the reduction in convection, during the growth process, brought about by the microgravity environment. The properties of devices made from PbSnTe, an alloy of PbTe and SnTe, are dependent on the ratio of the elemental components in the starting crystal. Compositional uniformity in the crystal is only obtained if there is no significant mixing in the liquid during growth. The technological importance of PbSnTe lies in its band gap versus composition diagram which has a zero energy crossing at approximately 40% SnTe. This facilitates the construction of long wavelength (greater than 6 gm) infrared detectors and lasers. The properties and utilization of PbSnTe are the subject of other papers. 1,2 PbSnTe is also interesting from a purely scientific point of view. It is, potentially, both solutally and thermally unstable due to the temperature and density gradients present during growth. Density gradients, through thermal expansion, are imposed in directional solidification because temperature gradients are required to extract heat. Solutal gradients occur in directional solidification of alloys due to segregation at the interface. Usually the gradients vary with both experiment design and inherent materials properties. In a simplified one dimensional analysis with the growth axis parallel to the gravity vector, only one of the two instabilities work at a time. During growth, the temperature in the liquid increases ahead of the interface. Therefore the density, due to thermal expansion, is decreasing in that direction. However, the phase diagram shows that the lighter SnTe is preferentially rejected at the interface. This causes the liquid density to increase with distance away from the interface.

Fripp, A. L.↗

NASA NTRS2006

Better Back Contacts for Solar Cells on Flexible Substrates

Improved low-resistance, semitransparent back contacts, and a method of fabricating them, have been developed for solar photovoltaic cells that are made from thin films of I-III-VI2 semiconductor materials on flexible, high-temperatureresistant polyimide substrates or superstrates. The innovative aspect of the present development lies in the extension, to polyimide substrates or superstrates, of a similar prior development of improved low-resistance, semitransparent back contacts for I-III-VI2 solar cells on glass substrates or superstrates. A cell incorporating this innovation can be used either as a stand-alone photovoltaic device or as part of a monolithic stack containing another photovoltaic device that utilizes light of longer wavelengths.

Woods, Lawrence M.↗

NASA NTRS2008

Current Leakage Evolution in Partially Gate Raptured Power MOSFETs

It has been observed that power MOSFETs can experience an SEGR and continue to function with altered parameters. We propose that there are three different types of SEGR modes; the micro-break, the thermal runaway, and the avalanche breakdown. Data that demonstrates these stages of device failure are presented as well as a proposed model for the micro-break. Brief discussions of the other modes, based on analysis combined with our interpretations of the older literature, are also given.

metal oxide semiconductor field-effect transistors↗

NASA NTRS1977

The effects of the geosynchronous energetic particle radiation environment on spacecraft charging phenomena

The energetic electron environment at the geosynchronous orbit is responsible for a variety of adverse charging effects on spacecraft components. The most serious of these is the degradation and failure of a complementary-metal-oxide-semiconductor (CMOS) electronic components as a result of internal charge-buildup induced by the energetic electrons. Efforts to accurately determine the expected lifetime of these components in this orbit are hampered by the lack of detailed knowledge of the electron spectrum and intensity, particularly of the more penetrating energies greater than 1.5 MeV. This problem is illustrated through the calculation of the dose received by a CMOS device from the energetic electrons and associated bremsstrahlung as a function of aluminum shielding thickness using the NASA AE-6 and the Aerospace measured electron environments. Two computational codes which were found to be in good agreement were used to perform the calculations. For a given shielding thickness the dose received with the two radiation environments differ by as much as a factor of seven with a corresponding variation in lifetime of the CMOS.

Reagan, J. B.↗

NASA NTRS1979

Feasibility study of silicon nitride protection of plastic encapsulated semiconductors

The application of low temperature silicon nitride protective layers on wire bonded integrated circuits mounted on lead frame assemblies is reported. An evaluation of the mechanical and electrical compatibility of both plasma nitride and photochemical silicon nitride (photonitride) passivations (parallel evaluations) of integrated circuits which were then encapsulated in plastic is described. Photonitride passivation is compatible with all wire bonded lead frame assemblies, with or without initial chip passivation. Plasma nitride passivation of lead frame assemblies is possible only if the chip is passivated before lead frame assembly. The survival rate after the environmental test sequence of devices with a coating of plasma nitride on the chip and a coating of either plasma nitride or photonitride over the assembled device is significantly greater than that of devices assembled with no nitride protective coating over either chip or lead frame.

Peters, J. W.↗

NASA NTRS1972

A high resolution semiconductor detector for applications in space

Nuclear radiation detectors with volumes of approximately 1 cu cm was fabricated from single crystals of germanium-silicon alloy containing as much as 20 weight percent germanium. The properties of these detectors were investigated and will be discussed. Tests reveal that the gamma ray photoelectric peak efficiency of an alloy detector with only 12 weight percent germanium is approximately 4 times that of a silicon detector of equal volume. The room temperature roomure appears to be a good possibility. Storage for long periods at room temperature does not seem to adversely affect these devices. The results of preliminary radiation damage experiments suggest that the alloy detectors possess a radiation damage resistance far greater than that of silicon.

Alexander, P.↗

NASA NTRS1977

Shock isolator for diode laser operation on a closed-cycle refrigerator

Closed-cycle helium refrigerators are widely used as coolers for semiconductor diode lasers. These refrigerators pose several difficulties including temperature oscillations due to varying refrigerator capacity during the Solvay cycle, and impact shocks delivered to the diode in the cycle's expansion phase. A shock isolator has been designed to isolate diode lasers from such impact shocks. Slow diode current scans have been made before installation of the shock isolator, with the isolator but no thermal damper, and with both devices. With the isolator and no damper, the diode output frequency oscillated at the refrigerator cycle rate, deviating by plus or minus 40 MHz. Using the isolator and the damper no frequency fluctuation was detected.

Jennings, D. E.↗

NASA NTRS1983

Growth, characterization, and properties of metastable and modulated semiconductor structures - Prospects for future studies

The general field of preparation and study of metastable and modulated semiconductor structures has progressed rapidly in recent years. This short overview offers an assessment of the progress and current understanding in the areas of fabrication, characterization, and utilization of these new material systems. The discussion includes the more prominent growth techniques, theoretical and experimental analysis of growth kinetics, and an overview of structural, chemical, electronic, and optical characterization. The probable application of these structures for the technological development of new device structures and concepts is considered. The discussion particularly emphasizes the prospects for future studies in view of the specific current understanding.

Grunthaner, F. J.↗

NASA NTRS1984

NSC 800, 8-bit CMOS microprocessor

The NSC 800 is an 8-bit CMOS microprocessor manufactured by National Semiconductor Corp., Santa Clara, California. The 8-bit microprocessor chip with 40-pad pin-terminals has eight address buffers (A8-A15), eight data address -- I/O buffers (AD(sub 0)-AD(sub 7)), six interrupt controls and sixteen timing controls with a chip clock generator and an 8-bit dynamic RAM refresh circuit. The 22 internal registers have the capability of addressing 64K bytes of memory and 256 I/O devices. The chip is fabricated on N-type (100) silicon using self-aligned polysilicon gates and local oxidation process technology. The chip interconnect consists of four levels: Aluminum, Polysi 2, Polysi 1, and P(+) and N(+) diffusions. The four levels, except for contact interface, are isolated by interlevel oxide. The chip is packaged in a 40-pin dual-in-line (DIP), side brazed, hermetically sealed, ceramic package with a metal lid. The operating voltage for the device is 5 V. It is available in three operating temperature ranges: 0 to +70 C, -40 to +85 C, and -55 to +125 C. Two devices were submitted for product evaluation by F. Stott, MTS, JPL Microprocessor Specialist. The devices were pencil-marked and photographed for identification.

Suszko, S. F.↗

NASA NTRS1999

Growth of Compound Semiconductors in a Low Gravity Environment: Microgravity Growth of PbSnTe

Fripp, Archibald L.↗

NASA NTRS1990

32 bit digital optical computer - A hardware update

Such state-of-the-art devices as multielement linear laser diode arrays, multichannel acoustooptic modulators, optical relays, and avalanche photodiode arrays, are presently applied to the implementation of a 32-bit supercomputer's general-purpose optical central processing architecture. Shannon's theorem, Morozov's control operator method (in conjunction with combinatorial arithmetic), and DeMorgan's law have been used to design an architecture whose 100 MHz clock renders it fully competitive with emerging planar-semiconductor technology. Attention is given to the architecture's multichannel Bragg cells, thermal design and RF crosstalk considerations, and the first and second anamorphic relay legs.

Guilfoyle, Peter S.↗

NASA NTRS1995

Optimization of GaN thin films via MOCVD

A unique characteristic of every semiconductor is the amount of energy required to break an electron bond in the lowest band of allowed states, the valence band. The energy necessary to set an electron free and allow it to conduct in the material is termed the energy gap (Eg). Semiconductors with wide bandgap energies have been shown to possess properties for high power, high temperature, radiation resistance damage, and short wavelength optoelectronic applications. Gallium nitride, which has a wide gap of 3.39 eV, is a material that has demonstrated these characteristics. Various growth conditions are being investigated for quality gallium nitride heteroepitaxy growth via the technique of low pressure metal organic chemical vapor deposition (MOCVD) that can be used for device development.

Dickens, Corey↗

NASA NTRS2000

Technical Challenges in Reliable Microelectronics Packaging of Microelectromechanical Systems (MEMS) for Space Applications

MEMS have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, chemical sensors, artificial nose, etc. Standard semiconductor microelectronics packaging needs the integrated circuits (IC) to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the reliable IC packaging technology. Active elements or microstructures in MEMS devices often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it measures to assure the packaging technology of MEMS. MEMS technology has a major application in developing a microspacecraft for space systems provided reliability of MEMS packaging technology is sufficiently addressed. This MEMS technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively. This paper discusses the latest developments in the MEMS technology and challenging technical issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices for microspacecraft applications.

Ramesham, Rajeshuni↗

NASA NTRS2011

Two-Axis Direct Fluid Shear Stress Sensor for Aerodynamic Applications

This miniature or micro-sized semiconductor sensor design provides direct, nonintrusive measurement of skin friction or wall shear stress in fluid flow situations in a two-axis configuration. The sensor is fabricated by microelectromechanical system (MEMS) technology, enabling small size and multiple, low-cost reproductions. The sensors may be fabricated by bonding a sensing element wafer to a fluid-coupling element wafer. Using this layered machine structure provides a truly three-dimensional device.

Bajikar, Sateesh S.↗

NASA NTRS2011

Performance of a 100V Half-Bridge MOSFET Driver, Type MIC4103, Over a Wide Temperature Range

The operation of a high frequency, high voltage MOSFET (metal-oxide semiconductor field-effect transistors) driver was investigated over a wide temperature regime that extended beyond its specified range. The Micrel MIC4103 is a 100V, non-inverting, dual driver that is designed to independently drive both high-side and low-side N-channel MOSFETs. It features fast propagation delay times and can drive 1000 pF load with 10ns rise times and 6 ns fall times [1]. The device consumes very little power, has supply under-voltage protection, and is rated for a -40 C to +125 C junction temperature range. The floating high-side driver of the chip can sustain boost voltages up to 100 V. Table I shows some of the device manufacturer s specification.

Patterson, Richard L.↗

NASA NTRS1994

Semiconductor-metal graded-index composite thin films for infrared applications

Theoretical/experimental studies have been carried out on germanium:silver (Ge:Ag) graded-index composite thin films which demonstrate that graded coatings, consisting of varied concentrations of Ag with respect to the Ge film thickness, exhibit different optical properties ranging from selective infrared (IR) reflectance to broadband IR absorptance. The graded coatings have been produced by dc magnetron cosputtering of Ge and Ag and the spectral properties are found to be stable against temperature. The coatings have been applied to an infrared tunnel sensor (micro-Golay cell) to improve the device performance.

Lamb, James L.↗

NASA NTRS1980

OM-VPE grown materials for high efficiency solar cells

Organometallic sources are available for all the III-V elements and a variety of dopants; thus it is possible to use the technique to grow a wide variety of semiconductor compounds. AlGaAsSb and AlGaInAs alloys for multijunction monolithic solar cells were grown by OM-VPE. While the effort concentrated on terrestrial applications, the success of OM-VPE grown GaAs/AlGaAs concentrator solar cells (23% at 400 suns) demonstrates that OM-VPE is suitable for growing high efficiency solar cells in large quantities for space applications. In addition, OM-VPE offers the potential for substantial cost reduction of photovoltaic devices with scale up and automation and due to high process yield from reproducible, uniform epitaxial growths with excellent surface morphology.

Saxena, R.↗