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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,171 records · Page 65
All sourcesNASA NTRSDOE OSTI
DOE OSTI2018

Model for Charge Accumulation in n- and p-MOS Transistors during Tunneling Electron Injection from a Gate

A quantitative model for charge accumulation in an undergate dielectric during tunneling electron injection from a gate according to the Fowler–Nordheim mechanism is developed. The model takes into account electron and hole capture at hydrogen-free and hydrogen-related traps as well as the generation of surface states during the interaction of holes with hydrogen-related centers. The experimental dependences of the threshold voltage shift and gate voltage shift of n- and p-channel MOS (metal–oxide–semiconductor) transistors on the injected charge in the constant current mode are analyzed based on the model.

36 MATERIALS SCIENCE↗
DOE OSTI2020

( Invited ) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests

Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. As a result, both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.

42 ENGINEERING↗
DOE OSTI2017

AlGaN/GaN High Electron Mobility Transistor Grown and Fabricated on ZrTi Metallic Alloy Buffer Layers

AlGaN/GaN high electron mobility transistors (HEMTs) were demonstrated for structures grown on ZrTi metallic alloy buffer layers, which provided lattice matching of the in-plane lattice parameter (“a-parameter”) to hexagonal GaN. The quality of the GaN buffer layer and HEMT structure were confirmed with X-ray 2θ and rocking scans as well as cross-section transmission electron microscopy (TEM) images. The X-ray 2θ scans showed full widths at half maximum (FWHM) of 0.06°, 0.05° and 0.08° for ZrTi alloy, GaN buffer layer, and the entire HEMT structure, respectively. TEM of the lower section of the HEMT structure containing the GaN buffer layer and the AlN/ZrTi/AlN stack on the Si substrate showed that it was important to grow AlN on the top of ZrTi prior to growing the GaN buffer layer. Finally, the estimated threading dislocation (TD) density in the GaN channel layer of the HEMT structure was in the 10 8 cm -2 range.

36 MATERIALS SCIENCE↗
DOE OSTI2017

Planar Ohmic Contacts to Al 0.45 Ga 0.55 N/Al 0.3 Ga 0.7 N High Electron Mobility Transistors

Here, we present a low resistance, straightforward planar ohmic contact for Al 0.45 Ga 0.55 N/Al 0.3 Ga 0.7 N high electron mobility transistors. Five metal stacks (a/Al/b/Au; a = Ti, Zr, V, Nb/Ti; b = Ni, Mo, V) were evaluated at three individual annealing temperatures (850, 900, and 950°C). The Ti/Al/Ni/Au achieved the lowest specific contact resistance at a 900°C anneal temperature. Transmission electron microscopy analysis revealed a metal-semiconductor interface of Ti-Al-Au for an ohmic (900°C anneal) and a Schottky (850°C anneal) Ti/Al/Ni/Au stack. HEMTs were fabricated using the optimized recipe with resulting contacts that had room-temperature specific contact resistances of ρ c = 2.5 × 10 -5 Ω cm², sheet resistances of R SH = 3.9 kΩ/$\blacksquare$, and maximum current densities of 75 mA/mm (at VGATE of 2 V). Electrical measurements from -50 to 200°C had decreasing specific contact resistance and increasing sheet resistance, with increasing temperature. These contacts enabled state-of-the-art performance of Al 0.45 Ga 0.55 N/Al 0.3 Ga 0.7 N HEMTs.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Defect-engineered GaN high electron mobility transistors for enhanced radiation tolerance

This study explores the radiation resilience of GaN high-electron-mobility transistors (HEMTs) under various preconditioning treatments—pristine, electro-pulsed, electrically overstressed, and 60 Co gamma-irradiated—with a focus on enhancing survivability in high-radiation environments. Key findings emphasize the gate region’s central role in radiation sensitivity, with increased defect concentrations leading to reduced sensitivity—as determined from reduced single-event transient intensities during pulsed-laser studies—and impacting charge-transport dynamics. Notably, the most sensitive region shifted as a function of bias state, with the drain side of the gate being most sensitive under negative gate bias and the source side under unbiased conditions due to two-dimensional electron gas disruptions. These insights clarify the mechanisms influencing radiation sensitivity in microelectronics and highlight the potential of defect and strain engineering to enhance the radiation hardness of GaN HEMTs across various operational states, providing valuable guidance for applications in space, defense, and other radiation-rich environments.

36 MATERIALS SCIENCE↗
DOE OSTI2013

Total dose and dose rate models for bipolar transistors in circuit simulation

The objective of this work is to develop a model for total dose effects in bipolar junction transistors for use in circuit simulation. The components of the model are an electrical model of device performance that includes the effects of trapped charge on device behavior, and a model that calculates the trapped charge densities in a specific device structure as a function of radiation dose and dose rate. Simulations based on this model are found to agree well with measurements on a number of devices for which data are available.

Campbell, Phillip Montgomery↗
DOE OSTI2015

Fabrication and Characterization of a Single Hole Transistor in p-type GaAs/AlGaAs Heterostructures

Most spin qubit research to date has focused on manipulating single electron spins in quantum dots. However, hole spins are predicted to have some advantages over electron spins, such as reduced coupling to host semiconductor nuclear spins and the ability to control hole spins electrically using the large spin-orbit interaction. Building on recent advances in fabricating high-mobility 2D hole systems in GaAs/AlGaAs heterostructures at Sandia, we fabricate and characterize single hole transistors in GaAs. We demonstrate p-type double quantum dot devices with few-hole occupation, which could be used to study the physics of individual hole spins and control over coupling between hole spins, looking towards eventual applications in quantum computing.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2018

Capacitance of a Ge/SiGe heterostructure field-effect transistor

In this project we studied undoped Ge/SiGe heterostructure field-effect transistors, which had a very wide hole density range from 1x10 10 cm -2 to 3.5x10 11 cm -2 tunable by (negative) gate voltage. At low temperatures reasonably high carriers mobility of about 3.4x10 5 cm 2 /Vs was achieved.

42 ENGINEERING↗
DOE OSTI2018

The Fault Detection, Localization, and Tolerant Operation of Modular Multilevel Converters with an Insulated Gate Bipolar Transistor (IGBT) Open Circuit Fault

Reliability is one of the critical issues for a modular multilevel converter (MMC) since it consists of a large number of series-connected power electronics submodules (SMs). Here in this paper, a complete control strategy including fault detection, localization, and tolerant operation is proposed for the MMC under an insulated gate bipolar transistor (IGBT) open circuit fault. According to the output characteristics of the SM with the open-circuit fault of IGBT, a fault detection method based on the circulating current and output current observation is used. In order to further precisely locate the position of the faulty SM, a fault localization method based on the SM capacitor voltage observation is developed. After the faulty SM is isolated, the continuous operation of the converter is ensured by adopting the fault-tolerant strategy based on the use of redundant modules. To verify the proposed fault detection, fault localization, and fault-tolerant operation strategies, a 900 kVA MMC system under the conditions of an IGBT open circuit is developed in the Matlab/Simulink platform. The capabilities of rapid detection, precise positioning, and fault-tolerant operation of the investigated detection and control algorithms are also demonstrated.

42 ENGINEERING↗
DOE OSTI2019

High-frequency, high-power performance of AlGaN-channel high-electron-mobility transistors: an RF simulation study [High-frequency high power performance of AlGaN channel HEMTs: an RF simulation study]

The emerging Al-rich AlGaN-channel Al x Ga 1–x N/Al y Ga 1–y N high-electron-mobility transistors (HEMTs) with 0.7 ≤ y < x ≤ 1.0 have the potential to greatly exceed the power handling capabilities of today's GaN HEMTs, possibly by five times. This projection is based on the expected 4× enhancement of the critical electric field, the 2× enhancement of sheet carrier density, and the parity of the electron saturation velocity for Al-rich AlGaN-channel HEMTs relative to GaN-channel HEMTs. In this paper, the expected increased RF power density in Al-rich AlGaN-channel HEMTs is calculated by theoretical analysis and computer simulations, based on existing data on long-channel AlGaN devices. It is shown that a saturated power density of 18 W mm –1 , a power-added efficiency of 55% and an output third-order intercept point over 40 dB can be achieved for this technology. Furthermore, the method for large-signal RF performance estimation presented in this paper is generic and can be applied to other novel high-power device technologies at the early stages of development.

42 ENGINEERING↗
NASA NTRS1964

Field-effect transistor improves electrometer amplifier

An electrometer amplifier uses a field effect transistor to measure currents of low amperage. The circuit, developed as an ac amplifier, is used with an external filter which limits bandwidth to achieve optimum noise performance.

Munoz, R.↗
NASA NTRS1964

Transistorized converter provides nondissipative regulation

A transistorized regulator converter efficiently converts fluctuating input voltages to a constant output voltage, avoiding the use of saturable reactors. It is nondissipative in operation and functions in an open loop through variable duty cycles.

Source record↗
NASA NTRS1964

Economical fabrication process produces high quality junction transistors

A convenient, three-step fabrication process, with a p-type layer of gallium arsenide vapor deposited on a starting wafer of germanium, is used to produce heterojunction-homojunction p-n-p transistors. These are of high quality with good injection efficiency and low capacitance.

Source record↗