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At least 1,135 records · Page 63

A dc to dc converter

The object of the invention is to provide an improved converter for converting one direct current voltage to another. A plurality of phased square wave voltages are provided from a ring counter through amplifiers to a like plurality of output transformers. Each of these transformers has two windings, and S(1) winding and an S(2) winding. The S(1) windings are connected in series, then the S(2) windings are connected in series, and finally, the two sets of windings are connected in series. One of six SCRs is connected between each two series connected windings to a positive output terminal and one of diodes is connected between each set of two windings of a zero output terminal. By virtue of this configuration, a quite high average direct current voltage is obtained, which varies between full voltage and two-thirds full voltage rather than from full voltage to zero. Further, its variation, ripple frequency, is reduced to one-sixth of that present in a single phase system. Application to raising battery voltage for an ion propulsion system is mentioned.

Willis, A. E.↗

Source circuit design considerations

The cost of several circuit configurations for large (5MW) array fields were investigated to assess the relative costs of high and low voltage configurations. Three source circuit NOC voltages were evaluated: 400V (ungrounded), 800V (+ or 400V center grounded), and 2000V (+ or - 1000V center grounded). Four source circuit configurations were considered for each of the three NOC voltages. The configurations correspond to source circuit currents of 15, 30, 45, and 60 amperes, respectively. Conceptual layouts for 5MW building blocks for each of the above configurations were developed. The designs were optimized to minimize BOS electrical and structural costs. Only the BOS electrical costs were evaluated. The designs were broken down into the following elements for cost: (1) basic source circuit intermodule wiring, bypass diodes and associated hardware, source circuit to J-Box wiring, etc; (2) J-Box blocking diodes, varistors, heat sinks, and housing; (3) disconnects source circuit disconnects, fuses, and housing; (4) bus cabling J-Box to PCU interface wiring, and trenching; (5) interface bus bar, group disconnects, and fuses; and (6) fault detection shunts, signal wire, electronics, and alarm. It is concluded that high voltage low current circuits are not economical, at higher currents high and low voltage circuit costs approach each other, high voltage circuits are not likely to offer near term advantage, and development work/manufacturer stimulation is needed to develop low cost high voltage hardware.

Noel, G. T.↗

A historical overview of the electrical power systems in the US manned and some US unmanned spacecraft

A historical overview of electrical power systems used in the U.S. manned spacecraft and some of the U.S. unmanned spacecraft is presented in this investigation. A time frame of approximately 25 years, the period for 1959 to 1984, is covered in this report. Results indicate that the nominal bus voltage was 28 volts dc in most spacecraft and all other voltage levels were derived from this voltage through such techniques as voltage inversion or rectification, or a combination. Most spacecraft used solar arrays for the main source of power except for those spacecraft that had a relatively short flight duration, or deep spaceprobes that were designed for very long flight duration. Fuel cells were used on Gemini, Apollo, and Space Shuttle (short duration flights) while radioisotope thermoelectric generators were employed on the Pioneer, Jupiter/Saturn, Viking Lander, and Voyager spacecraft (long duration flights). The main dc bus voltage was unregulated on the manned spacecraft with voltage regulation provided at the user loads. A combination of regulated, semiregulated, and unregulated buses were used on the unmanned spacecraft depending on the type of load. For example, scientific instruments were usually connected to regulated buses while fans, relays, etc. were energized from an unregulated bus. Different forms of voltage regulation, such as shunt, buck/boot, and pulse-width modulated regulators, were used. This report includes a comprehensive bibliography on spacecraft electrical power systems for the space programs investigated.

Maisel, J. E.↗

New quantum oscillations in current driven small junctions

The response of current-biased Josephson and normal tunnel junctions (JJs and NTJs) such as those fabricated by Voss and Webb (1981) is predicted from a quantum-mechanical description based on the observation that the response of a current-driven open system is equivalent to that of a closed system subject to an external time-dependent voltage bias. Phenomena expected include voltage oscillations with no dc voltage applied, inverse Shapiro steps of dc voltage in the presence of microwave radiation, voltage oscillation in a JJ and an NTJ coupled by a capacitance to a current-biased junction, JJ voltage oscillation frequency = I/e rather than I/2e, and different NTJ resistance than in the voltage-driven case. The effects require approximate experimental parameter values Ic = 15 nA, C = 1 fF, and T much less than 0.4 K for JJs and Ic = a few nA, C = 1 fF, and R = 3 kiloohms for 100-microV inverse Shapiro steps at 10 GHz in NTJs.

Ben-Jacob, E.↗

Design of power electronics for TVC and EMA systems

The EMA systems proposed for future space transportation applications are high power systems operating at voltages up to 270 Vdc and at current levels on the order of hundreds of amperes. The position of the actuator is controlled by modulating the flow of energy from the source to an electric motor with an inverter. Hard-switching of the semiconductor devices in the inverter results in considerable device switching stresses and losses and in the generation of substantial amounts of EMI. Both of these can be reduced by employing zero-voltage-switching (ZVS) techniques in the inverter. This project has focused on the development of a ZVS inverter for the Marshall Space Center EMA prototypes, which utilize brushless dc motors to convert electrical energy to mechanical energy. An inverter which permitted zero-voltage switching and a quasi-PWM operation was selected for study and implementation. A waveshaping circuit is added to the front of a standard three-phase inverter to achieve the desired switching properties. This circuit causes the input voltage of the three-phase inverter to ring to zero where it is clamped for a short period of time. During this zero-voltage period, any of the semiconductor switches in the three-phase inverter are switched on or off at zero voltage resulting in a reduction in switching losses and EMI. The operation of this waveshaping circuit and its interaction with the three-phase inverter are described. The different circuit modes were analyzed using equivalent circuits. Based on this analysis, design relationships were developed for calculating component values for the circuit elements in the waveshaping circuit. Waveforms of various voltages and currents in the waveshaping circuit were plotted and used to determine the ratings of the semiconductors in the waveshaping circuit. The implementation of this inverter are described. Block diagrams for the overall control system and the waveshaping circuit control are presented and discussed. The current control scheme employed in the controller is also described.

Nelms, R. Mark↗

Constant current loop impedance measuring system that is immune to the effects of parasitic impedances

A constant current loop measuring system is provided for measuring a characteristic of an environment. The system comprises a first impedance positionable in the environment, a second impedance coupled in series with said first impedance and a parasitic impedance electrically coupled to the first and second impedances. A current generating device, electrically coupled in series with the first and second impedances, provides a constant current through the first and second impedances to produce first and second voltages across the first and second impedances, respectively, and a parasitic voltage across the parasitic impedance. A high impedance voltage measuring device measures a voltage difference between the first and second voltages independent of the parasitic voltage to produce a characteristic voltage representative of the characteristic of the environment.

Anderson, Karl F.↗

Laboratory instrumentation and techniques for characterizing multi-junction solar cells for space applications

Multi-junction solar cells are attractive for space applications because they can be designed to convert a larger fraction of AMO into electrical power at a lower cost than single-junction cells. The performance of multi-junction cells is much more sensitive to the spectral irradiance of the illuminating source than single-junction cells. The design of high efficiency multi-junction cells for space applications requires matching the optoelectronic properties of the junctions to AMO spectral irradiance. Unlike single-junction cells, it is not possible to carry out quantum efficiency measurements using only a monochromatic probe beam and determining the cell short-circuit current assuming linearity of the quantum efficiency. Additionally, current-voltage characteristics can not be calculated from measurements under non-AMO light sources using spectral-correction methods. There are reports in the literature on characterizing the performance of multi junction cells by measuring and convoluting the quantum efficiency of each junction with the spectral irradiance; the technique is of limited value for the characterization of cell performance under AMO power-generating conditions. We report the results of research to develop instrumentation and techniques for characterizing multi junction solar cells for space . An integrated system is described which consists of a standard lamp, spectral radiometer, dual-source solar simulator, and personal computer based current-voltage and quantum efficiency equipment. The spectral radiometer is calibrated regularly using the tungsten-halogen standard lamp which has a calibration based on NIST scales. The solar simulator produces the light bias beam for current-voltage and cell quantum efficiency measurements. The calibrated spectral radiometer is used to 'fit' the spectral irradiance of the dual-source solar simulator to WRL AMO data. The quantum efficiency apparatus includes a monochromatic probe beam for measuring the absolute cell quantum efficiency at various voltage biases, including the voltage bias corresponding to the maximum-power point under AMO light bias. The details of the procedures to 'fit' the spectral irradiance to AMO will be discussed. An assessment of the role of the accuracy of the 'fit' of the spectral irradiance and probe beam intensity on measured cell characteristics will be presented. quantum efficiencies were measured with both spectral light bias and AMO light bias; the measurements show striking differences. Spectral irradiances were convoluted with cell quantum efficiencies to calculate cell currents as function of voltage. The calculated currents compare with measured currents at the 1% level. Measurements on a variety of multi-junction cells will be presented. The dependence of defects in junctions on cell quantum efficiencies measured under light and voltage bias conditions will be presented. Comments will be made on issues related to standards for calibration, and limitations of the instrumentation and techniques. Expeditious development of multi-junction solar cell technology for space presents challenges for cell characterization in the laboratory.

Woodyard, James R.↗

Next Generation of Hall Thrusters for Space Propulsion

During the previous year, grant activity research focused on demonstrating high thrust/power operation of Hall thrusters. Performance of a low power and a high power Hall thruster was experimentally investigated at discharge voltages from 100 to 150 volts. Discharge efficiencies dropped significantly as discharge voltage was decreased over this range. Reductions in discharge efficiency with decreasing discharge voltage were attributed to reductions in ionization efficiency and/or ion acceleration through a potential less that the applied discharge voltage relative to the performance of state-of-art Hall thrusters operating at discharge voltages of 300 Volts and above. The low power Hall thruster exhibited a more pronounced reduction in discharge efficiency with decreasing discharge voltage. This was attributed to increased electron leakage related to the axial distribution of the radial magnetic field. These data demonstrated that the thrust benefit of operating at discharge voltages below 130 Volts was offset by a corresponding decrease in discharge efficiency for a given input power. Additional activities included continued support of on-going Hall thruster propulsion research within the On-Board Propulsion Branch at NASA Glenn Research Center.

Keith, Theo G., Jr.↗

Silicon Carbide Diodes Characterization at High Temperature and Comparison With Silicon Devices

Commercially available silicon carbide (SiC) Schottky diodes from different manufacturers rated at 200, 300, 600, and 1200 V, were electrically tested and characterized as a function of temperature up to 300 C. Electrical tests included both steady state and dynamic tests. Steady state tests produced forward and reverse I-V characteristic curves. Transient tests evaluated the switching performance of the diodes in either a hard-switched DC to DC buck converter or a half-bridge boost converter. For evaluation and comparison purposes, the same tests were performed with current state-of-the-art ultra fast silicon (Si) pn-junction diodes of similar ratings and also a Si Schottky diode. The comparisons made were forward voltage drop at rated current, reverse current at rated voltage, and turn-off peak reverse recovery current and reverse recovery time. In addition, efficiency measurements were taken for the buck DC to DC converter using both the SiC Schottky diodes and the Si pn-junction diodes at different temperatures and frequencies. The test results showed that at high temperature, the forward voltage drop for SiC Schottky diodes is higher than the forward drop of the ultra fast Si pn-junction diodes. As the temperature increased, the forward voltage drop of the SiC Schottky increased while for the ultra fast Si pn-junction diodes, the forward voltage drop decreased as temperature increased. For the elevated temperature steady state reverse voltage tests, the SiC Schottky diodes showed low leakage current at their rated voltage. Likewise, for the transient tests, the SiC Schottky diodes displayed low reverse recovery currents over the range of temperatures tested. Conversely, the Si pn-junction diodes showed increasing peak reverse current values and reverse recovery times with increasing temperature. Efficiency measurements in the DC to DC buck converter showed the advantage of the SiC Schottky diodes over the ultra fast Si pn-junction diodes, especially at the higher temperatures and higher frequencies.

Lebron-Velilla, Ramon C.↗

Lithium-Ion Batteries Being Evaluated for Low-Earth-Orbit Applications

The performance characteristics and long-term cycle life of aerospace lithium-ion (Li-ion) batteries in low-Earth-orbit applications are being investigated. A statistically designed test using Li-ion cells from various manufacturers began in September 2004 to study the effects of temperature, end-of-charge voltage, and depth-of-discharge operating conditions on the cycle life and performance of these cells. Performance degradation with cycling is being evaluated, and performance characteristics and failure modes are being modeled statistically. As technology improvements are incorporated into aerospace Li-ion cells, these new designs can be added to the test to evaluate the effect of the design changes on performance and life. Cells from Lithion and Saft have achieved over 2000 cycles under 10 different test condition combinations and are being evaluated. Cells from Mine Safety Appliances (MSA) and modules made up of commercial-off-the-shelf 18650 Li-ion cells connected in series/parallel combinations are scheduled to be added in the summer of 2005. The test conditions include temperatures of 10, 20, and 30 C, end-of-charge voltages of 3.85, 3.95, and 4.05 V, and depth-of-discharges from 20 to 40 percent. The low-Earth-orbit regime consists of a 55 min charge, at a constant-current rate that is 110 percent of the current required to fully recharge the cells in 55 min until the charge voltage limit is reached, and then at a constant voltage for the remaining charge time. Cells are discharged for 35 min at the current required for their particular depth-of-discharge condition. Cells are being evaluated in four-cell series strings with charge voltage limits being applied to individual cells by the use of charge-control units designed and produced at the NASA Glenn Research Center. These charge-control units clamp the individual cell voltages as each cell reaches its end-of-charge voltage limit, and they bypass the excess current from that cell, while allowing the full current flow to the remaining cells in the pack. The goal of this evaluation is to identify conditions and cell designs for Li-ion technology that can achieve more than 30,000 low-Earth-orbit cycles. Testing is being performed at the Naval Surface Warfare Center, Crane Division, in Crane, Indiana.

McKissock, Barbara I.↗

Pairwise comparison device

Apparatus for comparing first and second sets of voltages having one-to-one correspondence, and providing an indication responsive to the magnitudes of the pairwise differences of the voltages; typically comprising a plurality of channel waveguides (11), each having a first electrode (12) on one side of the channel (11) and a second electrode (13) on the opposite side of the channel (11); contacts (14) and conductors (16) for connecting each voltage of the first set to the first electrode (12) of one waveguide (11); contacts (b 15) and conductors (17) for connecting each voltage of the second set to the second electrode (13) of the waveguide (11) to the first electrode (12) of which the corresponding voltage of the first set is connected; a coupling prism (18), a beam splitter (19), and a waveguide portion (20) for directing to the input end (21,22) of each waveguide (11) a substantially plane wave of coherent light (as indicated at 23,24,25) having predetermined relative intensity and phase; and a detector (51) and associated circuitry (52,58) responsive to the light emerging (as indicated at 26) from the output end (28,29) of the waveguides (11) (via a beam splitter 44 and a coupling prism 45) for providing an indication that is a function of the pairwise relative magnitudes of the first set of voltages and the second set of voltages.

Verber, Carl M.↗

Radiation tolerant back biased CMOS VLSI

A CMOS circuit formed in a semiconductor substrate having improved immunity to total ionizing dose radiation, improved immunity to radiation induced latch up, and improved immunity to a single event upset. The architecture of the present invention can be utilized with the n-well, p-well, or dual-well processes. For example, a preferred embodiment of the present invention is described relative to a p-well process wherein the p-well is formed in an n-type substrate. A network of NMOS transistors is formed in the p-well, and a network of PMOS transistors is formed in the n-type substrate. A contact is electrically coupled to the p-well region and is coupled to first means for independently controlling the voltage in the p-well region. Another contact is electrically coupled to the n-type substrate and is coupled to second means for independently controlling the voltage in the n-type substrate. By controlling the p-well voltage, the effective threshold voltages of the n-channel transistors both drawn and parasitic can be dynamically tuned. Likewise, by controlling the n-type substrate, the effective threshold voltages of the p-channel transistors both drawn and parasitic can also be dynamically tuned. Preferably, by optimizing the threshold voltages of the n-channel and p-channel transistors, the total ionizing dose radiation effect will be neutralized and lower supply voltages can be utilized for the circuit which would result in the circuit requiring less power.

Maki, Gary K.↗

Integral Battery Power Limiting Circuit for Intrinsically Safe Applications

A circuit topology has been designed to guarantee the output of intrinsically safe power for the operation of electrical devices in a hazardous environment. This design uses a MOSFET (metal oxide semiconductor field-effect transistor) as a switch to connect and disconnect power to a load. A test current is provided through a separate path to the load for monitoring by a comparator against a preset threshold level. The circuit is configured so that the test current will detect a fault in the load and open the switch before the main current can respond. The main current passes through the switch and then an inductor. When a fault occurs in the load, the current through the inductor cannot change immediately, but the voltage drops immediately to safe levels. The comparator detects this drop and opens the switch before the current in the inductor has a chance to respond. This circuit protects both the current and voltage from exceeding safe levels. Typically, this type of protection is accomplished by a fuse or a circuit breaker, but in order for a fuse or a circuit breaker to blow or trip, the current must exceed the safe levels momentarily, which may be just enough time to ignite anything in a hazardous environment. To prevent this from happening, a fuse is typically current-limited by the addition of the resistor to keep the current within safe levels while the fuse reacts. The use of a resistor is acceptable for non-battery applications where the wasted energy and voltage drop across the resistor can be tolerated. The use of the switch and inductor minimizes the wasted energy. For example, a circuit runs from a 3.6-V battery that must be current-limited to 200 mA. If the circuit normally draws 10 mA, then an 18-ohm resistor would drop 180 mV during normal operation, while a typical switch (0.02 ohm) and inductor (0.97 ohm) would only drop 9.9 mV. From a power standpoint, the current-limiting resistor protection circuit wastes about 18 times more power than the switch and the inductor configuration. In the fault condition, both the resistor and the inductor react immediately. The resistor reacts by allowing more current to flow and dropping the voltage. Initially, the inductor reacts by dropping the voltage, and then by not allowing the current to change. When the comparator detects the drop in voltage, it opens the switch, thus preventing any further current flow. The inductor alone is not sufficient protection, because after the voltage drop has settled, the inductor would then allow the current to change, in this example, the current would be 3.7 A. In the fault condition, the resistor is flowing 200 mA until the fuse blows (anywhere from 1 ms to 100 s), while the switch and inductor combination is flowing about 2 A test current while monitoring for the fault to be corrected. Finally, as an additional safety feature, the circuit can be configured to hold the switch opened until both the load and source are disconnected.

Burns, Bradley M.↗

Three-dimensional structural damage localization system and method using layered two-dimensional array of capacitance sensors

A system and method for detecting damage to a structure is provided. The system includes a voltage source and at least one capacitor formed as a layer within the structure and responsive to the voltage source. The system also includes at least one sensor responsive to the capacitor to sense a voltage of the capacitor. A controller responsive to the sensor determines if damage to the structure has occurred based on the variance of the voltage of the capacitor from a known reference value. A method for sensing damage to a structure involves providing a plurality of capacitors and a controller, and coupling the capacitors to at least one surface of the structure. A voltage of the capacitors is sensed using the controller, and the controller calculates a change in the voltage of the capacitors. The method can include signaling a display system if a change in the voltage occurs.

Curry, Mark A↗

Crane-Load Contact Sensor

An electronic instrument has been developed as a prototype of a portable crane-load contact sensor. Such a sensor could be helpful in an application in which the load rests on a base in a horizontal position determined by vertical alignment pins (see Figure 1). If the crane is not positioned to lift the load precisely vertically, then the load can be expected to swing once it has been lifted clear of the pins. If the load is especially heavy, large, and/or fragile, it could hurt workers and/or damage itself and nearby objects. By indicating whether the load remains in contact with the pins when it has been lifted a fraction of the length of the pins, the crane-load contact sensor helps the crane operator determine whether it is safe to lift the load clear of the pins: If there is contact, then the load is resting against the sides of the pins and, hence, it may not be safe to lift; if contact is occasionally broken, then the load is probably not resting against the pins, so it should be safe to lift. It is assumed that the load and base, or at least the pins and the surfaces of the alignment holes in the load, are electrically conductive, so the instrument can use electrical contact to indicate mechanical contact. However, DC resistance cannot be used as an indicator of contact for the following reasons: The load and the base are both electrically grounded through cables (the load is grounded through the lifting cable of the crane) to prevent discharge of static electricity. In other words, the DC resistance between the load and the pins is always low, as though they were always in direct contact. Therefore, instead of DC resistance, the instrument utilizes the AC electrical impedance between the pins and the load. The signal frequency used in the measurement is high enough (.1 MHz) that the impedance contributed by the cables and the electrical ground network of the building in which the crane and the base are situated is significantly greater than the contact impedance between the pins and the load. The instrument includes a signal generator and voltage-measuring circuitry, and is connected to the load and the base as shown in Figure 2. The output of the signal generator (typically having amplitude of the order of a volt) is applied to the load via a 50-resistor, and the voltage between the load and the pins is measured. When the load and the pins are not in contact, the impedance between them is relatively high, causing the measured voltage to exceed a threshold value. When the load and the pins are in contact, the impedance between them falls to a much lower value, causing the voltage to fall below the threshold value. The voltage-measuring circuitry turns on a red light-emitting diode (LED) to indicate the lower-voltage/ contact condition. Whenever the contact has been broken and the non-contact/higher-voltage condition has lasted for more than 2 ms, the voltage-measuring circuitry indicates this condition by blinking a green LED.

Youngquist, Robert↗

Positively Verifying Mating of Previously Unverifiable Flight Connectors

Current practice is to uniquely key the connectors, which, when mated, could not be verified by ground tests such as those used in explosive or non-explosive initiators and pyro valves. However, this practice does not assure 100-percent correct mating. This problem could be overcome by the following approach. Errors in mating of interchangeable connectors can result in degraded or failed space mission. Mating of all flight connectors considered not verifiable via ground tests can be verified electrically by the following approach. It requires two additional wires going through the connector of interest, a few resistors, and a voltage source. The test-point voltage V(sub tp) when the connector is not mated will be the same as the input voltage, which gets attenuated by the resistor R(sub 1) when the female (F) and male (M) connectors are mated correctly and properly. The voltage at the test point will be a function of R(sub 1) and R(sub 2). Monitoring of the test point could be done on ground support equipment (GSE) only, or it can be a telemetry point. For implementation on multiple connector pairs, a different value for R(sub 1) or R(sub 2) or both can be selected for each pair of connectors that would result in a unique test point voltage for each connector pair. Each test point voltage is unique, and correct test point voltage is read only when the correct pair is mated correctly together. Thus, this design approach can be used to verify positively the correct mating of the connector pairs. This design approach can be applied to any number of connectors on the flight vehicle.

Pandipati R. K. Chetty↗

Optimal Dynamic Sub-Threshold Technique for Extreme Low Power Consumption for VLSI

For miniaturization of electronics systems, power consumption plays a key role in the realm of constraints. Considering the very large scale integration (VLSI) design aspect, as transistor feature size is decreased to 50 nm and below, there is sizable increase in the number of transistors as more functional building blocks are embedded in the same chip. However, the consequent increase in power consumption (dynamic and leakage) will serve as a key constraint to inhibit the advantages of transistor feature size reduction. Power consumption can be reduced by minimizing the voltage supply (for dynamic power consumption) and/or increasing threshold voltage (V(sub th), for reducing leakage power). When the feature size of the transistor is reduced, supply voltage (V(sub dd)) and threshold voltage (V(sub th)) are also reduced accordingly; then, the leakage current becomes a bigger factor of the total power consumption. To maintain low power consumption, operation of electronics at sub-threshold levels can be a potentially strong contender; however, there are two obstacles to be faced: more leakage current per transistor will cause more leakage power consumption, and slow response time when the transistor is operated in weak inversion region. To enable low power consumption and yet obtain high performance, the CMOS (complementary metal oxide semiconductor) transistor as a basic element is viewed and controlled as a four-terminal device: source, drain, gate, and body, as differentiated from the traditional approach with three terminals: i.e., source and body, drain, and gate. This technique features multiple voltage sources to supply the dynamic control, and uses dynamic control to enable low-threshold voltage when the channel (N or P) is active, for speed response enhancement and high threshold voltage, and when the transistor channel (N or P) is inactive, to reduce the leakage current for low-leakage power consumption.

Duong, Tuan A.↗

Performance Test Results of the NASA-457M v2 Hall Thruster

Performance testing of a second generation, 50 kW-class Hall thruster labeled NASA-457M v2 was conducted at the NASA Glenn Research Center. This NASA-designed thruster is an excellent candidate for a solar electric propulsion system that supports human exploration missions. Thruster discharge power was varied from 5 to 50 kW over discharge voltage and current ranges of 200 to 500 V and 15 to 100 A, respectively. Anode efficiencies varied from 0.56 to 0.71. The peak efficiency was similar to that of other state-of-the-art high power Hall thrusters, but outperformed these thrusters at lower discharge voltages. The 0.05 to 0.18 higher anode efficiencies of this thruster compared to its predecessor were primarily due to which of two stable discharge modes the thruster was operated. One stable mode was at low magnetic field strengths, which produced high anode efficiencies, and the other at high magnetic fields where its predecessor was operated. Cathode keeper voltages were always within 2.1 to 6.2 V and cathode voltages were within 13 V of tank ground during high anode efficiency operation. However, during operation at high magnetic fields, cathode-to-ground voltage magnitudes increased dramatically, exceeding 30 V, due to the high axial magnetic field strengths in the immediate vicinity of the centrally-mounted cathode. The peak thrust was 2.3 N and this occurred at a total thruster input power of 50.0 kW at a 500 V discharge voltage. The thruster demonstrated a thrust-to-power range of 76.4 mN/kW at low power to 46.1 mN/kW at full power, and a specific impulse range of 1420 to 2740 s. For a discharge voltage of 300 V, where specific impulses would be about 2000 s, thrust efficiencies varied from 0.57 to 0.63.

Soulas, George C.↗