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At least 1,135 records · Page 63

Avoiding a maneuvering aircraft with TCAS

The present investigation was carried out in NASA's Man-Vehicle Systems Research Facility B 727 simulator because of the need for veridical aircraft response. Pilot performance was measured in testing TCAS II after an avoidance maneuver has been initiated. A proposed change to the system will cause the TCAS II to issue a subsequent maneuver. This maneuver may be an increase in climb or descent rate from 1500 to 2500 ft/min, or a change from a climb to a descent or a descent to a climb. Three questions were addressed: (1) can the pilot detect the change in the maneuver advisory, (2) can the pilot respond promptly and accurately to the new advisory, and (3) can the maneuver be performed in the normal operating envelope of the aircraft. The reaction times found in the study suggest that pilots are able to respond within the two seconds targeted by the TCAS logic. The pilot performance data were used to modify the TCAS II logic to reflect actual pilot performance. This will result in a safe and appropriate maneuver selection in the rare instance when the conflicting aircraft maneuvers, and by doing so invalidates the initial maneuver issued by the collision avoidance system.

Chappell, Sheryl L.↗

Analysis of faults in an N-version software experiment

The authors have conducted a large-scale experiment in N-version programming. A total of 27 versions of a program were prepared independently from the same specification at two universities. The results of executing the versions revealed that the versions were individually extremely reliable but that the number of input cases in which more than one failed was substantially more than would be expected if they were statistically independent. After the versions had been executed, the failures of each version were examined and the associated faults located. The analysis showed that in some cases the programmers made equivalent logical errors, indicating that some parts of the problem were simply more difficult than others. The authors also found cases in which apparently different logical errors yielded faults that caused statistically correlated failures, indicating that there are special cases in the input space that present difficulty in various parts of the solution. A formal model is presented to explain this phenomenon. It appears that minor differences in the software development environment would not have a major impact in reducing the incidence of faults that cause correlated failures.

Brilliant, Susan S.↗

A bit-serial VLSI array processing chip for image processing

An array processing chip integrating 128 bit-serial processing elements (PEs) on a single die is discussed. Each PE has a 16-function logic unit, a single-bit adder, a 32-b variable-length shift register, and 1 kb of local RAM. Logic in each PE provides the capability to mask PEs individually. A modified grid interconnection scheme allows each PE to communicate with each of its eight nearest neighbors. A 32-b bus is used to transfer data to and from the array in a single cycle. Instruction execution is pipelined, enabling all instructions to be executed in a single cycle. The 1-micron CMOS design contains over 1.1 x 10 to the 6th transistors on an 11.0 x 11.7-mm die.

Heaton, Robert↗

Preventing Aim At An Undesired Target

Electronic system controls changes in orientation of optical instrument. Slew-control system includes avoidance-control logic, which overrides slew-control error generator when line of sight of instrument comes within cone of avoidance around line of sight to Sun. Normal slewing trajectory interrupted by avoidance-control logic, which computes actuator torques taking line of sight around cone of avoidance. Used to protect delicate photodetectors in servocontrolled infrared spectrometer or imaging instrument against damage occurring if instrument aimed at Sun or another excessively bright object.

Goodzeit, Neil E.↗

Trinary Associative Memory Would Recognize Machine Parts

Trinary associative memory combines merits and overcomes major deficiencies of unipolar and bipolar logics by combining them in three-valued logic that reverts to unipolar or bipolar binary selectively, as needed to perform specific tasks. Advantage of associative memory: one obtains access to all parts of it simultaneously on basis of content, rather than address, of data. Consequently, used to exploit fully parallelism and speed of optical computing.

Liu, Hua-Kuang↗

Sign-And-Magnitude Up/Down Counter

Magnitude-and-sign counter includes conventional up/down counter for magnitude part and special additional circuitry for sign part. Negative numbers indicated more directly. Counter implemented by programming erasable programmable logic device (EPLD) or programmable logic array (PLA). Used in place of conventional up/down counter to provide sign and magnitude values directly to other circuits.

Cole, Steven W.↗

Digitized synchronous demodulator

A digitized synchronous demodulator is constructed entirely of digital components including timing logic, an accumulator, and means to digitally filter the digital output signal. Indirectly, it accepts, at its input, periodic analog signals which are converted to digital signals by traditional analog-to-digital conversion techniques. Broadly, the input digital signals are summed to one of two registers within an accumulator, based on the phase of the input signal and medicated by timing logic. At the end of a predetermined number of cycles of the inputted periodic signals, the contents of the register that accumulated samples from the negative half cycle is subtracted from the accumulated samples from the positive half cycle. The resulting difference is an accurate measurement of the narrow band amplitude of the periodic input signal during the measurement period. This measurement will not include error sources encountered in prior art synchronous demodulators using analog techniques such as offsets, charge injection errors, temperature drift, switching transients, settling time, analog to digital converter missing code, and linearity errors.

Woodhouse, Christopher E.↗

A demonstration of CMOS VLSI circuit prototyping in support of the site facility using the 1.2 micron standard cell library developed by National Security Agency

Two silicon CMOS application specific integrated circuits (ASICs), a data generation chip, and a data checker chip were designed. The conversion of the data generator circuitry into a pair of CMOS ASIC chips using the 1.2 micron standard cell library is documented. The logic design of the data checker is discussed. The functions of the control circuitry is described. An accurate estimate of timing relationships is essential to make sure that the logic design performs correctly under practical conditions. Timing and delay information are examined.

Smith, Edwyn D.↗

An area model for on-chip memories and its application

An area model suitable for comparing data buffers of different organizations and arbitrary sizes is described. The area model considers the supplied bandwidth of a memory cell and includes such buffer overhead as control logic, driver logic, and tag storage. The model gave less than 10 percent error when verified against real caches and register files. It is shown that, comparing caches and register files in terms of area for the same storage capacity, caches generally occupy more area per bit than register files for small caches because the overhead dominates the cache area at these sizes. For larger caches, the smaller storage cells in the cache provide a smaller total cache area per bit than the register set. Studying cache performance (traffic ratio) as a function of area, it is shown that, for small caches, direct-mapped caches perform significantly better than four-way set-associative caches and, for caches of medium areas, both direct-mapped and set-associative caches perform better than fully associative caches.

Mulder, Johannes M.↗

Aerospace plane guidance using time-scale decomposition - A geometric approach

A method is proposed for developing the necessary guidance logic to steer single-stage vehicles into orbit. The minimum-fuel ascent problem is first considered to analyze the effects of dynamic pressure, acceleration, and heating constraints on guidance systems to thereby develop the guidance logic. The optimal solution consists of behavior with two time scales, and the control law is used to develop near-optimal guidance. The solution uses the slow manifold to delineate the control for minimum-fuel reduced-order trajectory and a separate control for tracking the optimal reduced-order trajectory. A family of fast manifolds is then employed to resolve the tracking problem via the feedback linearization methodology from nonlinear geometric control theory. The two-time-scale decomposition is found to produce a near-optimal ascent by tracking the applicable state-constraint boundary, as well as to simplify the control-design task.

Van Buren, Mark A.↗

Approximate reasoning-based learning and control for proximity operations and docking in space

A recently proposed hybrid-neutral-network and fuzzy-logic-control architecture is applied to a fuzzy logic controller developed for attitude control of the Space Shuttle. A model using reinforcement learning and learning from past experience for fine-tuning its knowledge base is proposed. Two main components of this approximate reasoning-based intelligent control (ARIC) model - an action-state evaluation network and action selection network are described as well as the Space Shuttle attitude controller. An ARIC model for the controller is presented, and it is noted that the input layer in each network includes three nodes representing the angle error, angle error rate, and bias node. Preliminary results indicate that the controller can hold the pitch rate within its desired deadband and starts to use the jets at about 500 sec in the run.

Berenji, Hamid R.↗

Sequence-invariant state machines

A synthesis method and an MOS VLSI architecture are presented to realize sequential circuits that have the ability to implement any state machine having N states and m inputs, regardless of the actual sequence specified in the flow table. The design method utilizes binary tree structured (BTS) logic to implement regular and dense circuits. The desired state sequence can be hardwired with power supply connections or can be dynamically reallocated if stored in a register. This allows programmable VLSI controllers to be designed with a compact size and performance approaching that of dedicated logic. Results of ICV implementations are reported and an example sequence-invariant state machine is contrasted with implementations based on traditional methods.

Whitaker, Sterling R.↗

System Collects And Displays Demultiplexed Data

Electronic system collects, manipulates, and displays in real time results of manipulation of streams of data transmitted from remote scientific instrumentation. Interface circuit shifts data-and-clock signal from differential logic levels of multiplexer to single-ended logic levels of computer. System accommodates nonstandard data-transmission protocol. Software useful in applications where Macintosh computers used in real-time display and recording of data.

Reschke, Millard F.↗

Interface For Dual-Channel MIL-STD-1553 Data Bus

Digital electronic subsystem made of commercially available programmable logic arrays and discrete logic devices serves as interface between microprocessor and dual-channel MIL-STD-1553 data bus. Subsystem consumes only 800 mW of power. Provides flexibility in that it is controllable via firmware. Includes only two reading-and-writing ports: one for status and control signals, other for transmission and reception of data.

Davies, Bryan L.↗

Data-driven backward chaining

The C Language Integrated Production System (CLIPS) cannot effectively perform sound and complete logical inference in most real-world contexts. The problem facing CLIPS is its lack of goal generation. Without automatic goal generation and maintenance, forward chaining can only deduce all instances of a relationship. Backward chaining, which requires goal generation, allows deduction of only that subset of what is logically true which is also relevant to ongoing problem solving. Goal generation can be mimicked in simple cases using forward chaining. However, such mimicry requires manual coding of additional rules which can assert an inadequate goal representation for every condition in every rule that can have corresponding facts derived by backward chaining. In general, for N rules with an average of M conditions per rule the number of goal generation rules required is on the order of N*M. This is clearly intractable from a program maintenance perspective. We describe the support in Eclipse for backward chaining which it automatically asserts as it checks rule conditions. Important characteristics of this extension are that it does not assert goals which cannot match any rule conditions, that 2 equivalent goals are never asserted, and that goals persist as long as, but no longer than, they remain relevant.

Haley, Paul↗

Towards a mature measurement environment: Creating a software engineering research environment

Software engineering researchers are building tools, defining methods, and models; however, there are problems with the nature and style of the research. The research is typically bottom-up, done in isolation so the pieces cannot be easily logically or physically integrated. A great deal of the research is essentially the packaging of a particular piece of technology with little indication of how the work would be integrated with other prices of research. The research is not aimed at solving the real problems of software engineering, i.e., the development and maintenance of quality systems in a productive manner. The research results are not evaluated or analyzed via experimentation or refined and tailored to the application environment. Thus, it cannot be easily transferred into practice. Because of these limitations we have not been able to understand the components of the discipline as a coherent whole and the relationships between various models of the process and product. What is needed is a top down experimental, evolutionary framework in which research can be focused, logically and physically integrated to produce quality software productively, and evaluated and tailored to the application environment. This implies the need for experimentation, which in turn implies the need for a laboratory that is associated with the artifact we are studying. This laboratory can only exist in an environment where software is being built, i.e., as part of a real software development and maintenance organization. Thus, we propose that Software Engineering Laboratory (SEL) type activities exist in all organizations to support software engineering research. We describe the SEL from a researcher's point of view, and discuss the corporate and government benefits of the SEL. The discussion focuses on the benefits to the research community.

Basili, Victor R.↗

Space shuttle entry terminal area energy management

A historical account of the development for Shuttle's Terminal Area Energy Management (TAEM) is presented. A derivation and explanation of logic and equations are provided as a supplement to the well documented guidance computation requirements contained within the official Functional Subsystem Software Requirements (FSSR) published by Rockwell for NASA. The FSSR contains the full set of equations and logic, whereas this document addresses just certain areas for amplification.

Moore, Thomas E.↗

Flexible body control using neural networks

Progress is reported on the control of Control Structures Interaction suitcase demonstrator (a flexible structure) using neural networks and fuzzy logic. It is concluded that while control by neural nets alone (i.e., allowing the net to design a controller with no human intervention) has yielded less than optimal results, the neural net trained to emulate the existing fuzzy logic controller does produce acceptible system responses for the initial conditions examined. Also, a neural net was found to be very successful in performing the emulation step necessary for the anticipatory fuzzy controller for the CSI suitcase demonstrator. The fuzzy neural hybrid, which exhibits good robustness and noise rejection properties, shows promise as a controller for practical flexible systems, and should be further evaluated.

Mccullough, Claire L.↗