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At least 1,117 records · Page 62

A parallel variable metric optimization algorithm

An algorithm, designed to exploit the parallel computing or vector streaming (pipeline) capabilities of computers is presented. When p is the degree of parallelism, then one cycle of the parallel variable metric algorithm is defined as follows: first, the function and its gradient are computed in parallel at p different values of the independent variable; then the metric is modified by p rank-one corrections; and finally, a single univariant minimization is carried out in the Newton-like direction. Several properties of this algorithm are established. The convergence of the iterates to the solution is proved for a quadratic functional on a real separable Hilbert space. For a finite-dimensional space the convergence is in one cycle when p equals the dimension of the space. Results of numerical experiments indicate that the new algorithm will exploit parallel or pipeline computing capabilities to effect faster convergence than serial techniques.

Straeter, T. A.↗

Digital registration of ERTS-1 imagery

Two requirements for the registration of Earth Resources Technology Satellite (ERTS) data are discussed. These requirements are registration of ERTS data acquired on separate passes and registration of ERTS data to a ground reference. Performances of a semi-automatic warp algorithm and an automatic pipeline processing algorithm demonstrate that either procedure is useful, depending upon the user's requirements. In two cases where the time lapse between passes of the satellite were 90 days and 18 days the automatic pipeline processor reduced the mean radial registration error to 0.28 and 0.58 pixel, respectively. It is concluded that this technique is promissing for high-volume production processing.

Bonrud, L. O.↗

A preliminary systems-engineering study of an advanced nuclear-electrolytic hydrogen-production facility

An advanced nuclear-electrolytic hydrogen-production facility concept was synthesized at a conceptual level with the objective of minimizing estimated hydrogen-production costs. The concept is a closely-integrated, fully-dedicated (only hydrogen energy is produced) system whose components and subsystems are predicted on ''1985 technology.'' The principal components are: (1) a high-temperature gas-cooled reactor (HTGR) operating a helium-Brayton/ammonia-Rankine binary cycle with a helium reactor-core exit temperature of 980 C, (2) acyclic d-c generators, (3) high-pressure, high-current-density electrolyzers based on solid-polymer electrolyte technology. Based on an assumed 3,000 MWt HTGR the facility is capable of producing 8.7 million std cu m/day of hydrogen at pipeline conditions, 6,900 kPa. Coproduct oxygen is also available at pipeline conditions at one-half this volume. It has further been shown that the incorporation of advanced technology provides an overall efficiency of about 43 percent, as compared with 25 percent for a contemporary nuclear-electric plant powering close-coupled contemporary industrial electrolyzers.

Escher, W. J. D.↗

Adaptation of a program for nonlinear finite element analysis to the CDC STAR 100 computer

The conversion of a nonlinear finite element program to the CDC STAR 100 pipeline computer is discussed. The program called DYCAST was developed for the crash simulation of structures. Initial results with the STAR 100 computer indicated that significant gains in computation time are possible for operations on gloval arrays. However, for element level computations that do not lend themselves easily to long vector processing, the STAR 100 was slower than comparable scalar computers. On this basis it is concluded that in order for pipeline computers to impact the economic feasibility of large nonlinear analyses it is absolutely essential that algorithms be devised to improve the efficiency of element level computations.

Pifko, A. B.↗

Synthetic natural gas in California: When and why

A coal gasification plant planned for northwestern New Mexico to produce 250 MMCFD of pipeline quality gas (SNG) using the German Lurgi process is discussed. The SNG will be commingled with natural gas in existing pipelines for delivery to southern California and the Midwest. Cost of the plant is figured at more than $1.4 billion in January 1978 dollars with a current inflation rate of $255,000 for each day of delay. Plant start-up is now scheduled for 1984.

Wood, W. B.↗

Dedicated nuclear facilities for electrolytic hydrogen production

An advanced technology, fully dedicated nuclear-electrolytic hydrogen production facility is presented. This plant will produce hydrogen and oxygen only and no electrical power will be generated for off-plant use. The conceptual design was based on hydrogen production to fill a pipeline at 1000 psi and a 3000 MW nuclear base, and the base-line facility nuclear-to-shaftpower and shaftpower-to-electricity subsystems, the water treatment subsystem, electricity-to-hydrogen subsystem, hydrogen compression, efficiency, and hydrogen production cost are discussed. The final conceptual design integrates a 3000 MWth high-temperature gas-cooled reactor operating at 980 C helium reactor-out temperature, direct dc electricity generation via acyclic generators, and high-current density, high-pressure electrolyzers based on the solid polymer electrolyte approach. All subsystems are close-coupled and optimally interfaced and pipeline hydrogen is produced at 1000 psi. Hydrogen costs were about half of the conventional nuclear electrolysis process.

Foh, S. E.↗

Applications study of advanced power generation systems utilizing coal-derived fuels. Volume 1: Executive summary

The technology status of phosphoric acid and molten carbon fuel cells, combined gas and steam turbine cycles, and magnetohydrodynamic energy conversion systems was assessed and the power performance of these systems when operating with medium-Btu fuel gas whether delivered by pipeline to the power plant or in an integrated mode in which the coal gasification process and power system are closely coupled as an overall power plant was evaluated. Commercially available combined-cycle gas turbine systems can reach projected required performance levels for advanced systems using currently available technology. The phosphoric acid fuel cell appears to be the next most likely candidate for commercialization. On pipeline delivery, the systems efficiency ranges from 40.9% for the phosphoric acid fuel cell to 63% for the molten carbonate fuel cell system. The efficiencies of the integrated power plants vary from approximately 39-40% for the combined cycle to 46-47% for the molden carbonate fuel cell systems. Conventional coal-fired steam stations with flue-gas desulfurization have only 33-35% efficiency.

Robson, F. L.↗

Real time software tools and methodologies

Real time systems are characterized by high speed processing and throughput as well as asynchronous event processing requirements. These requirements give rise to particular implementations of parallel or pipeline multitasking structures, of intertask or interprocess communications mechanisms, and finally of message (buffer) routing or switching mechanisms. These mechanisms or structures, along with the data structue, describe the essential character of the system. These common structural elements and mechanisms are identified, their implementation in the form of routines, tasks or macros - in other words, tools are formalized. The tools developed support or make available the following: reentrant task creation, generalized message routing techniques, generalized task structures/task families, standardized intertask communications mechanisms, and pipeline and parallel processing architectures in a multitasking environment. Tools development raise some interesting prospects in the areas of software instrumentation and software portability. These issues are discussed following the description of the tools themselves.

Christofferson, M. J.↗

Control structures for high speed processors

A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

Maki, G. K.↗

VLSI architectures for computing multiplications and inverses in GF(2-m)

Finite field arithmetic logic is central in the implementation of Reed-Solomon coders and in some cryptographic algorithms. There is a need for good multiplication and inversion algorithms that are easily realized on VLSI chips. Massey and Omura recently developed a new multiplication algorithm for Galois fields based on a normal basis representation. A pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m). With the simple squaring property of the normal-basis representation used together with this multiplier, a pipeline architecture is also developed for computing inverse elements in GF(2m). The designs developed for the Massey-Omura multiplier and the computation of inverse elements are regular, simple, expandable and, therefore, naturally suitable for VLSI implementation.

Wang, C. C.↗

Fast Control Sequencer

Unit faster than conventional circuits and contains fewer integrated circuits. Fast logic controller accommodates three delays before second half cycle of clock signal strobes status latch: Outputs of pipeline register must settle; selected input status line signal must propagate through status multiplexer and arrive at status latch; and it takes 3 nanoseconds for status latch set up before strobed. During second half cycle, output-enable line produces next instruction and applies it to pipeline register.

Lahmeyer, C. R.↗

Applications of array processors in the analysis of remote sensing images

The architectures, programming characteristics, and ranges of application of past, present, and planned array processors for the digital processing of remote-sensing images are compared. Such functions as radiometric and geometric corrections, principal-components analysis, cluster coding, histogram generation, grey-level mapping, convolution, classification, and mensuration and modeling operations are considered, and both pipeline-type and single-instruction/multiple-data-stream (SIMD) arrays are evaluated. Numerical results are presented in a table, and it is found that the pipeline-type arrays normally used with minicomputers increase their speed significantly at low cost, while even further gains are provided by the more expensive SIMD arrays. Most image-processing operations become I/O-limited when SIMD arrays are used with current I/O devices.

Ramapriyan, H. K.↗

VLSI architectures for computing multiplications and inverses in GF(2m)

Finite field arithmetic logic is central in the implementation of Reed-Solomon coders and in some cryptographic algorithms. There is a need for good multiplication and inversion algorithms that are easily realized on VLSI chips. Massey and Omura recently developed a new multiplication algorithm for Galois fields based on a normal basis representation. A pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m). With the simple squaring property of the normal-basis representation used together with this multiplier, a pipeline architecture is also developed for computing inverse elements in GF(2m). The designs developed for the Massey-Omura multiplier and the computation of inverse elements are regular, simple, expandable and, therefore, naturally suitable for VLSI implementation.

Wang, C. C.↗

High speed quantitative digital microscopy

Modern digital image processing hardware makes possible quantitative analysis of microscope images at high speed. This paper describes an application to automatic screening for cervical cancer. The system uses twelve MC6809 microprocessors arranged in a pipeline multiprocessor configuration. Each processor executes one part of the algorithm on each cell image as it passes through the pipeline. Each processor communicates with its upstream and downstream neighbors via shared two-port memory. Thus no time is devoted to input-output operations as such. This configuration is expected to be at least ten times faster than previous systems.

Castleman, K. R.↗

Integrated-Circuit Active Digital Filter

Pipeline architecture with parallel multipliers and adders speeds calculation of weighted sums. Picture-element values and partial sums flow through delay-adder modules. After each cycle or time unit of calculation, each value in filter moves one position right. Digital integrated-circuit chips with pipeline architecture rapidly move 35 X 35 two-dimensional convolutions. Need for such circuits in image enhancement, data filtering, correlation, pattern extraction, and synthetic-aperture-radar image processing: all require repeated calculations of weighted sums of values from images or two-dimensional arrays of data.

Nathan, R.↗

Flow Injector Would Keep Slurry From Settling

Ring nozzle helps to prevent choking of coal-slurry pipelines. Intended originally for use in coal mines, nozzle concept generally applicable to short-haul slurry pipelines where high-pressure water (or other slurry fluid) available. Extra water injected into flow near wall of slurry pipe to keep slurry particles from setting and blocking pipe.

Lewis, E. V.↗

Evaluation of existing and proposed computer architectures for future ground-based systems

Parallel processing architectures and techniques used in current supercomputers are described and projections are made of future advances. Presently, the von Neumann sequential processing pattern has been accelerated by having separate I/O processors, interleaved memories, wide memories, independent functional units and pipelining. Recent supercomputers have featured single-input, multiple data stream architectures, which have different processors for performing various operations (vector or pipeline processors). Multiple input, multiple data stream machines have also been developed. Data flow techniques, wherein program instructions are activated only when data are available, are expected to play a large role in future supercomputers, along with increased parallel processor arrays. The enhanced operational speeds are essential for adequately treating data from future spacecraft remote sensing instruments such as the Thematic Mapper.

Schulbach, C.↗

Reed-Solomon decoder

A Reed-Solomon decoder with dedicated hardware for five sequential algorithms was designed with overall pipelining by memory swapping between input, processing and output memories, and internal pipelining through the five algorithms. The code definition used in decoding is specified by a keyword received with each block of data so that a number of different code formats may be decoded by the same hardware.

Lahmeyer, Charles R.↗