Estimation, Minimization, and Validation of Commutation Loop Inductance for a 135-kW SiC EV Traction Inverter
With growing interests in low inductance SiC based power module packaging, it is vital to focus on system level design aspects to facilitate easy integration of the modules and reap system level benefits. To effectively utilize the low inductance modules, busbar and interconnects should also be designed with low stray inductances. A wholistic investigation of the flux path and flux cancellations in the module-busbar assembly which as differentially coupled series inductors is thus mandatory for a system level design. This work presents a busbar design which can be adopted to effectively integrate the CREE’s low inductance 1.2 kV/1.7 kV SiC power modules. The paper also proposes a novel measurement technique to measure the inductance of the modulebusbar assembly as a whole rather than deducing it from individual components. The inductance of the overall commutation loop of the inverter which encompasses the SiC power module, interconnects and PCB busbar have been estimated using finite element analysis (FEA). Furthermore, insights gained from FEA provided the guidelines to decide on the placement of the decoupling capacitors in the busbar to minimize the overall commutation loop inductance from 12.8 nH to 7.4 nH which resulted in significant reduction in the device voltage overshoot. The simulation results have been validated through measurements using an impedance analyzer with less than 5% difference between extracted loop inductance from FEA and measurements. The bus bar design study and the measurement technique discussed in this paper, can be easily extended to other power module packages. Finally, the 135 kW inverter has been compared to a similar highpower inverter utilizing a laminated busbar to highlight the performance of the former.