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At least 1,099 records · Page 61

From Petascale to Exascale: Eight Focus Areas of R&D Challenges for HPC Simulation Environments

Programming models bridge the gap between the underlying hardware architecture and the supporting layers of software available to applications. Programming models are different from both programming languages and application programming interfaces (APIs). Specifically, a programming model is an abstraction of the underlying computer system that allows for the expression of both algorithms and data structures. In comparison, languages and APIs provide implementations of these abstractions and allow the algorithms and data structures to be put into practice - a programming model exists independently of the choice of both the programming language and the supporting APIs. Programming models are typically focused on achieving increased developer productivity, performance, and portability to other system designs. The rapidly changing nature of processor architectures and the complexity of designing an exascale platform provide significant challenges for these goals. Several other factors are likely to impact the design of future programming models. In particular, the representation and management of increasing levels of parallelism, concurrency and memory hierarchies, combined with the ability to maintain a progressive level of interoperability with today's applications are of significant concern. Overall the design of a programming model is inherently tied not only to the underlying hardware architecture, but also to the requirements of applications and libraries including data analysis, visualization, and uncertainty quantification. Furthermore, the successful implementation of a programming model is dependent on exposed features of the runtime software layers and features of the operating system. Successful use of a programming model also requires effective presentation to the software developer within the context of traditional and new software development tools. Consideration must also be given to the impact of programming models on both languages and the associated compiler infrastructure. Exascale programming models must reflect several, often competing, design goals. These design goals include desirable features such as abstraction and separation of concerns. However, some aspects are unique to large-scale computing. For example, interoperability and composability with existing implementations will prove critical. In particular, performance is the essential underlying goal for large-scale systems. A key evaluation metric for exascale models will be the extent to which they support these goals rather than merely enable them.

97 MATHEMATICS AND COMPUTING↗

Trilinos: Enabling Scientific Computing across Diverse Hardware Architectures at Scale

Trilinos is a community-developed, open-source software framework that facilitates building large-scale, complex, multiscale, multiphysics simulation code bases for scientific and engineering problems. Since the Trilinos framework has undergone substantial changes to support new applications and new hardware architectures, this document is an update to “An Overview of the Trilinos project” by Heroux et al. (ACM Transactions on Mathematical Software, 31(3):397–423, 2005). It describes the design of Trilinos, introduces its new organization in product areas, and highlights established and new features available in Trilinos. Particular focus is put on the modernized software stack based on the Kokkos ecosystem to deliver performance portability across heterogeneous hardware architectures. This article also outlines the organization of the Trilinos community and the contribution model to help onboard interested users and contributors.

Heterogeneous Hardware Architectures↗

Scientific data visualization software - Trends and directions

Scientific data visualization has finally come of age as an important and accepted discipline. While scientists have been using computer graphics to visualize experimental data and computational results for at least 30 years, recent improvements in cost/performance of graphics workstations, more readily available software, and a new-found identity based on the report "Visualization in Scientific Computing" (McCormick, DeFanti, and Brown, 1987) have solidified the discipline. The thesis here is that scientists are forced to work too hard to create these visualizations, but that the evolving set of visualization tools can greatly reduce the requisite effort. The architecture of a new class of software can lead to a more widespread availability of interactive visualization tools, which can make the process of creating a visualization as simple as doing interactive chart and graph layout.

Foley, James D.↗

Autonomous Navigation, Guidance, and Control Software in a Low SWaP Box

Onboard autonomy is a necessity for responsive space operations. Autonomous navigation, guidance, and control (NGC) enables space missions to reduce their dependence on high demand ground assets and costly ground personnel. It also allows for in-situ decision making and higher return on mission data. A flight software and hardware system providing this capability, called “autoNGC,” is currently being developed at NASA Goddard Space Flight Center for infusion into multiple future missions. The autoNGC flight software is built on the plug-and-play architecture of the core Flight System (cFS) consisting of the standard cFS apps and newly developed autoNGC interface apps and libraries. The various apps cooperate through communication over the message-based software bus. With the plug-and-play architecture of autoNGC, cFS apps can easily be added and replaced to meet the needs of different missions, even after launch. The first flight software release of autoNGC is targeted for Summer 2024 to provide autonomous navigation at the Moon and beyond. It can perform sensor fusion of multiple measurement types including pseudo-range from a Global Navigation Satellite System (GNSS) receiver (including weak signal), 1-way and 2-way range and Doppler from ground stations (i.e., direct to Earth (DTE)), bearing and range from optical camera images, and accelerometer data. Accurate onboard navigation and timing is obtained through the Goddard Enhanced Onboard Navigation System (GEONS) software library which fuses different measurement types through an extended Kalman filter (EKF) framework. Optical measurements that are ingested in GEONS are first extracted from optical images by the cFS Goddard Image Analysis and Navigation Tool (cGIANT) app. If the imaged body is far enough away that it appears as a pixel or cluster of pixels, then bearing angles to the body centroid can be provided. If the body is close enough and the shape is known coarsely, then bearing angles and range to the body centroid can be derived from the limb. Bearing angles to individual surface features can also be extracted (i.e., terrain relative navigation (TRN)). Onboard guidance and control capabilities are being developed for a future release to perform autonomous station-keeping and trajectory correction maneuvers in multiple orbital regimes. Capabilities to enable distributed systems missions and constellations, such as crosslink measurements, and onboard time management are being developed as well. The first hardware implementation of autoNGC is a minimal size, weight, and power (SWaP) design allowing for inclusion into CubeSats and SmallSat-size buses. Advancements in miniaturized space processors, such as the SpaceCube 3.0 Mini and the SpaceCube Mini-Z are utilized for low SWaP while maintaining a high level of performance. The current enclosure design is 12 cm x 17 cm x 13.5 cm. The box mass is expected to be less than 2 kg, and the nominal power is 21 W. In order to accommodate a wide range of missions, the hardware interfaces are designed for flexibility with a variety of sensor inputs. Through comprehensive testing in the software-in-the-loop, processor-in-the-loop, and hardware-in-the-loop test beds that are concurrently being developed, autoNGC is expected to achieve TRL 6 by late 2024.

Sun Hur-Diaz↗

System on chip module configured for event-driven architecture

A system on chip (SoC) module is described herein, wherein the SoC modules comprise a processor subsystem and a hardware logic subsystem. The processor subsystem and hardware logic subsystem are in communication with one another, and transmit event messages between one another. The processor subsystem executes software actors, while the hardware logic subsystem includes hardware actors, the software actors and hardware actors conform to an event-driven architecture, such that the software actors receive and generate event messages and the hardware actors receive and generate event messages.

97 MATHEMATICS AND COMPUTING↗

System on chip module configured for event-driven architecture

A system on chip (SoC) module is described herein, wherein the SoC modules comprise a processor subsystem and a hardware logic subsystem. The processor subsystem and hardware logic subsystem are in communication with one another, and transmit event messages between one another. The processor subsystem executes software actors, while the hardware logic subsystem includes hardware actors, the software actors and hardware actors conform to an event-driven architecture, such that the software actors receive and generate event messages and the hardware actors receive and generate event messages.

97 MATHEMATICS AND COMPUTING↗

ECP ST Project 2.3.1.06-STPM08-RAJA (Final Report)

Modern high-performance computing architectures are diverse, with hardware designs that feature multicore CPUs and CPUs plus accelerators, such as GPUs or FPGAs. Achieving good application performance often requires using a programming model and managing application data in ways that are best suited to a particular platform. For large codes that are used daily in production, and are under continual development, architecture-specific ports are untenable. Maintainability requires single-source code that is performance portable across a range of architectures and programming model back-ends. This report describes RAJA, Umpire, and CHAI, three software libraries that provide complementary capabilities to enable application portability for high performance computing (HPC) platforms. In particular, these libraries provide software abstractions that insulate application source code from hardware architecture and programming model-specific implementation details. These development of these libraries was motivated by the needs of multiphysics applications in the Weapons Simulation and Computing Program (WSC) at Lawrence Livermore National Laboratory (LLNL). Funding though the Exascale Computing Project (ECP) Software Technology (ST) project 2.3.1.06 RAJA has fostered outreach and collaboration with the ECP application and software technology development communities. In this report, we describe ECP adoption and integration of these tools to this point. The larger goal of the report is to describe to the ECP community what these projects offer, how they are used, and how to approach adoption and integration of them.

97 MATHEMATICS AND COMPUTING↗

A Prolog Emulator

This note describes an efficient software emulator for the Warren Abstract Machine (WAM) Prolog architecture. The version of the WAM implemented is called Lcode. The Lcode emulator, written in C, executes the 'naive reverse' benchmark at 3900 LIPS. The emulator is one of a set of tools used to measure the memory-referencing characteristics and performance of Prolog programs. These tools include a compiler, assembler, and memory simulators. An overview of the Lcode architecture is given here, followed by a description and listing of the emulator code implementing each Lcode instruction. This note will be of special interest to those studying the WAM and its performance characteristics. In general, this note will be of interest to those creating efficient software emulators for abstract machine architectures.

Tick, Evan↗

Advanced Control Architecture and Sensor Information Development for Process Automation, Optimization, and Imaging of Chemical Looping Systems

The Syngas Chemical Looping (SCL) process developed at The Ohio State University (OSU) uses an iron-based oxygen carrier to convert syngas into high-purity hydrogen while simultaneously capturing carbon dioxide that is readily sequestrable. A 25 kWth sub-pilot unit was successfully demonstrated multiple times on the OSU Clean Coal Research Facility, and a 250 kWth – 3 MWth pilot demonstration unit has been designed and constructed at the National Carbon Capture Center (NCCC) in Wilsonville, Alabama. The focus of this project is to develop multiple technologies to automate the startup and shutdown of chemical looping system. Success of this project will propel the advanced carbon capture method toward commercialization, hence be disruptive to the fossil fuel and power industries. Advanced process automation control architecture and imaging and optimization sensor software were developed for OSU chemical looping process. A high-level controller (HLC) consisting of decision-making and controller-selection logic integrated with sliding mode controllers (SMCs) were developed to perform chemical looping process startup and shutdown. Babcock & Wilcox Power Generation Group’s FocalPoint Optimization System was implemented to optimize the process operating conditions. The process automation controller and optimization information were realized and tested on OSU’s existing sub-pilot chemical looping test unit under atmospheric condition. The implemented control architecture was able to perform the complete process procedure from startup, steady-state reaction operation to shutdown with minimal operator intervention. The controller was also implemented on the pressurized syngas chemical looping (SCL) pilot test unit constructed at the National Carbon Capture Center (NCCC), demonstrating its pressure control capability with a designed transient state trajectory. An electrical capacitance volume tomography (ECVT) sensor device and its software were developed to image the packed moving bed and slugging fluidized bed of oxygen carriers in chemical looping systems at elevated temperatures. The ECVT device constructed was capable of tracking the subtle voidage variance along the moving bed axis as a feature for directly measuring the oxygen carrier particles’ linear velocity. Also, the high temperature ECVT device was used to study the fluidization characteristics of Geldart Group D particles.

08 HYDROGEN↗

Extreme Programming: Maestro Style

"Extreme Programming: Maestro Style" is the name of a computer programming methodology that has evolved as a custom version of a methodology, called extreme programming that has been practiced in the software industry since the late 1990s. The name of this version reflects its origin in the work of the Maestro team at NASA's Jet Propulsion Laboratory that develops software for Mars exploration missions. Extreme programming is oriented toward agile development of software resting on values of simplicity, communication, testing, and aggressiveness. Extreme programming involves use of methods of rapidly building and disseminating institutional knowledge among members of a computer-programming team to give all the members a shared view that matches the view of the customers for whom the software system is to be developed. Extreme programming includes frequent planning by programmers in collaboration with customers, continually examining and rewriting code in striving for the simplest workable software designs, a system metaphor (basically, an abstraction of the system that provides easy-to-remember software-naming conventions and insight into the architecture of the system), programmers working in pairs, adherence to a set of coding standards, collaboration of customers and programmers, frequent verbal communication, frequent releases of software in small increments of development, repeated testing of the developmental software by both programmers and customers, and continuous interaction between the team and the customers. The environment in which the Maestro team works requires the team to quickly adapt to changing needs of its customers. In addition, the team cannot afford to accept unnecessary development risk. Extreme programming enables the Maestro team to remain agile and provide high-quality software and service to its customers. However, several factors in the Maestro environment have made it necessary to modify some of the conventional extreme-programming practices. The single most influential of these factors is that continuous interaction between customers and programmers is not feasible.

Norris, Jeffrey↗

Efficient Implementation of Artificial Neural Networks for Sensor Data Analysis Based on a Genetic Algorithm

The reliability of many industrial processes depends on the sensor system. However, these sensors can be affected by noise, perturbations and failures. Hence, sensor monitoring and diagnosis are fundamental to guarantee the quality of an industrial process. Nowadays, artificial neural networks (ANN) are widely used in sensor signal processing and diagnosis. However, those ANNs usually require many artificial neurons, being difficult to implement in software and hardware due to their high computational costs. This paper presents an optimized implementation of artificial neurons in ANNs for sensor data analysis using a Genetic Algorithm (GA). The objective of GA is to find an adequate segmentation to reduce the activation function approximation error. One of the advantages of the proposed approach is that the cost function used in GA considers the effect of factors such as the ANN architecture or the number of bits used in arithmetic operations. The proposed ANN implementation technique aims to get the best possible approximation for a specific ANN architecture, making easier its implementation in software and hardware. Simulation and experimental results using FPGA (Field Programmable Gate Array) prove the advantages of the proposed approach for implementing sensor data analysis systems based on ANNs.

D estefani, André↗

Architecture-driven reuse of code in KASE

In order to support the synthesis of large, complex software systems, we need to focus on issues pertaining to the architectural design of a system in addition to algorithm and data structure design. An approach that is based on abstracting the architectural design of a set of problems in the form of a generic architecture, and providing tools that can be used to instantiate the generic architecture for specific problem instances is presented. Such an approach also facilitates reuse of code between different systems belonging to the same problem class. An application of our approach on a realistic problem is described; the results of the exercise are presented; and how our approach compares to other work in this area is discussed.

Bhansali, Sanjay↗

CAD/CAE Integration Enhanced by New CAD Services Standard

A Government-industry team led by the NASA Glenn Research Center has developed a computer interface standard for accessing data from computer-aided design (CAD) systems. The Object Management Group, an international computer standards organization, has adopted this CAD services standard. The new standard allows software (e.g., computer-aided engineering (CAE) and computer-aided manufacturing software to access multiple CAD systems through one programming interface. The interface is built on top of a distributed computing system called the Common Object Request Broker Architecture (CORBA). CORBA allows the CAD services software to operate in a distributed, heterogeneous computing environment.

Claus, Russell W.↗

An Evaluation of Molecular Dynamics Performance on the Hybrid Cray XK6 Supercomputer

For many years, the drive towards computational physics studies that match the size and time-scales of experiment has been fueled by increases in processor and interconnect performance that could be exploited with relatively little modification to existing codes. Engineering and electrical power constraints have disrupted this trend, requiring more drastic changes to both hardware and software solutions. Here, we present details of the Cray XK6 architecture that achieves increased performance with the use of GPU accelerators. We review software development efforts in the LAMMPS molecular dynamics package that have been implemented in order to utilize hybrid high performance computers. We present benchmark results for solid-state, biological, and mesoscopic systems and discuss some challenges for utilizing hybrid systems. We present some early work in improving application performance on the XK6 and performance results for the simulation of liquid copper nanostructures with the embedded atom method.

43 PARTICLE ACCELERATORS↗

Crew Health and Performance Integrated Data Architecture Project Updates

Future Human Exploration missions will face new constraints as crews move further from terrestrial communication, resupply, and the real-time support enjoyed by Low Earth Orbit missions today. Exploration crews will need to be more self-reliant and able to respond to emergencies without immediate support from ground-based personnel. A new generation of technologies, employing advanced analytical and predictive modeling techniques, is needed to assist the crew’s work, help maintain their health, and inform the decisions they make on these future Exploration missions. The Crew Health and Performance Integrated Data Architecture (CHP-IDA) project is laying a foundation for these future technologies by integrating sources of data generated by and around the crew and then providing them though common data models and Application Programming Interfaces to external systems. The combined data model makes comprehensive Crew Health and Performance data accessible and more meaningful to the decision-making process. This presentation will describe the currently ongoing effort to develop and evaluate a path-to-flight concept of the CHP-IDA software, current integrations, updates to the architecture, and examples of exploration scenarios in which CHP-IDA would be used.

B Schmitt↗

Parallel, Asynchronous Executive (PAX): System concepts, facilities, and architecture

The Parallel, Asynchronous Executive (PAX) is a software operating system simulation that allows many computers to work on a single problem at the same time. PAX is currently implemented on a UNIVAC 1100/42 computer system. Independent UNIVAC runstreams are used to simulate independent computers. Data are shared among independent UNIVAC runstreams through shared mass-storage files. PAX has achieved the following: (1) applied several computing processes simultaneously to a single, logically unified problem; (2) resolved most parallel processor conflicts by careful work assignment; (3) resolved by means of worker requests to PAX all conflicts not resolved by work assignment; (4) provided fault isolation and recovery mechanisms to meet the problems of an actual parallel, asynchronous processing machine. Additionally, one real-life problem has been constructed for the PAX environment. This is CASPER, a collection of aerodynamic and structural dynamic problem simulation routines. CASPER is not discussed in this report except to provide examples of parallel-processing techniques.

Jones, W. H.↗

Programming model for distributed intelligent systems

A programming model and architecture which was developed for the design and implementation of complex, heterogeneous measurement and control systems is described. The Multigraph Architecture integrates artificial intelligence techniques with conventional software technologies, offers a unified framework for distributed and shared memory based parallel computational models and supports multiple programming paradigms. The system can be implemented on different hardware architectures and can be adapted to strongly different applications.

Sztipanovits, J.↗

Computational Architecture For Control Of Remote Manipulator

Synchronization done by hardware to reduce software overhead. Computing resources located at both master-arm node and slave-arm node. This architecture provides for effective control while reducing computational burden on host computer and reducing and balancing load on communication channel.

Szakaly, Zoltan F.↗