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All sources NASA NTRS DOE OSTI

DOE OSTI2018

OpenMP 4.5 Validation and Verification Suite for Device Offload

OpenMP has been widely adopted for shared memory systems for over a decade. With the heterogeneity trend in architectures rapidly growing, the programming model needed to evolve such that applications could not only be ported to traditional CPUs but also to accelerators often acting as discrete or integrated devices to CPUs. To that end, OpenMP started to provide support for heterogeneous systems since 2013 when the version 4.0 of the specification was ratified. OpenMP 4.5 is being enhanced to cover major requirements of Exascale Computing Project (ECP) applications. As a result it is time-critical to ensure that the implementations of the 4.5 features are correct and conforming to the specification. This paper focuses on building a Validation and Verification testsuite that will test and present results for several offloading features implemented in compilers such as Clang, IBM XL C/C++, CCE, and GCC. We have results for our testsuite on TITAN, Summitdev and Summit at the Oak Ridge National Lab. We will highlight some of the ambiguities we encountered in the process of validating and verifying feature implementations. We also make the testsuite available for anyone to use and will walk the readers through the infrastructure and the workflow of the testsuite. A website has been built to capture our efforts narrated in this paper https://crpl.cis.udel.edu/ompvvsollve.

99 GENERAL AND MISCELLANEOUS↗

DOE OSTI2018

OpenMP 4.5 Validation and Verification Suite for Device Offload

Monsalve Diaz, Jose↗

DOE OSTI2012

Magnetism reflectometer study shows LiF layers improve efficiency in spin valve devices

New, more efficient materials for spin valves - a device used in magnetic sensors, random access memories, and hard disk drives - may be on the way based on research using the magnetism reflectometer at Oak Ridge National Laboratory (ORNL). Spin valve devices work by means of two or more conducting magnetic material layers that alternate their electrical resistance depending on the layers alignment. Giant magnetoresistance is a quantum mechanical effect first observed in thin film structures about 20 years ago. The effect is observed as a significant change in electrical resistance, depending on whether the magnetization of adjacent ferromagnetic layers is in a parallel or an antiparallel magnetic alignment. 'What we are doing here is developing new materials. The search for new materials suitable for injecting and transferring carriers with a preferential spin orientation is most important for the development of spintronics,' said Valeria Lauter, lead instrument scientist on the magnetism reflectometer at the Spallation Neutron Source (SNS), who collaborated on the experiment. The researchers discovered that the conductivity of such materials is improved when an organic polymer semiconductor layer is placed between the magnetic materials. Organic semiconductors are now the material of choice for future spin valve devices because they preserve spin coherence over longer times and distances than conventional semiconductors. While research into spin valves has been ongoing, research into organic semiconductors is recent. Previous research has shown that a 'conductivity mismatch' exists in spin valve systems in which ferromagnetic metal electrodes interface with such organic semiconductors as Alq3 ({pi}-conjugated molecule tris(8-hydroxy-quinoline) aluminium). This mismatch limits the efficient injection of the electrons from the electrodes at the interface with the semiconductor material. However, lithium fluoride (LiF), commonly used in light-emitting diodes, has been found to enhance the injection of electrons through the semiconductor. Researchers from the University of Alabama and ORNL used polarized neutrons at the magnetism reflectometer at SNS to investigate the electronic, magnetic, and structural properties of the electrodes in a novel system. In this system, the magnetic layers cobalt and Ni{sub 80}Fe{sub 20} are interfaced with spacer layers composed of the organic semiconductor Alq3. A coupling layer of LiF is inserted to separate the magnetized layers from the semiconductor. 'ALQ3 is an organic semiconductor material,' said Lauter. 'Normally in these systems a first magnetic layer is grown on a hard substrate so that one can get the controlled magnetic parameters. Then you grow the organic semiconductor layer, followed by another magnetic material layer, such as cobalt.' In addition to determining the effect of the LiF layers on the efficiency of the electron injection, the researchers wanted to determine the magnetic properties of the cobalt and Ni{sub 80}Fe{sub 20} as well as the interfacial properties: whether there is interdiffusion of cobalt through the LiF layer to the semiconductor, for example. The researchers used polarized neutrons at beam line 4A to probe the entire, layer-by-layer assembly of the system. 'Reflectometry with polarized neutrons is a perfect method to study thin magnetic films,' Lauter said. 'These thin films - if you put one on a substrate, you see it just like a mirror. However, this mirror has a very complicated internal multilayer structure. The neutrons look inside this complicated structure and characterize each and every interface. Due to the depth sensitivity of the method, we measure the structural and magnetic properties of each layer with the resolution of 0.5 nm. The neutron scattering results found that inserting LiF as a barrier significantly improves the quality of the interface, increasing the injection of electrons from the magnetic layer through the organic semiconductor in the spin valve and enhancing the overall properties of the system. In related work the magnetic properties of the cobalt film and the permalloy Ni{sub 80}Fe{sub 20} were characterized. Cobalt in particular needed attention, as it cannot be grown epitaxially (i.e., deposited) on an organic semiconductor film. Cobalt becomes polycrystalline or amorphous, and this affects its magnetic properties. The data from the first experiment showed that the cobalt layer in the system 'did not have typical magnetic properties,' Lauter said. 'The results showed that the cobalt had low magnetization. To improve the efficiency, the cobalt magnetization should be much higher. So this experiment helped us to improve the growth conditions and to get a cobalt layer with better magnetic properties.' In a subsequent experiment the researchers increased the magnetization of the cobalt, and a follow-up paper is in progress.

36 MATERIALS SCIENCE↗

NASA NTRS2018

Guideline for Single-Event Effect (SEE) Testing of System on a Chip (SOC) Devices

The use of complex single and multicore processors with significant cache memory, on-chip peripherals, memory controllers, and high speed input/output (IO) that integrate many of the parts of a traditional computer system is becoming more common in space applications. Such devices are often referred to as system on a chip devices (SOCs), even though the term is used somewhat inaccurately due to the lack of analog and mixed signal subcircuits. These devices are complex combinations of single- or multi-core processors with memory controllers, high-speed input/output (IO), and other peripheral structures that formerly would have been handled by off-chip resources. In the past the processors were tested for single event effects (SEE) separately, and the peripherals were often put into custom application-specific integrated circuits (ASICs) along with other resources required by the user. Performance and cost pressures have pushed commercial devices to incorporate many of the functional blocks into a single chip, an SOC. The NASA Electronic Parts and Packaging Program (NEPP) has been examining ways to perform SEE radiation hardness assurance (RHA) testing of these processor-centric SOCs to achieve reasonable understanding of their performance in space missions.

Guertin, Steven M.↗

DOE OSTI2016

Temperature induced complementary switching in titanium oxide resistive random access memory

On the way towards high memory density and computer performance, a considerable development in energy efficiency represents the foremost aspiration in future information technology. Complementary resistive switch consists of two antiserial resistive switching memory (RRAM) elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption. Here we present a titanium oxide based complementary RRAM (CRRAM) device with Pt top and TiN bottom electrode. A subsequent post metal annealing at 400°C induces CRRAM. Forming voltage of 4.3 V is required for this device to initiate switching process. The same device also exhibiting bipolar switching at lower compliance current, Ic <50 μA. The CRRAM device have high reliabilities. Formation of intermediate titanium oxi-nitride layer is confirmed from the cross-sectional HRTEM analysis. The origin of complementary switching mechanism have been discussed with AES, HRTEM analysis and schematic diagram. This paper provides valuable data along with analysis on the origin of CRRAM for the application in nanoscale devices.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

NASA NTRS2008

Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

LaBel, Kenneth A.↗

NASA NTRS1980

A spacecraft mass memory design using self-structured magnetic bubbles

A self-structured multilayered bubble device developed for spacecraft sensor systems is described. The data link buffer mass memory is analyzed, and system characteristics are estimated based on a nominal 1.6 micron bubble diameter. It is shown that a memory of at least 10 billion bits capacity and 30 megabits per second could be developed with conventional spacecraft constraints.

Stermer, R. L., Jr.↗

DOE OSTI2018

Silicon compatible Sn-based resistive switching memory

Large banks of cheap, fast, non-volatile, energy efficient, scalable solid-state memories are an increasingly essential component for today's data intensive computing. Conductive-bridge random access memory (CBRAM) – which involves voltage driven formation and dissolution of Cu or Ag filaments in a Cu (or Ag) anode/dielectric (HfO 2 or Al 2 O 3 )/inert cathode device – possesses the necessary attributes to fit the requirements. Cu and Ag are, however, fast diffusers and known contaminants in silicon microelectronics. In this paper, employing a criterion for electrode metal selection applicable to cationic filamentary devices and using first principles calculations for estimating diffusion barriers in HfO 2 , we identify tin (Sn) as a rational, silicon CMOS compatible replacement for Cu and Ag anodes in CBRAM devices. We then experimentally fabricate Sn based CBRAM devices and demonstrate very fast, steep-slope memory switching as well as threshold switching, comparable to Cu or Ag based devices. Furthermore, time evolution of the cationic filament formation along with the switching mechanism is discussed based on time domain measurements (I vs. t) carried out under constant voltage stress. Finally, the time to threshold is shown to be a function of both the voltage stress (V stress ) as well as the initial leakage current (I 0 ) through the device.

42 ENGINEERING↗

DOE OSTI2019

Freestanding Oxide Ferroelectric Tunnel Junction Memories Transferred onto Silicon

Crystalline oxide ferroelectric tunnel junctions allow persistent encoding of information in electric polarization, featuring nondestructive readout and scalability that can exceed current commercial high-speed, nonvolatile ferroelectric memories. Yet, the well-established fabrication of epitaxial devices on oxide substrates is difficult to adapt to silicon substrates for integration into complementary metal-oxide-semiconductor electronics. In this work, we report ferroelectric tunnel junctions based on 2.8 nm-thick BaTiO 3 films grown epitaxially on SrTiO 3 growth substrates, released, and relaminated onto silicon. The performance of the transferred devices is comparable to devices characterized on the oxide substrate, suggesting a viable route toward next-generation nonvolatile memories broadly integrable with different materials platforms.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2013

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the the gap region between the first electical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

47 OTHER INSTRUMENTATION↗

DOE OSTI2015

Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the gap region between the first electrical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2016

Oxygen-modulated quantum conductance for ultrathin HfO 2 -based memristive switching devices

Memristive switching devices, candidates for resistive random access memory technology, have been shown to switch off through a progression of states with quantized conductance and subsequent noninteger conductance (in terms of conductance quantum G 0 ). We have performed calculations based on density functional theory to model the switching process for a Pt-HfO 2 -Pt structure, involving the movement of one or two oxygen atoms. Oxygen atoms moving within a conductive oxygen vacancy filament act as tunneling barriers, and partition the filament into weakly coupled quantum wells. We show that the low-bias conductance decreases exponentially when one oxygen atom moves away from interface. In conclusion, our results demonstrate the high sensitivity of the device conductance to the position of oxygen atoms.

47 OTHER INSTRUMENTATION↗

DOE OSTI2019

Manipulating topological transformations of polar structures through real-time observation of the dynamic polarization evolution

Topological structures based on controllable ferroelectric or ferromagnetic domain configurations offer the opportunity to develop microelectronic devices such as high-density memories. Despite the increasing experimental and theoretical insights into various domain structures (such as polar spirals, polar wave, polar vortex) over the past decade, manipulating the topological transformations of polar structures and comprehensively understanding its underlying mechanism remains lacking. By conducting an in-situ non-contact bias technique, here we systematically investigate the real-time topological transformations of polar structures in PbTiO 3 /SrTiO 3 multilayers at an atomic level. The procedure of vortex pair splitting and the transformation from polar vortex to polar wave and out-of-plane polarization are observed step by step. Furthermore, the redistribution of charge in various topological structures has been demonstrated under an external bias. This provides new insights for the symbiosis of polar and charge and offers an opportunity for a new generation of microelectronic devices.

Science & Technology - Other Topics↗

DOE OSTI2011

Preface to ISIF 2009 special issue of Journal of Applied Physics : science and technology of integrated functionalities.

The science and technology of ferroelectric thin films and their applications have attracted many researchers and experienced tremendous progress in the past 20 years. The recent worldwide increase in commercial applications of ferroelectric devices such as smart cards based on nonvolatile ferroelectric random access memories is a symbol of both the maturity and the acceptance of the technology. The 21st International Symposium on Integrated Ferroelectrics (ISIF 2009), held on September 22 to October 2, 2009 in Colorado Springs, CO, provided a forum for the academic and national laboratories research community and industry to present and share their new findings, achievements, and opinions on integrated ferroelectrics and their applications. The International Symposium on Integrated Ferroelectrics hosted the ISIF 2009. This was the first year where the ISIF held the conference in its new format under the name of International Symposium on Integrated Functionalities. The General Chairs of the ISIF in consultation with the Advisory Board and the ISIF community decided to revise the focus of the conference in order to broaden the scope to the science and technology of multifunctional materials and devices. This decision was taken in view that a new paradigm in materials, materials integration, and devices is emerging with a view to the development of a new generation of micro- and nanoscale multifunctional devices. The program included three plenary presentations on diverse topics such as 'The Role of Nonvolatile Memory in Ubiquitous Computing,' 'Ferroelectrics and High Density Memory Technology,' 'Nanoscale Ferroelectrics and Interfaces: Size Effects,' four tutorial lectures on diverse topics, such as 'Magnetic Memory Applications,' 'Ferroelectrics and Ferroelectric Devices,' 'Challenges for High-K Dielectrics on High Mobility Channels,' 'Solar Cell Materials,' one poster session, and eight oral sessions. Thanks to the great efforts made by the ISIF organization committee and the session chairs, the conference successfully achieved its objectives and the work presented reflected very well the most recent advances of integrated ferroelectrics and their applications, as well as advances in other areas related to the new theme of Integrated Functionalities. Many aspects of ferroelectric, piezoelectric, high-K dielectric, magnetic, and phase change materials, including the science and technology of these materials in thin film form, integration with other thin film materials (metals or oxide electrodes), and fabrication of micro- and nanostructures based on these heterostructure layers, and device architecture and physics, were addressed from the experimental point of view. Work on theory and computer simulations of the mentioned materials and devices were discussed also with a view to the promising applications to multifunctional devices. In addition, the ISIF 2009 featured discussions of alternative nonvolatile memory concepts and materials, such as phase change memories, research on multiferroics and magnetoelectric materials, ferroelectric photovoltaics, and new directions on the science of perovskites such as biomolecular/polarizable interfaces, and bio-ferroelectric and other oxide interfaces. Following the standard submission and peer review process of Journal of Applied Physics, the selected papers presented in ISIF 2009 in Colorado Springs are published in this special issue. We believe that the papers in this special issue represent the forefront contributions to ISIF 2009 in the various areas of fundamental and applied science of integrated ferroelectrics and functionalities and their applications. We would like to take this opportunity to thank the following organizations and companies for their support and sponsorship for ISIF 2009, namely: Aixact Systems GMBH, Radiant Technologies, Symetrix Corporation, and Taylor and Francis Publishers. We would also like to thank the conference and session chairs, advisory and organizing committee members for their hard work that resulted in a very successful ISIF 2009, now in its new future-looking modality of Integrated Functionalities.

36 MATERIALS SCIENCE↗

NASA NTRS1993

SEU/SRAM as a Process Monitor

The SEU/SRAM is a 4-kbit Static Random Access Memory (SRAM) designed to detect Single-Event Upsets (SEUs) produced by high energy particles. This device was used to determine the distribution in the memory cell spontaneous flip potential.

distribution residual plots↗

NASA NTRS2010

NASA Electronic Parts and Packaging (NEPP) Program - Update

This slide presentation reviews the goals and mission of the NASA Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission assurance needs. The program has been supporting NASA for over 20 years. The focus is on the reliability aspects of electronic devices. In this work the program also supports the electronics industry. There are several areas that the program is involved in: Memories, systems on a chip (SOCs), data conversion devices, power MOSFETS, power converters, scaled CMOS, capacitors, linear devices, fiber optics, and other electronics such as sensors, cryogenic and SiGe that are used in space systems. Each of these area are reviewed with the work that is being done in reliability and effects of radiation on these technologies.

LaBel, Kenneth A.↗

DOE OSTI2017

Benchmarking and Evaluating Unified Memory for OpenMP GPU Offloading

Here, the latest OpenMP standard offers automatic device offloading capabilities which facilitate GPU programming. Despite this, there remain many challenges. One of these is the unified memory feature introduced in recent GPUs. GPUs in current and future HPC systems have enhanced support for unified memory space. In such systems, CPU and GPU can access each other's memory transparently, that is, the data movement is managed automatically by the underlying system software and hardware. Memory over subscription is also possible in these systems. However, there is a significant lack of knowledge about how this mechanism will perform, and how programmers should use it. We have modified several benchmarks codes, in the Rodinia benchmark suite, to study the behavior of OpenMP accelerator extensions and have used them to explore the impact of unified memory in an OpenMP context. We moreover modified the open source LLVM compiler to allow OpenMP programs to exploit unified memory. The results of our evaluation reveal that, while the performance of unified memory is comparable with that of normal GPU offloading for benchmarks with little data reuse, it suffers from significant overhead when GPU memory is over subcribed for benchmarks with large amount of data reuse. Based on these results, we provide several guidelines for programmers to achieve better performance with unified memory.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2018

On the Mechanisms of Formation of Memory Channels and Development of Negative Differential Resistance in Solid Solutions of the ТlInТe{sup 2}–ТlYbТe{sup 2} System

The behavior of an electronic subsystem is investigated in the course of formation and development of a memory channel in solid solutions of the TlInTe2–TlYbTe2 system. An analysis of the current-voltage characteristics allows getting an insight into the reason for a sharp change in electrical conductance of the specimens under study during their transition from the high-resistance to high-conductance state and the reasons for the well known instability of threshold converters, which makes it possible to design devices with high threshold voltage stability.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗