Design and development of a multi-layer memory system Final report, 28 Jan. 1966 - 27 Jan. 1967
Design and development of multilayer memory system
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Design and development of multilayer memory system
Properties of irradiated polyethylene memory materials
Integrated, metal oxide semiconductor memories with nonvolatile and electrically programmable characteristics
MOSFET drivers for low current memory fabricated in 64 unit monolithic strips, discussing driver performance data
Delayed response in threshold switching from reset state in ferrite memory cores consisting of magnesium compounds
Reliable information storage in memories designed from unreliable components
Limited memory optimal filter theory, output and standard filter divergence due to errors
FET memory element charge storage two layer model for thin film dielectrics noting charge/discharge times
Time logarithmic switching to explain anomalous delay in threshold response of MgMnZn ferrite memory cores
Integrated nonvolatile read-write memory with addressing using variable threshold field effect transistor including cell operation, channel shielding and circuit
Mechanical properties associated with 55-Nitinol memory effect, presenting stress-strain and electrical resistivity as function of temperature
Computer memory reduction through Fortran higher level language, discussing tradeoff between costs saved and additional logic hardware
Electron spin memory in optical pumping cycle of potassium halides F centers, measuring relaxed excited state g factors and spin resonance line widths
Potassium chloride crystal color centers as photochromic memory device in computer systems
Magnetization reversal in thin films of plated wire memory elements
Analysis of limited memory estimators and applicability to spacecraft attitude determination
Design, development, construction, and testing of qualification model for random access memory system for OAO program
Computer design language description of memory buffer organization