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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS1999

Study of Bulk and Elementary Screw Dislocation Assisted Reverse Breakdown in Low-Voltage (<250 V) 4H-SiC p+n Junction Diodes - Part 1: DC Properties

Given the high density (approx. 10(exp 4)/sq cm) of elementary screw dislocations (Burgers vector = lc with no hollow core) in commercial SiC wafers and epilayers, all appreciable current (greater than 1 A) SiC power devices will likely contain elementary screw dislocations for the foreseeable future. It is therefore important to ascertain the electrical impact of these defects, particularly in high-field vertical power device topologies where SiC is expected to enable large performance improvements in solid-state high-power systems. This paper compares the DC-measured reverse-breakdown characteristics of low-voltage (less than 250 V) small-area (less than 5 x 10(exp -4) sq cm) 4H-SiC p(+)n diodes with and without elementary screw dislocations. Compared to screw dislocation-free devices, diodes containing elementary screw dislocations exhibited higher pre-breakdown reverse leakage currents, softer reverse breakdown I-V knees, and highly localized microplasmic breakdown current filaments. The observed localized 4H-SiC breakdown parallels microplasmic breakdowns observed in silicon and other semiconductors, in which space-charge effects limit current conduction through the local microplasma as reverse bias is increased.

Neudeck, Philip G.↗
NASA NTRS2000

Inception of Snapover and Gas Induced Glow Discharges

Ground based experiments of the snapover phenomenon were conducted in the large vertical simulation chamber at the Glenn Research Center (GRC) Plasma Interaction Facility (PIF). Two Penning sources provided both argon and xenon plasmas for the experiments. The sources were used to simulate a variety of ionospheric densities pertaining to a spacecraft in a Low Earth Orbital (LEO) environment. Secondary electron emission is believed responsible for dielectric surface charging, and all subsequent snapover phenomena observed. Voltage sweeps of conductor potentials versus collected current were recorded in order to examine the specific charging history of each sample. The average time constant for sample charging was estimated between 25 and 50 seconds for all samples. It appears that current drops off by approximately a factor of 3 over the charging time of the sample. All samples charged in the forward and reverse bias directions, demonstrated hysteresis. Current jumps were only observed in the forward or positive swept voltage direction. There is large dispersion in tile critical snapover potential when repeating sweeps on any one sample. The current ratio for the first snapover region jumps between 2 and 4.6 times, with a standard deviation less than 1.6. Two of the samples showed even larger current ratios. It is believed the second large snapover region is due to sample outgassing. Under certain preset conditions, namely at the higher neutral gas background pressures, a perceptible blue-green glow was observed around the conductor. The glow is believed to be a result of secondary electrons undergoing collisions with an expelled tenuous cloud of gas, that is outgassed from the sample. Spectroscopic measurements of the glow discharge were made in an attempt to identify specific lines contributing to the observed glow.

Galofaro, J. T.↗
NASA NTRS1994

Effects of Plasma Hydrogenation on Trapping Properties of Dislocations in Heteroepitaxial InP/GaAs

In previous work, we have demonstrated the effectiveness of a post-growth hydrogen plasma treatment for passivating the electrical activity of dislocations in metalorganic chemical vapor deposition (MOCVD) grown InP on GaAs substrates by a more than two order of magnitude reduction in deep level concentration and an improvement in reverse bias leakage current by a factor of approx. 20. These results make plasma hydrogenation an extremely promising technique for achieving high efficiency large area and light weight heteroepitaxial InP solar cells for space applications. In this work we investigate the carrier trapping process by dislocations in heteroepitaxial InP/GaAs and the role of hydrogen passivation on this process. It is shown that the charge trapping kinetics of dislocations after hydrogen passivation are significantly altered, approaching point defect-like behavior consistent with a transformation from a high concentration of dislocation-related defect bands within the InP bandgap to a low concentration of individual deep levels after hydrogen passivation. It is further shown that the "apparent" activation energies of dislocation related deep levels, before and after passivation, reduce by approx. 70 meV as DLTS fill pulse times are increased from 1 usec. to 1 msec. A model is proposed which explains these effects based on a reduction of Coulombic interaction between individual core sites along the dislocation cores by hydrogen incorporation. Knowledge of the trapping properties in these specific structures is important to develop optimum, low loss heteroepitaxial InP cells.

Ringel, S. A.↗
NASA NTRS1995

Hydrogen Passivation of N(+)P and P(+)N Heteroepitaxial InP Solar Cell Structures

Dislocations and related point defect complexes caused by lattice mismatch currently limit the performance of heteroepitaxial InP cells by introducing shunting paths across the active junction and by the formation of deep traps within the base region. We have previously demonstrated that plasma hydrogenation is an effective and stable means to passivate the electrical activity of such defects in specially designed heteroepitaxial InP test structures to probe hydrogen passivation at typical base depths within a cell structure. In this work, we present our results on the hydrogen passivation of actual heteroepitaxial n(+)p and p(+)n InP cell structures grown on GaAs substrates by metalorganic chemical vapor deposition (MOCVD). We have found that a 2 hour exposure to a 13.56 MHz hydrogen plasma at 275 C reduces the deep level concentration in the base regions of both n(+)p and p(+)n heteroepitaxial InP cell structures from as-grown values of 5 - 7 x 10(exp 14)/cc, down to 3 - 5 x 10(exp 12)/cc. All dopants were successfully reactivated by a 400 C, 5 minute anneal With no detectable activation of deep levels. I-V analysis indicated a subsequent approx. 100 fold decrease In reverse leakage current at -1 volt reverse bias, and an improved built in voltage for the p(+)n structures. ln addition to being passivated,dislocations are also shown to participate in secondary interactions during hydrogenation. We find that the presence of dislocations enhances hydrogen diffusion into the cell structure, and lowers the apparent dissociation energy of Zn-H complexes from 1.19 eV for homoepitaxial Zn-doped InP to 1.12 eV for heteroepitaxial Zn-doped InP. This is explained by additional hydrogen trapping at dislocations subsequent to the reactivation of Zn dopants after hydrogenation.

Chatterjee, B.↗
NASA NTRS2002

Integrated CMOS photodetectors and signal processing for very low-level chemical sensing with the bioluminescent bioreporter integrated circuit

We report an integrated CMOS microluminometer optimized for the detection of low-level bioluminescence as part of the bioluminescent bioreporter integrated circuit (BBIC). This microluminometer improves on previous devices through careful management of the sub-femtoampere currents, both signal and leakage, that flow in the front-end processing circuitry. In particular, the photodiode is operated with a reverse bias of only a few mV, requiring special attention to the reset circuitry of the current-to-frequency converter (CFC) that forms the front-end circuit. We report a sub-femtoampere leakage current and a minimum detectable signal (MDS) of 0.15 fA (1510 s integration time) using a room temperature 1.47 mm2 CMOS photodiode. This microluminometer can detect luminescence from as few as 5000 fully induced Pseudomonas fluorescens 5RL bacterial cells. c2002 Elsevier Science B.V. All rights reserved.

Non-NASA Center↗
NASA NTRS2005

High Quality GaAs Growth by MBE on Si Using GeSi Buffers and Prospects for Space Photovoltaics

III-V solar cells on Si substrates are of interest for space photovoltaics since this would combine high performance space cells with a strong, lightweight and inexpensive substrate. However, the primary obstacles blocking III-V/Si cells from achieving high performance to date have been fundamental materials incompatabilities, namely the 4% lattice mismatch between GaAs and Si, and the large mismatch in thermal expansion coefficient. In this paper, we report on the molecular beam epitaxial (MBE) growth and properties of GaAs layers and single junction GaAs cells on Si wafers which utilize compositionally graded GeSi Intermediate buffers grown by ultra-high vacuum chemical vapor deposition (UHVCVD) to mitigate the large lattice mismatch between GaAs and Si. Ga As cell structures were found to incorporate a threading dislocation density of 0.9-1.5 x 10 (exp 6) per square centimeter, identical to the underlying relaxed Ge cap of the graded buffer, via a combination of transmission electron microscopy, electron beam induced current, and etch pit density measurements. AlGaAs/GaAs double heterostructures wre grown on the GeSi/Si substrates for time-resolved photoluminescence measurements, which revealed a bulk GaAs minority carrier lifetime in excess of 10 ns, the highest lifetime ever reported for GaAs on Si. A series of growth were performed to ass3ss the impact of a GaAs buffer to a thickness of only 0.1 micrometer. Secondary ion mass spectroscopy studies revealed that there is negligible cross diffusion of Ga, As and Ge at he III-V/Ge interface, identical to our earlier findings for GaAs grown on Ge wafers using MBE. This indicates that there is no need for a buffer to "bury" regions of high autodopjing,a nd that either pn or np configuration cells are easily accomodated by these substrates. Preliminary diodes and single junction Al Ga As heteroface cells were grown and fabricated on the Ge/GeSi/Si substrates for the first time. Diodes fabricated on GaAs, Ge and Ge/GeSi/Si substrate show nearly identical I-V characteristics in both forward and reverse bias regions. External quantum efficiencies of AlGaAs/GaAs cell structures grown on Ge/GeSi/Si and Ge substrates demonstrated nearly identical photoresponse, which indicates that high lifetimes, diffusion lengths and efficient minority carrier collection is maintained after complete cell processing.

Carlin, J. A.↗
NASA NTRS2005

Carbon nanotube Schottky diodes using Ti-Schottky and Pt-ohmic contacts for high frequency applications

We have demonstrated Schottky diodes using semiconducting single-walled nanotubes (s-SWNTs) with titanium Schottky and platinum Ohmic contacts for high-frequency applications. The diodes are fabricated using angled evaporation of dissimilar metal contacts over an s-SWNT. The devices demonstrate rectifying behavior with large reverse bias breakdown voltages of greater than 15 V. To decrease the series resistance, multiple SWNTs are grown in parallel in a single device, and the metallic tubes are burnt-out selectively. At low biases these diodes showed ideality factors in the range of 1.5 to 1.9. Modeling of these diodes as direct detectors at room temperature at 2.5 terahertz (THz) frequency indicates noise equivalent powers (NEP) potentially comparable to that of the state-of-the-art gallium arsenide solid-state Schottky diodes, in the range of 10-13 W(square root)xHz.

semiconducting↗
NASA NTRS1982

Voltage reapplication rate control for commutation of thyristors

A circuit for commutating a thyristor (21) by shunting its current for a minimum interval, thereby removing sustaining voltage to said thyristor, then subsequently restoring voltage to said thyristor at a predetermined rate, utilizes a series combination of a commutation electronic switch (22) and an isolated dc voltage supply (23) connected in parallel with the thyristor. The voltage supply is arranged with a polarity that permits the current flowing through the thyristor in one direction to be bypassed through the series combination while the commutation switch is turned on and to reverse bias the thyristor when the commutation switch is fully on. A dv/dt control circuit (24) limits the rate of rise of voltage across the commutation switch (22) as it is turned off in response to a command input signal. The dv/dt control circuit is comprised of a constant current drive (31) and a capacitor (32) connected between the output terminal of the commutation switch and the control input terminal of the commutation switch. The thyristor may be a triac (40) with two commutation switches (42, 43), one for current of each polarity, or with a single commutation switch (55) and a bridge circuit (52-55) for selecting the polarity of the switch (56).

Rippel, Wally E.↗
NASA NTRS1988

Monolithic electro-optic modulator array

A PIN GaAlAs diode structure is provided with parameters for index guiding of light in a single mode. The index of refraction of the central layer I (which in practice may be lightly doped .pi. or .nu.) is greater than the p- and n-layers to create a slab waveguide in the transverse direction. Stripe contacts define separate waveguide channels that are separated electrically and optically by implanting protons or etching grooves between the stripe contacts in the upper layer. Separate reverse biasing voltages may be applied to the stripe contacts for modulation of the light in proportions to the voltage, either with absorption modulation, if the light wavelength is within about 500.ANG. of the bandgap of the .pi.-material, or phase-delay modulation, if the wavelength is separated from the bandgap of the .pi.-material by at least 900.ANG..

Robinson, Deborah L.↗
NASA NTRS1976

Dual mode solid state power switch

A solid state amplifier has an output transistor stage and an input transistor stage interconnected as a Darlington circuit. An interstage transistor interconnecting the collectors of the two stages of the Darlington circuit is connected with the first stage transistor in a compound configuration. When the load current furnished by the amplifier is less than a predetermined value, the output stage operates as a simple saturated switch with its base drive current flowing through the emitter-base junction of the first stage which produces no collector current because the base-emitter junction of the interstage transistor is reverse-biased. When the load current exceeds said predetermined value, the interstage transistor begins to conduct allowing the input and output stages to operate as a Darlington amplifier and diverting a significant portion of the base drive current of the output transistor back into the load.

Maus, Louis C.↗
NASA NTRS2006

The USNA MIDN Microdosimeter Instrument

This paper describes the MIcroDosimetry iNstrument (MIDN) mission now under development at the United States Naval Academy. The instrument is manifested to fly on the MidSTAR-1 spacecraft, which is the second spacecraft to be developed and launched by the Academy s faculty and midshipmen. Launch is scheduled for 1 September 2006 on an ATLAS-5 launch vehicle. MIDN is a rugged, portable, low power, low mass, solid-state microdosimeter designed to measure in real time the energy distributions of energy deposited by radiation in microscopic volumes. The MIDN microdosimeter sensor is a reverse-biased silicon p-n junction array in a Silicon-On-Insulator (SOI) configuration. Microdosimetric frequency distributions as a function of lineal energies determine the radiation quality factors in support of radiation risk estimation to humans.

Pisacane, V. L.↗
NASA NTRS2008

SiC JFET Transistor Circuit Model for Extreme Temperature Range

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

Neudeck, Philip G.↗
NASA NTRS2011

Extension of the ADC Charge-Collection Model to Include Multiple Junctions

The ADC model is a charge-collection model derived for simple p-n junction silicon diodes having a single reverse-biased p-n junction at one end and an ideal substrate contact at the other end. The present paper extends the model to include multiple junctions, and the goal is to estimate how collected charge is shared by the different junctions.

drift-diffusion↗
NASA NTRS2004

Displacement Damage Induced Catastrophic Second Breakdown in Silicon Carbide Schottky Power Diodes

A novel catastrophic breakdown mode in reversed biased Silicon carbide diodes has been seen for low LET particles. These particles are too low in LET to induce SEB, however SEB was seen from particles of higher LET. The low LET mechanism correlates with second breakdown in diodes due to increase leakage and assisted charge injection from incident particles. Percolation theory was used to predict some basic responses of the devices, but the inherent reliability issue with silicon carbide have proven challenging.

breakdown↗
NASA NTRS2014

Evaluation of Polymer Hermetically Sealed Tantalum Capacitors

Polymer cathode tantalum capacitors have lower ESR (equivalent series resistance) compared to other types of tantalum capacitors and for this reason have gained popularity in the electronics design community. Their use allows improved performance of power supply systems along with substantial reduction of size and weight of the components used. However, these parts have poor thermal stability and can degrade in humid environments. Polymer hermetically sealed (PHS) capacitors avoid problems related to environmental degradation of molded case parts and can potentially replace current wet and solid hermetically sealed capacitors. In this work, PHS capacitors manufactured per DLA LAM DWG#13030 are evaluated for space applications. Several lots of capacitors manufactured over period from 2010 to 2014 were tested for the consistency of performance, electrical and thermal characteristics, highly accelerated life testing, and robustness under reverse bias and random vibration conditions. Special attention was given to analysis of leakage currents and the effect of long-term high temperature storage on capacitors in as is condition and after hermeticity loss. The results show that PHS capacitors might be especially effective for low-temperature applications or for system requiring a cold start-up. Additional screening and qualification testing have been recommended to assure the necessary quality of capacitors for space projects.

ferrite beads↗
NASA NTRS2017

Packaging Technology for Dielectric-Coating-Less Heavy Ion Radiation Testing of High-Voltage (HV) Electronic Parts

Testing high voltage (HV) electronic parts (greater than 300 V) for sudden event effects (SEE) caused by cosmic rays in the space environment, consisting of energetic heavy-ions, and neutron radiation in the upper atmosphere is a crucial step towards using these parts in spacecraft and aircraft. Due to the nature of cosmic radiation and neutrons, electronic parts are tested for SEE without any packaging and/or shielding over the top of the device. In the case of commercial HV parts, the top of the packaging is etched off and then a thin dielectric coating is placed over the part in order to avoid electrical arcing between the device surface and wire bonds and other components. Even though the effects of the thin dielectric layer on SEE testing can be accounted for, the dielectric layer significantly hinders post testing failure analysis. Replicating the test capability of state-of-the-art packaging while eliminating the need for post radiation test processing of the die surface (that obscures failure analysis) is the goal. To that end, a new packaging concept for HV parts has been developed that requires no dielectric coating over the part. Testing of prototype packages used with Schottky diodes (rated at 1200V) has shown no electrical arcing during testing and leakage currents during reverse bias testing are within the manufactures specifications.

High Voltage↗
NASA NTRS2009

A theoretical analysis of steady-state charge collection in simple diodes under high-injection conditions

A previous rigorous mathematical analysis of drift-diffusion equations was used to investigate collected charge in a simple reverse-biased p-n junction diode exposed to an ionization source that liberates carriers (electron-hole pairs) in a quasi-neutral region within the diode. Each of two simple models was found to agree with the more rigorous analysis when carrier liberation is sufficiently intense. One is the sensitive volume (SV) model, and the other was called “ambipolar diffusion with a cutoff” (ADC). The earlier rigorous analysis was worked out in detail only for a localized source, i.e., a point source of carrier liberation, so it was able to validate the applicability of each simple model only for that case. The present paper treats an arbitrary spatial distribution of carrier generation and concludes that the ADC model remains valid for this more general case, but the SV model does

Edmonds, Larry D.↗