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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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NASA NTRS1999

Low-Storage, Explicit Runge-Kutta Schemes for the Compressible Navier-Stokes Equations

The derivation of storage explicit Runge-Kutta (ERK) schemes has been performed in the context of integrating the compressible Navier-Stokes equations via direct numerical simulation. Optimization of ERK methods is done across the broad range of properties, such as stability and accuracy efficiency, linear and nonlinear stability, error control reliability, step change stability, and dissipation/dispersion accuracy, subject to varying degrees of memory economization. Following van der Houwen and Wray, 16 ERK pairs are presented using from two to five registers of memory per equation, per grid point and having accuracies from third- to fifth-order. Methods have been assessed using the differential equation testing code DETEST, and with the 1D wave equation. Two of the methods have been applied to the DNS of a compressible jet as well as methane-air and hydrogen-air flames. Derived 3(2) and 4(3) pairs are competitive with existing full-storage methods. Although a substantial efficiency penalty accompanies use of two- and three-register, fifth-order methods, the best contemporary full-storage methods can be pearl), matched while still saving two to three registers of memory.

Kennedy, Chistopher A.↗

NASA NTRS2002

Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

flash memory program disturb wearout erase fail re↗

NASA NTRS1989

On the feasibility of a spaceborne fault-tolerant hypercube

The feasibility of implementing a fault-tolerant hypercube architecture for space applications is discussed. Node-level architectures and designs are considered and a first-order reliability model is presented. It is shown how error recovery can be implemented using program rollback or roll-forward techniques. Shared memory augmentations to the message-passing structure can be used to get around the inefficiencies of multicomputers to provide efficient use of hardware to achieve the needed reliabilities while maintaining performance.

Rennels, David A.↗

NASA NTRS1977

Concatenated coding systems employing a unit-memory convolutional code and a byte-oriented decoding algorithm

Concatenated coding systems utilizing a convolutional code as the inner code and a Reed-Solomon code as the outer code are considered. In order to obtain very reliable communications over a very noisy channel with relatively modest coding complexity, it is proposed to concatenate a byte-oriented unit-memory convolutional code with an RS outer code whose symbol size is one byte. It is further proposed to utilize a real-time minimal-byte-error probability decoding algorithm, together with feedback from the outer decoder, in the decoder for the inner convolutional code. The performance of the proposed concatenated coding system is studied, and the improvement over conventional concatenated systems due to each additional feature is isolated.

Lee, L.-N.↗

NASA NTRS2013

FY12 End of Year Report for NEPP DDR2 Reliability

This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate 2 (DDR2) Reliability effort for FY2012. The task expanded the focus of evaluating reliability effects targeted for device examination. FY11 work highlighted the need to test many more parts and to examine more operating conditions, in order to provide useful recommendations for NASA users of these devices. This year's efforts focused on development of test capabilities, particularly focusing on those that can be used to determine overall lot quality and identify outlier devices, and test methods that can be employed on components for flight use. Flight acceptance of components potentially includes considerable time for up-screening (though this time may not currently be used for much reliability testing). Manufacturers are much more knowledgeable about the relevant reliability mechanisms for each of their devices. We are not in a position to know what the appropriate reliability tests are for any given device, so although reliability testing could be focused for a given device, we are forced to perform a large campaign of reliability tests to identify devices with degraded reliability. With the available up-screening time for NASA parts, it is possible to run many device performance studies. This includes verification of basic datasheet characteristics. Furthermore, it is possible to perform significant pattern sensitivity studies. By doing these studies we can establish higher reliability of flight components. In order to develop these approaches, it is necessary to develop test capability that can identify reliability outliers. To do this we must test many devices to ensure outliers are in the sample, and we must develop characterization capability to measure many different parameters. For FY12 we increased capability for reliability characterization and sample size. We increased sample size this year by moving from loose devices to dual inline memory modules (DIMMs) with an approximate reduction of 20 to 50 times in terms of per device under test (DUT) cost. By increasing sample size we have improved our ability to characterize devices that may be considered reliability outliers. This report provides an update on the effort to improve DDR2 testing capability. Although focused on DDR2, the methods being used can be extended to DDR and DDR3 with relative ease.

Guertin, Steven M.↗

NASA NTRS1978

Fault-tolerant software for aircraft control systems

Concepts for software to implement real time aircraft control systems on a centralized digital computer were discussed. A fault tolerant software structure employing functionally redundant routines with concurrent error detection was proposed for critical control functions involving safety of flight and landing. A degraded recovery block concept was devised to allow collocation of critical and noncritical software modules within the same control structure. The additional computer resources required to implement the proposed software structure for a representative set of aircraft control functions were discussed. It was estimated that approximately 30 percent more memory space is required to implement the total set of control functions. A reliability model for the fault tolerant software was described and parametric estimates of failure rate were made.

Source record↗

NASA NTRS1982

Automatically Reconfigurable Computer

Modular system changes its architecture to maximize either reliability or capacity. Reconfigurable computer is assembled from four kinds of modules: organizer/scheduler, memory, input/output processor, and central processor. Reconfiguration is initiated by a signal from a control panel or by fault interrupt from one of the modules.

Source record↗

NASA NTRS1982

Advanced CO2 removal process control and monitor instrumentation development

A progam to evaluate, design and demonstrate major advances in control and monitor instrumentation was undertaken. A carbon dioxide removal process, one whose maturity level makes it a prime candidate for early flight demonstration was investigated. The instrumentation design incorporates features which are compatible with anticipated flight requirements. Current electronics technology and projected advances are included. In addition, the program established commonality of components for all advanced life support subsystems. It was concluded from the studies and design activities conducted under this program that the next generation of instrumentation will be greatly smaller than the prior one. Not only physical size but weight, power and heat rejection requirements were reduced in the range of 80 to 85% from the former level of research and development instrumentation. Using a microprocessor based computer, a standard computer bus structure and nonvolatile memory, improved fabrication techniques and aerospace packaging this instrumentation will greatly enhance overall reliability and total system availability.

Heppner, D. B.↗

NASA NTRS1989

Active control of buckling of flexible beams

The feasibility of using the rapidly growing technology of the shape memory alloys actuators in actively controlling the buckling of large flexible structures is investigated. The need for such buckling control systems is becoming inevitable as the design trends of large space structures have resulted in the use of structural members that are long, slender, and very flexible. In addition, as these truss members are subjected mainly to longitudinal loading they become susceptible to structural instabilities due to buckling. Proper control of such instabilities is essential to the effective performance of the structures as stable platforms for communication and observation. Mathematical models are presented that simulate the dynamic characteristics of the shape memory actuator, the compressive structural members, and the associated active control system. A closed-loop computer-controlled system is designed, based on the developed mathematical models, and implemented to control the buckling of simple beams. The performance of the computer-controlled system is evaluated experimentally and compared with the theoretical predictions to validate the developed models. The obtained results emphasize the importance of buckling control and suggest the potential of the shape memory actuators as attractive means for controlling structural deformation in a simple and reliable way.

Baz, A.↗

NASA NTRS2008

Ring Bus Architecture for a Solid-State Recorder

A document concisely describes a ring bus architecture for a proposed solid-state recorder (SSR) that would serve as buffer of data to be transmitted from a spacecraft to Earth. This architecture would afford fault tolerance needed for reliable operation in an anticipated high-radiation environment in which traditional SSRs cannot operate reliably. Features of the architecture include one or more controller boards and multiple memory boards interconnected in a ringlike topology. The interconnections would be high-speed serial links complying with the Institute of Electrical and Electronics Engineers (IEEE) standard 1393 (which pertains to a spaceborne fiber-optic data bus). Accordingly, each controller and memory board would be equipped with an IEEE-1393-compliant ring-bus-interface unit. The ringlike topology and the multiplicity of memory boards (and, optionally, of controller boards) would afford the redundancy needed for fault tolerance. Each board would be a fault-containment region. The IEEE 1393 links could be routed so that the SSR would continue to function even in the event of multiple failures. This architecture would also support scalability over a wide range. In a fully redundant configuration, it could accommodate between 1 and 125 memory boards.

Walker, W. John↗

NASA NTRS2011

Virtual Sensor Test Instrumentation

Virtual Sensor Test Instrumentation is based on the concept of smart sensor technology for testing with intelligence needed to perform sell-diagnosis of health, and to participate in a hierarchy of health determination at sensor, process, and system levels. A virtual sensor test instrumentation consists of five elements: (1) a common sensor interface, (2) microprocessor, (3) wireless interface, (4) signal conditioning and ADC/DAC (analog-to-digital conversion/ digital-to-analog conversion), and (5) onboard EEPROM (electrically erasable programmable read-only memory) for metadata storage and executable software to create powerful, scalable, reconfigurable, and reliable embedded and distributed test instruments. In order to maximize the efficient data conversion through the smart sensor node, plug-and-play functionality is required to interface with traditional sensors to enhance their identity and capabilities for data processing and communications. Virtual sensor test instrumentation can be accessible wirelessly via a Network Capable Application Processor (NCAP) or a Smart Transducer Interlace Module (STIM) that may be managed under real-time rule engines for mission-critical applications. The transducer senses the physical quantity being measured and converts it into an electrical signal. The signal is fed to an A/D converter, and is ready for use by the processor to execute functional transformation based on the sensor characteristics stored in a Transducer Electronic Data Sheet (TEDS). Virtual sensor test instrumentation is built upon an open-system architecture with standardized protocol modules/stacks to interface with industry standards and commonly used software. One major benefit for deploying the virtual sensor test instrumentation is the ability, through a plug-and-play common interface, to convert raw sensor data in either analog or digital form, to an IEEE 1451 standard-based smart sensor, which has instructions to program sensors for a wide variety of functions. The sensor data is processed in a distributed fashion across the network, providing a large pool of resources in real time to meet stringent latency requirements.

Wang, Roy↗

NASA NTRS2011

Users Guide on Scaled CMOS Reliability: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

Reliability of advanced CMOS technology is a complex problem that is usually addressed from the standpoint of specific failure mechanisms rather than overall reliability of a finished microcircuit. A detailed treatment of CMOS reliability in scaled devices can be found in Ref. 1; it should be consulted for a more thorough discussion. The present document provides a more concise treatment of the scaled CMOS reliability problem, emphasizing differences in the recommended approach for these advanced devices compared to that of less aggressively scaled devices. It includes specific recommendations that can be used by flight projects that use advanced CMOS. The primary emphasis is on conventional memories, microprocessors, and related devices.

Scaled CMOS↗

NASA NTRSDate not supplied

A Passive fuel-Cell Surface power System (PaCeSS)

This effort produces a fully-passive surface power generation capability for fuel cell technology. The concept replaces the actively pumped thermal management of a state of the art (SOA) fuel cell/electrolyzer stack with a passive 2-phase thermosyphon for heat transport and a passive shape memory actuating radiator for temperature management. The concept addresses NASA fuel cell technology roadmap needs for greater reliability and longer operating life by eliminating life limiting elements of SOA fuel cell system design that drive failure modes associated with moving parts and control complexity. Applications map to surface power (primary fuel cell), surface energy storage (regenerable fuel cell) and in-situ resource utilization (electrolyzer/unitized reversible fuel cell). The first year of this effort concluded with independent demonstrations of 2-phase thermosyphon heat transport from a simulated fuel cell and temperature driven actuation of a shape memory actuating radiator. Results are in-character with underlying physics and demonstrate the potential to realize the objectives of this concept. his effort produces a fully-passive surface power generation capability for fuel cell technology. The concept replaces the actively pumped thermal management of a state of the art (SOA) fuel cell/electrolyzer stack with a passive 2-phase thermosyphon for heat transport and a passive shape memory actuating radiator for temperature management.

deionized water↗

NASA NTRS1975

Low cost computer subsystem for the Solar Electric Propulsion Stage (SEPS)

The Solar Electric Propulsion Stage (SEPS) subsystem which consists of the computer, custom input/output (I/O) unit, and tape recorder for mass storage of telemetry data was studied. Computer software and interface requirements were developed along with computer and I/O unit design parameters. Redundancy implementation was emphasized. Reliability analysis was performed for the complete command computer sybsystem. A SEPS fault tolerant memory breadboard was constructed and its operation demonstrated.

Source record↗

NASA NTRS1989

Active control of buckling of flexible beams

Mathematical models are presented that simulate the dynamic characteristics of shape memory alloy actuators made of nickel-titanium alloy (Nitinol) controlling the buckling of compressive structural members. A closed-loop computer-controlled system has been designed, based on the proposed mathematical models, and has been implemented to control the buckling of simple beams. The performance of the computer-controlled system is evaluated experimentally and compared with the theoretical predictions to validate the developed models. The results emphasized the importance of buckling control and suggest the potential of shape memory alloy actuators as attractive means for controlling structural deformation in a simple and reliable way.

Baz, A.↗

NASA NTRS1994

Nonlinear structural response using adaptive dynamic relaxation on a massively-parallel-processing system

A parallel adaptive dynamic relaxation (ADR) algorithm has been developed for nonlinear structural analysis. This algorithm has minimal memory requirements, is easily parallelizable and scalable to many processors, and is generally very reliable and efficient for highly nonlinear problems. Performance evaluations on single-processor computers have shown that the ADR algorithm is reliable and highly vectorizable, and that it is competitive with direct solution methods for the highly nonlinear problems considered. The present algorithm is implemented on the 512-processor Intel Touchstone DELTA system at Caltech, and it is designed to minimize the extent and frequency of interprocessor communication. The algorithm has been used to solve for the nonlinear static response of two and three dimensional hyperelastic systems involving contact. Impressive relative speedups have been achieved and demonstrate the high scalability of the ADR algorithm. For the class of problems addressed, the ADR algorithm represents a very promising approach for parallel-vector processing.

Oakley, David R.↗

NASA NTRS1994

High-performance, flexible, deployable array development for space applications

Flexible, deployable arrays are an attractive alternative to conventional solar arrays for near-term and future space power applications, particularly due to their potential for high specific power and low storage volume. Combined with low-cost flexible thin-film photovoltaics, these arrays have the potential to become an enabling or an enhancing technology for many missions. In order to expedite the acceptance of thin-film photovoltaics for space applications, however, parallel development of flexible photovoltaics and the corresponding deployable structure is essential. Many innovative technologies must be incorporated in these arrays to ensure a significant performance increase over conventional technologies. For example, innovative mechanisms which employ shape memory alloys for storage latches, deployment mechanisms, and array positioning gimbals can be incorporated into flexible array design with significant improvement in the areas of cost, weight, and reliability. This paper discusses recent activities at Martin Marietta regarding the development of flexible, deployable solar array technology. Particular emphasis is placed on the novel use of shape memory alloys for lightweight deployment elements to improve the overall specific power of the array. Array performance projections with flexible thin-film copper-indium-diselenide (CIS) are presented, and government-sponsored solar array programs recently initiated at Martin Marietta through NASA and Air Force Phillips Laboratory are discussed.

Gehling, Russell N.↗

NASA NTRS1985

A Portable Battery for Objective, Nonobtrusive Measures of Human Performance

A need exists for a standardized battery of human performance tests in order to measure the effects of various treatments. The present paper reports on progress in such a program, funded jointly by NASA and the Navy. Three batteries are available which differ in length (7.5, 15, and 30 minutes), and number of tests in the battery (3, 10, and 15). All tests are implemented on a portable, lap-held, briefcase-sized microprocessor (NEC PC 8201A). Performances measured include information processing, memory, visual perception, reasoning, motor skills, etc. Current programs are underway to determine norms, reliabilities, stabilities, factor structure of tests, comparisons with marker tests, apparatus suitability, etc.

Kennedy, Robert S.↗