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At least 109 records · Page 6

Charging/discharging behavior and mechanism of silicon quantum dots embedded in amorphous silicon carbide films

The charging/discharging behavior of Si quantum dots (QDs) embedded in amorphous silicon carbide (a-SiC{sub x}) was investigated based on the Al/insulating layer/Si QDs embedded in a-SiC{sub x}/SiO{sub 2}/p-Si (metal-insulator-quantum dots-oxide-silicon) multilayer structure by capacitance-voltage (C-V) and conductance-voltage (G-V) measurements. Transmission electron microscopy and Raman scattering spectroscopy measurements reveal the microstructure and distribution of Si QDs. The occurrence and shift of conductance peaks indicate the carrier transfer and the charging/discharging behavior of Si QDs. The multilayer structure shows a large memory window of 5.2 eV at ±8 V sweeping voltage. Analysis of the C-V and G-V results allows a quantification of the Coulomb charging energy and the trapped charge density associated with the charging/discharging behavior. It is found that the memory window is related to the size effect, and Si QDs with large size or low Coulomb charging energy can trap two or more electrons by changing the charging voltage. Meanwhile, the estimated lower potential barrier height between Si QD and a-SiC{sub x}, and the lower Coulomb charging energy of Si QDs could enhance the charging and discharging effect of Si QDs and lead to an enlarged memory window. Further studies of the charging/discharging mechanism of Si QDs embedded in a-SiC{sub x} can promote the application of Si QDs in low-power consumption semiconductor memory devices.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Optical power dependence of capacitance in uni-traveling-carrier photodetectors

Optical power dependence of capacitance in uni-traveling-carrier photodetectors is analyzed by founding a differential capacitance model. The trend of capacitance variation against optical power by simulation gets a good agreement with the measured results. The relationship between light-intensity-dependent capacitance and DC saturation characteristics of the device is also investigated at different collection layer thicknesses. The optical power at the maximum point of capacitance is near that at the DC saturation point. With the thickness of collection layer increasing, the maximum capacitance decreases and optical power at capacitance maximum point also becomes small.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

From MEMRISTOR to MEMImpedance device

The behavior of the capacitance switching of HfO{sub 2} Resistive non-volatile Memories is investigated in view of realizing a MEMImpedance (MEM-Z) device. In such a Metal Insulator Metal structure, the impedance value can be tuned by the adjustment of both resistance and capacitance values. We observe a strong variation of capacitance from positive to negative values in a single layer Metal Insulator Metal device made of HfO{sub 2} deposited by Atomic Layer Deposition, but unfortunately no memory effect is observed. However, in the case of a two layer structure, a device has been obtained with a memory effect where both resistance and capacitance values can be tuned simultaneously, with a variation of capacitance down to negative values to get an inductive behavior. Negative capacitance values are observed for voltage values near SET voltage. A schematic model based on shaped oxygen vacancy density is proposed to account for this capacitance variation. The oxygen vacancies can be either isolated or connected in the bulk of the oxide.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Computational insight into the capacitive performance of graphene edge planes

Recent experiments have shown that electric double-layer capacitors utilizing electrodes consisting of graphene edge plane exhibit higher capacitance than graphene basal plane. However, theoretical understanding of this capacitance enhancement is still limited. Here we applied a self-consistent joint density functional theory calculation on the electrode/electrolyte interface and found that the capacitance of graphene edge plane depends on the edge type: zigzag edge has higher capacitance than armchair edge due to the difference in their electronic structures. We further examined the quantum, dielectric, and electric double-layer (EDL) contributions to the total capacitance of the edge-plane electrodes. Classical molecular dynamics simulation found that the edge planes have higher EDL capacitance than the basal plane due to better adsorption of counter-ions and higher solvent accessible surface area. Finally, our work therefore has elucidated the capacitive energy storage in graphene edge planes that take into account both the electrode's electronic structure and the EDL structure.

36 MATERIALS SCIENCE↗

Modeling of n-InAs metal oxide semiconductor capacitors with high-κ gate dielectric

A qualitative analysis on capacitance-voltage and conductance data for high-κ/InAs capacitors is presented. Our measured data were evaluated with a full equivalent circuit model, including both majority and minority carriers, as well as interface and border traps, formulated for narrow band gap metal-oxide-semiconductor capacitors. By careful determination of interface trap densities, distribution of border traps across the oxide thickness, and taking into account the bulk semiconductor response, it is shown that the trap response has a strong effect on the measured capacitances. Due to the narrow bandgap of InAs, there can be a large surface concentration of electrons and holes even in depletion, so a full charge treatment is necessary.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Mutual capacitance of liquid conductors in deformable tactile sensing arrays

Advances in highly deformable electronics are needed in order to enable emerging categories of soft computing devices ranging from wearable electronics, to medical devices, and soft robotic components. The combination of highly elastic substrates with intrinsically stretchable conductors holds the promise of enabling electronic sensors that can conform to curved objects, reconfigurable displays, or soft biological tissues, including the skin. Here, we contribute sensing principles for tactile (mechanical image) sensors based on very low modulus polymer substrates with embedded liquid metal microfluidic arrays. The sensors are fabricated using a single-step casting method that utilizes fine nylon filaments to produce arrays of cylindrical channels on two layers. The liquid metal (gallium indium alloy) conductors that fill these channels readily adopt the shape of the embedding membrane, yielding levels of deformability greater than 400%, due to the use of soft polymer substrates. We modeled the sensor performance using electrostatic theory and continuum mechanics, yielding excellent agreement with experiments. Using a matrix-addressed capacitance measurement technique, we are able to resolve strain distributions with millimeter resolution over areas of several square centimeters.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Resilience of High-Efficiency CdSeTe:As and CdSeTe:Cu Solar Cells to Proton Irradiation

Power generation in space is currently dominated by expensive III-V multi-junction photovoltaic (PV) devices and cheap crystalline silicon (c-Si) PV devices. Both of these technologies degrade rapidly in proton-radiation-rich space environments, such as the Van Allen belt. The present study of cadmium selenide telluride- (CdSeTe-) based PV devices exposed to 150-to-1500 keV proton irradiation with fluences up to 9 x 1013 cm-2 reveal a more radiation-hard alternative to III-V and c-Si PV technologies. We report on measurement and analysis of current density vs voltage (JV), external quantum efficiency (EQE), external radiative efficiency, and capacitance vs voltage (CV) characteristics. JV characteristics of As-doped CdSeTe devices show 80% remaining power conversion efficiency (PCE) relative to unexposed controls when exposed to 650 keV protons at a fluence of 1012 cm-2. Under these same irradiation conditions, Cu-doped CdSeTe devices demonstrate an even better 95% PCE retention compared with unirradiated control devices. Evidence of radiation-induced absorber p-type doping compensation is observed in the glass-side EQE at 0 V and CV characteristics of most of the irradiated CdSeTe:As devices, but clear compensation is evident only for the most heavily irradiated CdSeTe:Cu devices. Elevated blue-green photocurrent in the film-side 0 V EQE suggests a buried junction in the most heavily irradiated CdSeTe:As devices. Although CdSeTe:Cu devices are the more resilient of the CdSeTe structures, both CdSeTe-based technologies are radiation-hard when compared to c-Si and III-V multi-junction PV.

14 SOLAR ENERGY↗

Optimizing indium antimonide (InSb) detectors for low background operation

The various noise sources that affect InSb detectors (and similar voltaic devices) are discussed and calculated. Methods are given for measuring detector resistance, photon loading, detector and amplifier capacitance, amplifier frequency response, amplifier noise, and quantum efficiency. A photovoltaic InSb detector with increased sensitivity in the 1 to 5.6 mu region is dicussed.

Treffers, R. R.↗

Design and Development of 256x256 Linear Mode Low-Noise Avalanche Photodiode Arrays

A larger format photodiode array is always desirable for many LADAR imaging applications. However, as the array format increases, the laser power or the lens aperture has to increase to maintain the same flux per pixel thus increasing the size, weight and power of the imaging system. In order to avoid this negative impact, it is essential to improve the pixel sensitivity. The sensitivity of a short wavelength infrared linear-mode avalanche photodiode (APD) is a delicate balance of quantum efficiency, usable gain, excess noise factor, capacitance, and dark current of APD as well as the input equivalent noise of the amplifier. By using InA1As as a multiplication layer in an InP-based APD, the ionization coefficient ratio, k, is reduced from 0.40 (lnP) to 0.22, and the excess noise is reduced by about 50%. An additional improvement in excess noise of 25% was achieved by employing an impact-ionization-engineering structure with a k value of 0.15. Compared with the traditional InP structure, about 30% reduction in the noise-equivalent power with the following amplifier can be achieved. Spectrolab demonstrated 30-um mesa APD pixels with a dark current less than 10 nA and a capacitance of 60 fF at gain of 10. APD gain uninformity determines the usable gain of most pixels in an array, which is critical to focal plane array sensitivity. By fine tuning the material growth and device process, a break-down-voltage standard deviation of 0.1 V and gain of 30 on individual pixels were demonstrated in our 256x256 linear-mode APD arrays.

Yuan, Ping↗

Reduced graphene oxide mid-infrared photodetector at 300 K

We report on uncooled mid-infrared photovoltaic responses at 300 K arising in heterojunctions of reduced graphene oxide with p-Si. Two major photoresponse spectral peaks are observed, one in the near infrared starting at 1.1 μm corresponding to electron-hole pair generation in the Si substrate, and another at wavelengths below 2.5 μm, arising from properties of the reduced graphene oxide-Si heterojunction. Our analysis of the current-voltage characteristics at various temperatures suggests that the two materials form a type-II (broken-gap) heterojunction, with a characteristic transition between direct tunneling to field emission, to over-the-barrier excitation with increasing reverse voltage. Illumination was found to affect the onset of the transition between direct tunneling and field-emission, suggesting that the mid infrared response results from the excitation of minority carriers (electrons) from the Si and their collection in the reduced graphene oxide contact. The photoresponse near 1.1 μm showed a time constant at least five times faster than the one at 2.5 μm, which points to surface defects as well as high series resistance and capacitance as potentially limiting factors in this mode of operation. With proper device engineering considerations, these devices could be promising as a graphene-based platform for infrared sensing.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

All-solid-state supercapacitors on silicon using graphene from silicon carbide

Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitance behavior with a specific area capacitance of up to 174 μF cm{sup −2} with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities.

36 MATERIALS SCIENCE↗

Large electron concentration modulation using capacitance enhancement in SrTiO{sub 3}/SmTiO{sub 3} Fin-field effect transistors

Solid-state modulation of 2-dimensional electron gases (2DEGs) with extreme (∼3.3 × 10{sup 14 }cm{sup −2}) densities corresponding to 1/2 electron per interface unit cell at complex oxide heterointerfaces (such as SrTiO{sub 3}/GdTiO{sub 3} or SrTiO{sub 3}/SmTiO{sub 3}) is challenging because it requires enormous gate capacitances. One way to achieve large gate capacitances is by geometrical capacitance enhancement in fin structures. In this work, we fabricate both Au-gated planar field effect transistors (FETs) and Fin-FETs with varying fin-widths on 60 nm SrTiO{sub 3}/5 nm SmTiO{sub 3} thin films grown by hybrid molecular beam epitaxy. We find that the FinFETs exhibit higher gate capacitance compared to planar FETs. By scaling down the SrTiO{sub 3}/SmTiO{sub 3} fin widths, we demonstrate further gate capacitance enhancement, almost twice compared to the planar FETs. In the FinFETs with narrowest fin-widths, we demonstrate a record 2DEG electron concentration modulation of ∼2.4 × 10{sup 14 }cm{sup −2}.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Observation of genuine wave vector (k or β) gap in a dynamic transmission line and temporal photonic crystals

By definition, a temporal photonic crystal (TPC) has a permittivity ε(t) that varies periodically with time. We prove that, in the long wavelength limit, a TPC is accurately mimicked by a dynamic transmission line (DTL) having a capacitance (inductance) per unit length equal to ε(t) (μ). Employing a DTL in the microwave region, we measured the photonic band structure, which results to display a genuine wave vector (k or β) gap, in very good agreement with our theoretical model and the equivalent TPC.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Memcapacitive characteristics in reactive-metal (Mo, Al)/HfO{sub X}/n-Si structures through migration of oxygen by applied voltage

Memcapacitive characteristics were investigated in metal-oxide-semiconductor (MOS) structure of reactive electrode (Mo, Al) and hafnium oxide (HfO{sub X}) on n-type Si substrate. The capacitance-voltage curves exhibited sequentially changing capacitance with memory function as repeating voltage sweeps, featured the memcapacitive behaviors. The saturation capacitance was decreased by repeating +V sweeps, while barely changed by −V sweeps. Also, the capacitance-time curves disclosed the same tendency. However, the MOS structure with inert Pt electrode did not show the capacitance change. The memcapacitive behaviors were induced by the migration of oxygen ions from HfO{sub X} to reactive electrodes by applied voltage, which altered the permittivity of HfO{sub X}.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Disentangling nonradiative recombination processes in Ge micro-crystals on Si substrates

We address nonradiative recombination pathways by leveraging surface passivation and dislocation management in μm-scale arrays of Ge crystals grown on deeply patterned Si substrates. The time decay photoluminescence (PL) at cryogenic temperatures discloses carrier lifetimes approaching 45 ns in band-gap engineered Ge micro-crystals. This investigation provides compelling information about the competitive interplay between the radiative band-edge transitions and the trapping of carriers by dislocations and free surfaces. Furthermore, an in-depth analysis of the temperature dependence of the PL, combined with capacitance data and finite difference time domain modeling, demonstrates the effectiveness of GeO{sub 2} in passivating the surface of Ge and thus in enhancing the room temperature PL emission.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Anomalous large electrical capacitance of planar microstructures with vanadium dioxide films near the insulator-metal phase transition

The temperature dependence of electrical capacitance of planar microstructures with vanadium dioxide (VO{sub 2}) film near the insulator-metal phase transition has been investigated at the frequency of 1 MHz. Electrical capacitance measurements of the microstructures were performed by the technique based on the using of a two-terminal resistor-capacitor module simulating the VO{sub 2} layer behavior at the insulator-metal phase transition. At temperatures 325–342 K, the anomalous increase in microstructures capacitance was observed. Calculation of electric field in the microstructure showed that VO{sub 2} relative permittivity (ε) reaches ∼10{sup 8} at the percolation threshold. The high value of ε can be explained by the fractal nature of the interface between metal and insulator clusters formed near the insulator-metal phase transition.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

ZrO{sub 2} and HfO{sub 2} dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatment

The electrical properties of ZrO{sub 2} and HfO{sub 2} gate dielectrics on n-InAs were evaluated. Particularly, an in situ surface treatment method including cyclic nitrogen plasma and trimethylaluminum pulses was used to improve the quality of the high-κ oxides. The quality of the InAs-oxide interface was evaluated with a full equivalent circuit model developed for narrow band gap metal-oxide-semiconductor (MOS) capacitors. Capacitance–voltage (C–V) measurements exhibit a total trap density profile with a minimum of 1 × 10{sup 12 }cm{sup −2} eV{sup −1} and 4 × 10{sup 12 }cm{sup −2} eV{sup −1} for ZrO{sub 2} and HfO{sub 2}, respectively, both of which are comparable to the best values reported for high-κ/III-V devices. Our simulations showed that the measured capacitance is to a large extent affected by the border trap response suggesting a very low density of interface traps. Charge trapping in MOS structures was also investigated using the hysteresis in the C–V measurements. The experimental results demonstrated that the magnitude of the hysteresis increases with increase in accumulation voltage, indicating an increase in the charge trapping response.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗