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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS1972

A workload model and measures for computer performance evaluation

A generalized workload definition is presented which constructs measurable workloads of unit size from workload elements, called elementary processes. An elementary process makes almost exclusive use of one of the processors, CPU, I/O processor, etc., and is measured by the cost of its execution. Various kinds of user programs can be simulated by quantitative composition of elementary processes into a type. The character of the type is defined by the weights of its elementary processes and its structure by the amount and sequence of transitions between its elementary processes. A set of types is batched to a mix. Mixes of identical cost are considered as equivalent amounts of workload. These formalized descriptions of workloads allow investigators to compare the results of different studies quantitatively. Since workloads of different composition are assigned a unit of cost, these descriptions enable determination of cost effectiveness of different workloads on a machine. Subsequently performance parameters such as throughput rate, gain factor, internal and external delay factors are defined and used to demonstrate the effects of various workload attributes on the performance of a selected large scale computer system.

Kerner, H.↗
NASA NTRS2002

Multi-Zone Liquid Thrust Chamber Performance Code with Domain Decomposition for Parallel Processing

Computational Fluid Dynamics (CFD) has considerably evolved in the last decade. There are many computer programs that can perform computations on viscous internal or external flows with chemical reactions. CFD has become a commonly used tool in the design and analysis of gas turbines, ramjet combustors, turbo-machinery, inlet ducts, rocket engines, jet interaction, missile, and ramjet nozzles. One of the problems of interest to NASA has always been the performance prediction for rocket and air-breathing engines. Due to the complexity of flow in these engines it is necessary to resolve the flowfield into a fine mesh to capture quantities like turbulence and heat transfer. However, calculation on a high-resolution grid is associated with a prohibitively increasing computational time that can downgrade the value of the CFD for practical engineering calculations. The Liquid Thrust Chamber Performance (LTCP) code was developed for NASA/MSFC (Marshall Space Flight Center) to perform liquid rocket engine performance calculations. This code is a 2D/axisymmetric full Navier-Stokes (NS) solver with fully coupled finite rate chemistry and Eulerian treatment of liquid fuel and/or oxidizer droplets. One of the advantages of this code has been the resemblance of its input file to the JANNAF (Joint Army Navy NASA Air Force Interagency Propulsion Committee) standard TDK code, and its automatic grid generation for JANNAF defined combustion chamber wall geometry. These options minimize the learning effort for TDK users, and make the code a good candidate for performing engineering calculations. Although the LTCP code was developed for liquid rocket engines, it is a general-purpose code and has been used for solving many engineering problems. However, the single zone formulation of the LTCP has limited the code to be applicable to problems with complex geometry. Furthermore, the computational time becomes prohibitively large for high-resolution problems with chemistry, two-equation turbulence model, and two-phase flow. To overcome these limitations, the LTCP code is rewritten to include the multi-zone capability with domain decomposition that makes it suitable for parallel processing, i.e., enabling the code to run every zone or sub-domain on a separate processor. This can reduce the run time by a factor of 6 to 8, depending on the problem.

Homayun K. Navaz↗
NASA NTRS1982

NASTRAN thermal analyzer in a unified finite-element treatment of thermo-structural analyses

The NASTRAN thermal analyzer (NTA) which performs large-scale unified thermo-structural analyses with the NASTRAN (NASA structural analysis) computer program is described. The mathematical similitude between these two distinct disciplines of thermal and structure is examined. It serves as the theoretical basis upon which the implementation of the thermal capability in NASTRAN was accomplished. The program structure, the functional flow, the solution algorithms, the organization of an input data deck and the solution capabilities of NTA are summarized. Emphasis is placed on the interface of the unified approach in thermo-structural analyses where stresses, deflections, vibrations and bucklings induced by the effect of temperature change are of concern. Attentions are also directed to the preprocessor and post processors. As a specially designed preprocessor, the VIEW program is capable of generating exchange factors which can be output, at user's option, in formats compatible with that required by NTA. Two post processors that serve specific objectives are included. They are the thermal variance analysis and the graphical displaying capability of temperatures in color or black and white.

Lee, H. P.↗
DOE OSTI2025

Harnessing ionic complexity: A modeling approach for hierarchical ionic circuit design

Since the 1950s, soft ionic devices have evolved from individual components to an expanding library of sensors, actuators, signal transmitters, and processors. However, integrating these components into complex, multifunctional systems remains challenging due to the nonintuitive and nonlinear interactions between ionic elements. In this work, we address these fundamental challenges by developing a lumped element model that enables interrogation of the physics that governs ionic circuits, as well as rapid design and optimization. Our model captures features specific to ionic charge carriers, while preserving the hierarchical design flexibility and computational efficiency of traditional circuit modeling. We demonstrate that our model can not only fit individual device behavior but also accurately predict the behavior of larger circuits formed by combining those devices. Additionally, we show how our tool utilizes the intrinsic nonlinearities of ionic systems to enable extended functionality, revealing how factors such as ion enrichment, ion leakage, and polymer charge density influence performance. Lastly, we present a fully ionic power supply, sensor, control system, and actuator for a soft robot that adapts its motion in response to environmental salt, illustrating the tool’s potential to accelerate advancements in chemical sensing, biointerfacing, biomimetic systems, and adaptive materials.

42 ENGINEERING↗
NASA NTRS2001

2-D Modeling of Nanoscale MOSFETs: Non-Equilibrium Green's Function Approach

We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Electron-electron interaction is treated within Hartree approximation by solving NEGF and Poisson equations self-consistently. For the calculations presented here, parallelization is performed by distributing the solution of NEGF equations to various processors, energy wise. We present simulation of the "benchmark" MIT 25nm and 90nm MOSFETs and compare our results to those from the drift-diffusion simulator and the quantum-corrected results available. In the 25nm MOSFET, the channel length is less than ten times the electron wavelength, and the electron scattering time is comparable to its transit time. Our main results are: (1) Simulated drain subthreshold current characteristics are shown, where the potential profiles are calculated self-consistently by the corresponding simulation methods. The current predicted by our quantum simulation has smaller subthreshold slope of the Vg dependence which results in higher threshold voltage. (2) When gate oxide thickness is less than 2 nm, gate oxide leakage is a primary factor which determines off-current of a MOSFET (3) Using our 2-D NEGF simulator, we found several ways to drastically decrease oxide leakage current without compromising drive current. (4) Quantum mechanically calculated electron density is much smaller than the background doping density in the poly silicon gate region near oxide interface. This creates an additional effective gate voltage. Different ways to. include this effect approximately will be discussed.

Svizhenko, Alexei↗
NASA NTRS1997

Efficacy of Code Optimization on Cache-based Processors

The current common wisdom in the U.S. is that the powerful, cost-effective supercomputers of tomorrow will be based on commodity (RISC) micro-processors with cache memories. Already, most distributed systems in the world use such hardware as building blocks. This shift away from vector supercomputers and towards cache-based systems has brought about a change in programming paradigm, even when ignoring issues of parallelism. Vector machines require inner-loop independence and regular, non-pathological memory strides (usually this means: non-power-of-two strides) to allow efficient vectorization of array operations. Cache-based systems require spatial and temporal locality of data, so that data once read from main memory and stored in high-speed cache memory is used optimally before being written back to main memory. This means that the most cache-friendly array operations are those that feature zero or unit stride, so that each unit of data read from main memory (a cache line) contains information for the next iteration in the loop. Moreover, loops ought to be 'fat', meaning that as many operations as possible are performed on cache data-provided instruction caches do not overflow and enough registers are available. If unit stride is not possible, for example because of some data dependency, then care must be taken to avoid pathological strides, just ads on vector computers. For cache-based systems the issues are more complex, due to the effects of associativity and of non-unit block (cache line) size. But there is more to the story. Most modern micro-processors are superscalar, which means that they can issue several (arithmetic) instructions per clock cycle, provided that there are enough independent instructions in the loop body. This is another argument for providing fat loop bodies. With these restrictions, it appears fairly straightforward to produce code that will run efficiently on any cache-based system. It can be argued that although some of the important computational algorithms employed at NASA Ames require different programming styles on vector machines and cache-based machines, respectively, neither architecture class appeared to be favored by particular algorithms in principle. Practice tells us that the situation is more complicated. This report presents observations and some analysis of performance tuning for cache-based systems. We point out several counterintuitive results that serve as a cautionary reminder that memory accesses are not the only factors that determine performance, and that within the class of cache-based systems, significant differences exist.

VanderWijngaart, Rob F.↗
NASA NTRS1991

Lanczos eigensolution method for high-performance computers

The theory, computational analysis, and applications are presented of a Lanczos algorithm on high performance computers. The computationally intensive steps of the algorithm are identified as: the matrix factorization, the forward/backward equation solution, and the matrix vector multiples. These computational steps are optimized to exploit the vector and parallel capabilities of high performance computers. The savings in computational time from applying optimization techniques such as: variable band and sparse data storage and access, loop unrolling, use of local memory, and compiler directives are presented. Two large scale structural analysis applications are described: the buckling of a composite blade stiffened panel with a cutout, and the vibration analysis of a high speed civil transport. The sequential computational time for the panel problem executed on a CONVEX computer of 181.6 seconds was decreased to 14.1 seconds with the optimized vector algorithm. The best computational time of 23 seconds for the transport problem with 17,000 degs of freedom was on the the Cray-YMP using an average of 3.63 processors.

Bostic, Susan W.↗
NASA NTRS2002

Onboard Processor for Compressing HSI Data

With EO-1 Hyperion and MightySat in orbit NASA and the DoD are showing their continued commitment to hyperspectral imaging (HSI). As HSI sensor technology continues to mature, the ever-increasing amounts of sensor data generated will result in a need for more cost effective communication and data handling systems. Lockheed Martin, with considerable experience in spacecraft design and developing special purpose onboard processors, has teamed with Applied Signal & Image Technology (ASIT), who has an extensive heritage in HSI, to develop a real-time and intelligent onboard processing (OBP) system to reduce HSI sensor downlink requirements. Our goal is to reduce the downlink requirement by a factor greater than 100, while retaining the necessary spectral fidelity of the sensor data needed to satisfy the many science, military, and intelligence goals of these systems. Our initial spectral compression experiments leverage commercial-off-the-shelf (COTS) spectral exploitation algorithms for segmentation, material identification and spectral compression that ASIT has developed. ASIT will also support the modification and integration of this COTS software into the OBP. Other commercially available COTS software for spatial compression will also be employed as part of the overall compression processing sequence. Over the next year elements of a high-performance reconfigurable OBP will be developed to implement proven preprocessing steps that distill the HSI data stream in both spectral and spatial dimensions. The system will intelligently reduce the volume of data that must be stored, transmitted to the ground, and processed while minimizing the loss of information.

Cook, Sid↗
NASA NTRS1994

A Navier-Strokes Chimera Code on the Connection Machine CM-5: Design and Performance

We have implemented a three-dimensional compressible Navier-Stokes code on the Connection Machine CM-5. The code is set up for implicit time-stepping on single or multiple structured grids. For multiple grids and geometrically complex problems, we follow the 'chimera' approach, where flow data on one zone is interpolated onto another in the region of overlap. We will describe our design philosophy and give some timing results for the current code. A parallel machine like the CM-5 is well-suited for finite-difference methods on structured grids. The regular pattern of connections of a structured mesh maps well onto the architecture of the machine. So the first design choice, finite differences on a structured mesh, is natural. We use centered differences in space, with added artificial dissipation terms. When numerically solving the Navier-Stokes equations, there are liable to be some mesh cells near a solid body that are small in at least one direction. This mesh cell geometry can impose a very severe CFL (Courant-Friedrichs-Lewy) condition on the time step for explicit time-stepping methods. Thus, though explicit time-stepping is well-suited to the architecture of the machine, we have adopted implicit time-stepping. We have further taken the approximate factorization approach. This creates the need to solve large banded linear systems and creates the first possible barrier to an efficient algorithm. To overcome this first possible barrier we have considered two options. The first is just to solve the banded linear systems with data spread over the whole machine, using whatever fast method is available. This option is adequate for solving scalar tridiagonal systems, but for scalar pentadiagonal or block tridiagonal systems it is somewhat slower than desired. The second option is to 'transpose' the flow and geometry variables as part of the time-stepping process: Start with x-lines of data in-processor. Form explicit terms in x, then transpose so y-lines of data are in-processor. Form explicit terms in y, then transpose so z-lines are in processor. Form explicit terms in z, then solve linear systems in the z-direction. Transpose to the y-direction, then solve linear systems in the y-direction. Finally transpose to the x direction and solve linear systems in the x-direction. This strategy avoids inter-processor communication when differencing and solving linear systems, but requires a large amount of communication when doing the transposes. The transpose method is more efficient than the non-transpose strategy when dealing with scalar pentadiagonal or block tridiagonal systems. For handling geometrically complex problems the chimera strategy was adopted. For multiple zone cases we compute on each zone sequentially (using the whole parallel machine), then send the chimera interpolation data to a distributed data structure (array) laid out over the whole machine. This information transfer implies an irregular communication pattern, and is the second possible barrier to an efficient algorithm. We have implemented these ideas on the CM-5 using CMF (Connection Machine Fortran), a data parallel language which combines elements of Fortran 90 and certain extensions, and which bears a strong similarity to High Performance Fortran. We make use of the Connection Machine Scientific Software Library (CMSSL) for the linear solver and array transpose operations.

Jespersen, Dennis C.↗
NASA NTRS1993

Precision slew/settle technologies for flexible spacecraft

Many spacecraft missions in the next decade will require both a high degree of agility and precision pointing. Agility includes both rotational maneuvering for retargeting and translational motion for orbit adjustment and threat avoidance. The major challenge associated with such missions is the need for control over a wide range of amplitudes and frequencies, ranging from tens of degrees at less than 1 Hz to a few micron radians at hundreds of Hz. TRW's internally funded Precision Control of Agile Spacecraft (PCAS) project is concerned with developing and validating in hardware the tools necessary to successfully complete the combined agile maneuvering/precision pointing missions. Development has been undertaken on a number of fronts for quietly slewing flexible structures. Various methods for designing slew torque profiles have been investigated. Prime candidates for slew/settle scenarios include Inverse Dynamics and Parameterized Function Space. Joint work with Processor Bayo at the University of California, Santa Barbara and Professor Flashner at the University of Southern California has led to promising torque profile design methods. Active and passive vibration suppression techniques also play a key role for rapid slew/settle mission scenarios. Active members with local control loops and passive members with high loss factor viscoelastic material have been selected for hardware verification. Progress in each of these areas produces large gains in the quiet slewing of flexible spacecraft. The main thrust of the effort to date has been the development of a modular testbed for hardware validation of the precision control concepts. The testbed is a slewing eighteen foot long flexible truss. Active and passive members can be interchanged with the baseline aluminum members to augment the inherent damping in the system. For precision control the active members utilize control laws running on a high speed digital structural control processor. Tip and midspan motions of the truss are determined using optical sensors while accelerometers can be used to monitor the motions of other points of interest. Preliminary results indicate that a mix of technologies produces the greatest benefit. For example, shaping the torque profile produces large improvements in slew/settle performance, but without added damping settling times may still be excessive. With the introduction of moderate amounts of damping, slew/settle performance is vastly improved. On the other hand, introducing damping without shaping the torque profile may not yield the desired level of performance.

Manning, R. A.↗
NASA NTRS2011

High-Throughput, Adaptive FFT Architecture for FPGA-Based Spaceborne Data Processors

Exponential growth in microelectronics technology such as field-programmable gate arrays (FPGAs) has enabled high-performance spaceborne instruments with increasing onboard data processing capabilities. As a commonly used digital signal processing (DSP) building block, fast Fourier transform (FFT) has been of great interest in onboard data processing applications, which needs to strike a reasonable balance between high-performance (throughput, block size, etc.) and low resource usage (power, silicon footprint, etc.). It is also desirable to be designed so that a single design can be reused and adapted into instruments with different requirements. The Multi-Pass Wide Kernel FFT (MPWK-FFT) architecture was developed, in which the high-throughput benefits of the parallel FFT structure and the low resource usage of Singleton s single butterfly method is exploited. The result is a wide-kernel, multipass, adaptive FFT architecture. The 32K-point MPWK-FFT architecture includes 32 radix-2 butterflies, 64 FIFOs to store the real inputs, 64 FIFOs to store the imaginary inputs, complex twiddle factor storage, and FIFO logic to route the outputs to the correct FIFO. The inputs are stored in sequential fashion into the FIFOs, and the outputs of each butterfly are sequentially written first into the even FIFO, then the odd FIFO. Because of the order of the outputs written into the FIFOs, the depth of the even FIFOs, which are 768 each, are 1.5 times larger than the odd FIFOs, which are 512 each. The total memory needed for data storage, assuming that each sample is 36 bits, is 2.95 Mbits. The twiddle factors are stored in internal ROM inside the FPGA for fast access time. The total memory size to store the twiddle factors is 589.9Kbits. This FFT structure combines the benefits of high throughput from the parallel FFT kernels and low resource usage from the multi-pass FFT kernels with desired adaptability. Space instrument missions that need onboard FFT capabilities such as the proposed DESDynl, SWOT (Surface Water Ocean Topography), and Europa sounding radar missions would greatly benefit from this technology with significant reductions in non-recurring cost and risk.

NguyenKobayashi, Kayla↗
NASA NTRSDate not supplied

A Prototype Early Planetary Organic Processor Assembly (OPA) Based on Dual-Stage Anaerobic Membrane Bioreactor (AnMBR) for Fecal and Food Waste Treatment and Resource Recovery

Long-duration, deep-space exploration and habitation missions demand robust and reliable technologies to ensure crew health, safety, and mission success. Local food production will be essential for crew nutrition and morale. However, at $10,000/lb, the payload costs and mass/volume limitations to transport and provide the necessary resources, including fertilizer, for an anticipated 30-month mission become challenging over time. For mission success and sustainability, the Environmental Control and Life Support System (ECLSS) of the near future will need to recover resources from all “waste” sources and be near-closed loop. Organic wastes (e.g., fecal and food) offer a renewable source of C, N, P, water and other trace elements necessary to sustain crop production. However, these high solidwastes are often difficult to treatdue to factors includingheterogeneity, complexity, high organic strength, and the presence of pathogens. To date, there is no flight-ready technology capable of treating mixed organic wastes, creating a technology gap for future space missions. To address this need, a prototype Organic Processor Assembly (OPA) was developed through collaboration between the University of South Florida (USF) and NASA’s Kennedy Space Center (KSC). The OPA is based on the anaerobic membrane bioreactor (AnMBR), a hybrid technology coupling high-rate anaerobic digestion with membrane filtration. The system is designed for an early planetary base (EPB) scenario to aid in closing the resource recovery loop and decreaseresupply dependence. This presentation discusses initial research pertaining to: 1) design challenges in maximizing hydraulic/organic throughputandReliability, Availability, Maintainability, and Safety(RAMS)while minimizingmass and volume; 2) create capabilities for treating simulated high solids waste under steady and non-steady state conditions; and 3) measuresolids performance parameter(s). Future research and development pertaining to further optimization on system operation, performance, and expanded treatment capabilities arepresented.

Bioreactor↗
DOE OSTI2024

Characterization of throughput on the AXI DMA bus for burst data transfer over Ethernet

cThe Xilinx AXI Direct Memory Access (AXI DMA) module is an efficient solution for medium-speed data transfer in Xilinx SoC FPGAs, supporting data rates greater than 1000 Gbps even in very suboptimal operating modes. It facilitates direct transfer of AXI stream data into processor memory without constant software intervention, which reduces overhead and ensures consistent data logging. By utilizing the FPGA's available memory, large circular buffers (1-5 GiB) are used to buffer data and accommodate network limitations, enabling high-rate data bursts. In this study, we measured the performance of AXI DMA under conditions simulating its lowest practical data transfer speeds. The Arbitrary Length Data Sender was used to transmit AXI stream packets at 32-bit width and 100 MHz frequency, a narrow width and slow speed. Results show that the AXI DMA can transfer up to 3192.76 Mbps with large packet sizes but experiences reduced performance for smaller packets, as low as 2.6 Mbps for 4-byte packets. For Ethernet-limited applications, packet sizes between 8,000 and 16,000 bytes provided optimal transfer speeds of 874 to 1600 Mbps. These findings suggest that the AXI DMA is not the limiting factor in systems where packet sizes exceed 8,000 bytes.

43 PARTICLE ACCELERATORS↗
NASA NTRS1991

Computational needs survey of NASA automation and robotics missions. Volume 1: Survey and results

NASA's operational use of advanced processor technology in space systems lags behind its commercial development by more than eight years. One of the factors contributing to this is that mission computing requirements are frequently unknown, unstated, misrepresented, or simply not available in a timely manner. NASA must provide clear common requirements to make better use of available technology, to cut development lead time on deployable architectures, and to increase the utilization of new technology. A preliminary set of advanced mission computational processing requirements of automation and robotics (A&R) systems are provided for use by NASA, industry, and academic communities. These results were obtained in an assessment of the computational needs of current projects throughout NASA. The high percent of responses indicated a general need for enhanced computational capabilities beyond the currently available 80386 and 68020 processor technology. Because of the need for faster processors and more memory, 90 percent of the polled automation projects have reduced or will reduce the scope of their implementation capabilities. The requirements are presented with respect to their targeted environment, identifying the applications required, system performance levels necessary to support them, and the degree to which they are met with typical programmatic constraints. Volume one includes the survey and results. Volume two contains the appendixes.

Davis, Gloria J.↗
DOE OSTI2024

ARQUIN: Architectures for Multinode Superconducting Quantum Computers

Many proposals to scale quantum technology rely on modular or distributed designs wherein individual quantum processors, called nodes, are linked together to form one large multinode quantum computer (MNQC). One scalable method to construct an MNQC is using superconducting quantum systems with optical interconnects. However, internode gates in these systems may be two to three orders of magnitude noisier and slower than local operations. Surmounting the limitations of internode gates will require improvements in entanglement generation, use of entanglement distillation, and optimized software and compilers. Still, it remains unclear what performance is possible with current hardware and what performance algorithms require. In this article, we employ a systems analysis approach to quantify overall MNQC performance in terms of hardware models of internode links, entanglement distillation, and local architecture. We show how to navigate tradeoffs in entanglement generation and distillation in the context of algorithm performance, lay out how compilers and software should balance between local and internode gates, and discuss when noisy quantum internode links have an advantage over purely classical links. Here, we find that a factor of 10–100× better link performance is required and introduce a research roadmap for the co-design of hardware and software towards the realization of early MNQCs. While we focus on superconducting devices with optical interconnects, our approach is general across MNQC implementations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS1991

Computational needs survey of NASA automation and robotics missions. Volume 2: Appendixes

NASA's operational use of advanced processor technology in space systems lags behind its commercial development by more than eight years. One of the factors contributing to this is the fact that mission computing requirements are frequency unknown, unstated, misrepresented, or simply not available in a timely manner. NASA must provide clear common requirements to make better use of available technology, to cut development lead time on deployable architectures, and to increase the utilization of new technology. Here, NASA, industry and academic communities are provided with a preliminary set of advanced mission computational processing requirements of automation and robotics (A and R) systems. The results were obtained in an assessment of the computational needs of current projects throughout NASA. The high percent of responses indicated a general need for enhanced computational capabilities beyond the currently available 80386 and 68020 processor technology. Because of the need for faster processors and more memory, 90 percent of the polled automation projects have reduced or will reduce the scope of their implemented capabilities. The requirements are presented with respect to their targeted environment, identifying the applications required, system performance levels necessary to support them, and the degree to which they are met with typical programmatic constraints. Here, appendixes are provided.

Davis, Gloria J.↗
NASA NTRS1997

Fast Context Switching in Real-Time Propositional Reasoning

The trend to increasingly capable and affordable control processors has generated an explosion of embedded real-time gadgets that serve almost every function imaginable. The daunting task of programming these gadgets is greatly alleviated with real-time deductive engines that perform all execution and monitoring functions from a single core model, Fast response times are achieved using an incremental propositional deductive database (an LTMS). Ideally the cost of an LTMS's incremental update should be linear in the number of labels that change between successive contexts. Unfortunately an LTMS can expend a significant percentage of its time working on labels that remain constant between contexts. This is caused by the LTMS's conservative approach: a context switch first removes all consequences of deleted clauses, whether or not those consequences hold in the new context. This paper presents a more aggressive incremental TMS, called the ITMS, that avoids processing a significant number of these consequences that are unchanged. Our empirical evaluation for spacecraft control shows that the overhead of processing unchanged consequences can be reduced by a factor of seven.

Nayak, P. Pandurang↗
NASA NTRS2004

Thermal Insulation Testing Method and Apparatus

A test apparatus and method of its use for evaluating various performance aspects of a test specimen is disclosed. A chamber within a housing contains a cold mass tank with a contact surface in contact with a first surface of a test specimen. The first surface of the test specimen is spaced from the second surface of the test specimen by a thickness. The second surface of the test specimen is maintained at a a constant temperature by a liquid disposed within the cold mass tank. A boil-off flow rate of the gas is monitored and provided to a processor along with the temperature of the first and second surfaces of the test specimen. The processor calculates thermal insulation values of the test specimen including comparative values for heat flux and apparent thermal conductivity k-value). The test specimen may be placed in any vacuum pressure level ranging from about 0.01 millitorr to 1,000,000 millitorr with different residual gases as desired. The test specimen may be placed under a mechanical load with the cold mass tank and another factors may be imposed upon the test specimen so as to simulate the actual use conditions.

Fesmire, James E.↗