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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS2013

NASA Tech Briefs, September 2013

Topics include: ISS Ammonia Leak Detection Through X-Ray Fluorescence; A System for Measuring the Sway of the Vehicle Assembly Building; Fast, High-Precision Readout Circuit for Detector Arrays; Victim Simulator for Victim Detection Radar; Hydrometeor Size Distribution Measurements by Imaging the Attenuation of a Laser Spot; Quasi-Linear Circuit; High-Speed, High-Resolution Time-to-Digital Conversion; Li-Ion Battery and Supercapacitor Hybrid Design for Long Extravehicular Activities; Ultrasonic Low-Friction Containment Plate for Thermal and Ultrasonic Stir Weld Processes; High-Powered, Ultrasonically Assisted Thermal Stir Welding; Next-Generation MKIII Lightweight HUT/Hatch Assembly; Centrifugal Sieve for Gravity-Level-Independent Size; Segregation of Granular Materials; Ion Exchange Technology Development in Support of the Urine Processor Assembly; Nickel-Graphite Composite Compliant Interface and/or Hot Shoe Material; UltraSail CubeSat Solar Sail Flight Experiment; Mechanism for Deploying a Long, Thin-Film Antenna From a Rover; Counterflow Regolith Heat Exchanger; Acquisition and Retaining Granular Samples via a Rotating Coring Bit; Very-Low-Cost, Rugged Vacuum System; Medicine Delivery Device With Integrated Sterilization and Detection; FRET-Aptamer Assays for Bone Marker Assessment, C-Telopeptide, Creatinine, and Vitamin D; Multimode Directional Coupler for Utilization of Harmonic Frequencies from TWTAs; Dual-Polarization, Multi-Frequency Antenna Array for use with Hurricane Imaging Radiometer; Complementary Barrier Infrared Detector (CBIRD) Contact Methods; Autonomous Control of Space Nuclear Reactors; High-Power, High-Speed Electro-Optic Pockels Cell Modulator; Covariance Analysis Tool (G-CAT) for Computing Ascent, Descent, and Landing Errors; Enigma Version 12; Micrometeoroid and Orbital Debris (MMOD) Shield Ballistic Limit Analysis Program; Spitzer Telemetry Processing System; Planetary Protection Bioburden Analysis Program; Wing Leading Edge RCC Rapid Response Damage Prediction Tool (IMPACT2); ISSM: Ice Sheet System Model; Automated Loads Analysis System (ATLAS); Integrated Main Propulsion System Performance Reconstruction Process/Models. Phoenix Telemetry Processor; Contact Graph Routing Enhancements Developed in ION for DTN; GFEChutes Lo-Fi; Advanced Strategic and Tactical Relay Request Management for the Mars Relay Operations Service; Software for Generating Troposphere Corrections for InSAR Using GPS and Weather Model Data; Ionospheric Specifications for SAR Interferometry (ISSI); Implementation of a Wavefront-Sensing Algorithm; Sally Ride EarthKAM - Automated Image Geo-Referencing Using Google Earth Web Plug-In; Trade Space Specification Tool (TSST) for Rapid Mission Architecture (Version 1.2); Acoustic Emission Analysis Applet (AEAA) Software; Memory-Efficient Onboard Rock Segmentation; Advanced Multimission Operations System (ATMO); Robot Sequencing and Visualization Program (RSVP); Automating Hyperspectral Data for Rapid Response in Volcanic Emergencies; Raster-Based Approach to Solar Pressure Modeling; Space Images for NASA JPL Android Version; Kinect Engineering with Learning (KEWL); Spacecraft 3D Augmented Reality Mobile App; MPST Software: grl_pef_check; Real-Time Multimission Event Notification System for Mars Relay; SIM_EXPLORE: Software for Directed Exploration of Complex Systems; Mobile Timekeeping Application Built on Reverse-Engineered JPL Infrastructure; Advanced Query and Data Mining Capabilities for MaROS; Jettison Engineering Trajectory Tool; MPST Software: grl_suppdoc; PredGuid+A: Orion Entry Guidance Modified for Aerocapture; Planning Coverage Campaigns for Mission Design and Analysis: CLASP for DESDynl; and Space Place Prime.

Source record↗
NASA NTRS2014

High Fidelity CFD Analysis and Validation of Rotorcraft Gearbox Aerodynamics Under Operational and Oil-Out Conditions

This document represents the evolving formal documentation of the NPHASE-PSU computer code. Version 3.15 is being delivered along with the software to NASA in 2013.Significant upgrades to the NPHASE-PSU have been made since the first delivery of draft documentation to DARPA and USNRC in 2006. These include a much lighter, faster and memory efficient face based front end, support for arbitrary polyhedra in front end, flow-solver and back-end, a generalized homogeneous multiphase capability, and several two-fluid modelling and algorithmic elements. Specific capability installed for the NASA Gearbox Windage Aerodynamics NRA are included in this version: Hybrid Immersed Overset Boundary Method (HOIBM) [Noack et. al (2009)] Periodic boundary conditions for multiple frames of reference, Fully generalized immersed boundary method, Fully generalized conjugate heat transfer, Droplet deposition, bouncing, splashing models, and, Film transport and breakup.

Gears↗
NASA NTRS2013

Assessing the Performance Limits of Internal Coronagraphs Through End-to-End Modeling

As part of the NASA ROSES Technology Demonstrations for Exoplanet Missions (TDEM) program, we conducted a numerical modeling study of three internal coronagraphs (PIAA, vector vortex, hybrid bandlimited) to understand their behaviors in realistically-aberrated systems with wavefront control (deformable mirrors). This investigation consisted of two milestones: (1) develop wavefront propagation codes appropriate for each coronagraph that are accurate to 1% or better (compared to a reference algorithm) but are also time and memory efficient, and (2) use these codes to determine the wavefront control limits of each architecture. We discuss here how the milestones were met and identify some of the behaviors particular to each coronagraph. The codes developed in this study are being made available for community use. We discuss here results for the HBLC and VVC systems, with PIAA having been discussed in a previous proceeding.

Inner working angle (IWA)↗
NASA NTRSDate not supplied

Avoiding Selection Bias in Generating Examples of Plans in the Presence of Heuristic Error

It is generally understood that heuristic error hurts the performance of search algorithms, measured in terms of search effort. Hence there is an interest in understanding how to reduce heuristic error. One way to do this is to learn a heuristic from a set of examples of plans generated offline, e.g. bootstrapping methods. In this paper, we consider how some methods for generating examples of plans may skew the training set in the presence of heuristic errors. Initial theoretical results show that duplicate detection is one source of selection bias in the canonical A* algorithm. We introduce a duplicate selection scheme for A* that avoids selection bias in generating cost-optimal examples, without compromising memory efficiency, and develop ideas in the satisficing setting. We evaluate our approach on n x m grids with multiple cost-optimal solutions and synthetic heuristic error. Finally, we attempt to extend these ideas to the problem of generating extreme examples of plans.

Alison S Paredes↗
DOE OSTI2021

Preparing an Incompressible-Flow Fluid Dynamics Code for Exascale-Class Wind Energy Simulations: Preprint

The US Department of Energy has identified Exascale-Class wind farm simulation tools as critical to wind energy scientific discovery. A primary objective of the Exawind project is to build high-performance, predictive Computational Fluid Dynamics tools that satisfy these modeling needs. GPU accelerators will serve as the computational thoroughbreds of next generation, Exascale-Class, platforms. Here, we report on our efforts for preparing the Exawind unstructured mesh solver, Nalu-Wind, for Exascale-Class machines. For computing at this scale, a simple port of the incompressible-flow algorithms to GPUs is not sufficient. One needs novel algorithms that are application aware, memory efficient, and optimized for latest generation GPU devices to get high-performance. The result of our efforts are unstructured mesh simulations of wind turbines that use 1/6 the compute resources of Summit supercomputer at Oak Ridge National Lab. In particular, we demonstrate a first-of-its-kind, simulation using Algebraic Multigrid solvers on over 4000 GPUs.

algebraic multigrid↗
DOE OSTI2022

Memory and CPU efficient coherent mode decomposition of partially coherent synchrotron radiation with subtraction of common quadratic phase terms

Application examples of a memory and CPU efficient coherent mode decomposition (CMD) method for wave-optics based simulation of the partially coherent undulator radiation propagation through a hard X-ray beamline in a 3rd generation synchrotron radiation source are presented. The high efficiency of the method is achieved thanks to the analytical treatment of the common quadratic phase terms that are developed in the phase of cross-spectral density (CSD) of partially coherent radiation at a distance from source. This treatment allows for a considerable, several orders of magnitude, reduction of the 4D CSD mesh density (and the memory occupied by the CSD) required for ensuring sufficient accuracies of wavefront propagation simulations with the modes produced by the CMD at a beamline entrance. This method, implemented in the “Synchrotron Radiation Workshop” open-source software, dramatically increases the feasibility of the CMD of 4D CSD for producing 2D coherent modes for a large variety of applications at storage rings and other types of radiation sources.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Ultraefficient resistance switching between charge ordered phases in 1 T -TaS 2 with a single picosecond electrical pulse

Progress in high-performance computing demands significant advances in memory technology. Among novel memory technologies that promise efficient device operation on a sub-ns timescale, resistance switching between charge ordered phases of 1T-TaS 2 has shown to be potentially useful for development of high-speed, energy efficient nonvolatile memory devices. Measurement of the electrical operation of such devices in the picosecond regime is technically challenging and hitherto still largely unexplored. Here, we use an optoelectronic “laboratory-on-a-chip” experiment for measurement of ultrafast memory switching, enabling accurate measurement of electrical switching parameters with 100 fs temporal resolution. Photoexcitation and electro-optic sampling on a (Cd,Mn)Te substrate are used to generate and, subsequently, measure electrical pulse propagation with intra-band excitation and sub-gap probing, respectively. We demonstrate high contrast nonvolatile resistance switching from high to low resistance states of a 1T-TaS 2 device using single sub-2ps electrical pulses. Using detailed modeling, we find that the switching energy density per unit area is exceptionally small, E A =9.4 fJ/μm 2 . Finally, the speed and energy efficiency of an electronic “write” process place the 1T-TaS 2 devices into a category of their own among new generation nonvolatile memory devices.

42 ENGINEERING↗
DOE OSTI2022

Memory access response merging in a memory hierarchy

A system and method for efficiently processing memory requests are described. A computing system includes multiple compute units, multiple caches of a memory hierarchy and a communication fabric. A compute unit generates a memory access request that misses in a higher level cache, which sends a miss request to a lower level shared cache. During servicing of the miss request, the lower level cache merges identification information of multiple memory access requests targeting a same cache line from multiple compute units into a merged memory access response. The lower level shared cache continues to insert information into the merged memory access response until the lower level shared cache is ready to issue the merged memory access response. An intermediate router in the communication fabric broadcasts the merged memory access response into multiple memory access responses to send to corresponding compute units.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Magnetic Switching in Monolayer 2D Diluted Magnetic Semiconductors via Spin‐to‐Spin Conversion

Abstract The integration of 2D van der Waals (vdW) magnets with topological insulators or heavy metals holds great potential for realizing next‐generation spintronic memory devices. However, achieving high‐efficiency spin–orbit torque (SOT) switching of monolayer vdW magnets at room temperature poses a significant challenge, particularly without an external magnetic field. Here, it is shown field‐free, deterministic, and nonvolatile SOT switching of perpendicular magnetization in the monolayer, diluted magnetic semiconductor (DMS), Fe‐doped MoS 2 (Fe:MoS 2 ) at up to 380 K with a current density of ≈7 × 10 4 A cm −2 . The in situ doping of Fe into monolayer MoS 2 via chemical vapor deposition and the geometry‐induced strain in the crystal break the rotational switching symmetry in Fe:MoS 2 , promoting field‐free SOT switching by generating out‐of‐plane spins via spin‐to‐spin conversion. An apparent anomalous Hall effect (AHE) loop shift at a zero in‐plane magnetic field verifies the existence of z spins in Fe:MoS 2 , inducing an antidamping‐like torque that facilitates field‐free SOT switching. This field‐free SOT application using a 2D ferromagnetic monolayer provides a new pathway for developing highly power‐efficient spintronic memory devices.

Chen, Siwei [Department of Mechanical Engineering ↗
NASA NTRS1989

Efficient ICCG on a shared memory multiprocessor

Different approaches are discussed for exploiting parallelism in the ICCG (Incomplete Cholesky Conjugate Gradient) method for solving large sparse symmetric positive definite systems of equations on a shared memory parallel computer. Techniques for efficiently solving triangular systems and computing sparse matrix-vector products are explored. Three methods for scheduling the tasks in solving triangular systems are implemented on the Sequent Balance 21000. Sample problems that are representative of a large class of problems solved using iterative methods are used. We show that a static analysis to determine data dependences in the triangular solve can greatly improve its parallel efficiency. We also show that ignoring symmetry and storing the whole matrix can reduce solution time substantially.

Hammond, Steven W.↗
NASA NTRS1993

Technical support for digital systems technology development. Task order 1: ISP contention analysis and control

Alternatives for realizing a packet-based network switch for use on a frequency division multiple access/time division multiplexed (FDMA/TDM) geostationary communication satellite were investigated. Each of the eight downlink beams supports eight directed dwells. The design needed to accommodate multicast packets with very low probability of loss due to contention. Three switch architectures were designed and analyzed. An output-queued, shared bus system yielded a functionally simple system, utilizing a first-in, first-out (FIFO) memory per downlink dwell, but at the expense of a large total memory requirement. A shared memory architecture offered the most efficiency in memory requirements, requiring about half the memory of the shared bus design. The processing requirement for the shared-memory system adds system complexity that may offset the benefits of the smaller memory. An alternative design using a shared memory buffer per downlink beam decreases circuit complexity through a distributed design, and requires at most 1000 packets of memory more than the completely shared memory design. Modifications to the basic packet switch designs were proposed to accommodate circuit-switched traffic, which must be served on a periodic basis with minimal delay. Methods for dynamically controlling the downlink dwell lengths were developed and analyzed. These methods adapt quickly to changing traffic demands, and do not add significant complexity or cost to the satellite and ground station designs. Methods for reducing the memory requirement by not requiring the satellite to store full packets were also proposed and analyzed. In addition, optimal packet and dwell lengths were computed as functions of memory size for the three switch architectures.

Stehle, Roy H.↗
DOE OSTI2025

Optimizing Management of Persistent Data Structures in High-Performance Analytics

Large-scale data analytics workflows ingest massive input data into various data structures, including graphs and key-value datastores. These data structures undergo multiple transformations and computations and are typically reused in incremental and iterative analytics workflows. Persisting in-memory views of these data structures enables reusing them beyond the scope of a single program run while avoiding repetitive raw data ingestion overheads. Memory-mapped I/O enables persisting in-memory data structures without data serialization and deserialization overheads. However, memory-mapped I/O lacks the key feature of persisting consistent snapshots of these data structures for incremental ingestion and processing. The obstacles to efficient virtual memory snapshots using memory-mapped I/O include background writebacks outside the application’s control, and the significantly high storage footprint of such snapshots. To address these limitations, we present Privateer, a memory and storage management tool that enables storage-efficient virtual memory snapshotting while also optimizing snapshot I/O performance. Here, we integrated Privateer into Metall, a state-of-the-art persistent memory allocator for C++, and the Lightning Memory-Mapped Database (LMDB), a widely-used key-value datastore in data analytics and machine learning. Privateer optimized application performance by 1.22× when storing data structure snapshots to node-local storage, and up to 16.7× when storing snapshots to a parallel file system. Privateer also optimizes storage efficiency of incremental data structure snapshots by up to 11× using data deduplication and compression.

Computer science↗
NASA NTRS2007

Distributed Saturation

The Saturation algorithm for symbolic state-space generation, has been a recent break-through in the exhaustive veri cation of complex systems, in particular globally-asyn- chronous/locally-synchronous systems. The algorithm uses a very compact Multiway Decision Diagram (MDD) encoding for states and the fastest symbolic exploration algo- rithm to date. The distributed version of Saturation uses the overall memory available on a network of workstations (NOW) to efficiently spread the memory load during the highly irregular exploration. A crucial factor in limiting the memory consumption during the symbolic state-space generation is the ability to perform garbage collection to free up the memory occupied by dead nodes. However, garbage collection over a NOW requires a nontrivial communication overhead. In addition, operation cache policies become critical while analyzing large-scale systems using the symbolic approach. In this technical report, we develop a garbage collection scheme and several operation cache policies to help on solving extremely complex systems. Experiments show that our schemes improve the performance of the original distributed implementation, SmArTNow, in terms of time and memory efficiency.

Chung, Ming-Ying↗
NASA NTRS2002

Very Large Scale Optimization

The purpose of this research under the NASA Small Business Innovative Research program was to develop algorithms and associated software to solve very large nonlinear, constrained optimization tasks. Key issues included efficiency, reliability, memory, and gradient calculation requirements. This report describes the general optimization problem, ten candidate methods, and detailed evaluations of four candidates. The algorithm chosen for final development is a modern recreation of a 1960s external penalty function method that uses very limited computer memory and computational time. Although of lower efficiency, the new method can solve problems orders of magnitude larger than current methods. The resulting BIGDOT software has been demonstrated on problems with 50,000 variables and about 50,000 active constraints. For unconstrained optimization, it has solved a problem in excess of 135,000 variables. The method includes a technique for solving discrete variable problems that finds a "good" design, although a theoretical optimum cannot be guaranteed. It is very scalable in that the number of function and gradient evaluations does not change significantly with increased problem size. Test cases are provided to demonstrate the efficiency and reliability of the methods and software.

Vanderplaats, Garrett↗
DOE OSTI2020

Performance Potential of Mixed Data Management Modes for Heterogeneous Memory Systems

Many high-performance systems now include different types of memory devices within the same compute platform to meet strict performance and cost constraints. Such heterogeneous memory systems often include an upper-level tier with better performance, but limited capacity, and lower-level tiers with higher capacity, but less bandwidth and longer latencies for reads and writes. To utilize the different memory layers efficiently, current systems rely on hardware-directed, memory -side caching or they provide facilities in the operating system (OS) that allow applications to make their own data-tier assignments. Since these data management options each come with their own set of trade-offs, many systems also include mixed data management configurations that allow applications to employ hardware- and software-directed management simultaneously, but for different portions of their address space. Despite the opportunity to address limitations of stand-alone data management options, such mixed management modes are under-utilized in practice, and have not been evaluated in prior studies of complex memory hardware. In this work, we develop custom program profiling, configurations, and policies to study the potential of mixed data management modes to outperform hardware- or software-based management schemes alone. Our experiments, conducted on an Intel ® Knights Landing platform with high-bandwidth memory, demonstrate that the mixed data management mode achieves the same or better performance than the best stand-alone option for five memory intensive benchmark applications (run separately and in isolation), resulting in an average speedup compared to the best stand-alone policy of over 10 %, on average.

Effler, Chad↗
DOE OSTI2025

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study of these two architectures under both dimensional scaling ( XY/Z shrinkage) and vertical integration (increasing stacked capacitors per cell). Using technology computer-aided design (TCAD) and circuit-level simulations, we analyze how scaling impacts ferroelectric capacitance, parasitic coupling, and floating-node (FN) dynamics, which together dictate sense margin (SM) and read stability. A key mitigation strategy—floating unselected capacitors—is applied to both architectures, effectively decoupling the SM from the number of stacked capacitors and enabling tractable analysis across scaling regimes. Results show that 1T-nC suffers more from charge sharing with the bitline (BL), while 2T-nC benefits from transistor isolation and stronger low-voltage sensing at the cost of increased area. By systematically evaluating these behaviors across scaling directions, this work establishes the reliability trade-offs of 1T-nC and 2T-nC cells and provides design guidelines for high-density, vertically integrated FeRAM systems.

1T-nC↗