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At least 109 records · Page 6

NASA Electronic Parts & Packaging (NEPP) Program

The purpose of this presentation is to familiarize the people attending the JEDEC work meetings about the NEPP Program, and recent tasks we have undertaken. There is a description of the policy and testing guidelines in development and an explanation of the Government Working Group, a collaboration of several US government space agencies that come together to discuss topics relating to the reliable use of electronics. The presentation also includes a brief description of recent NASA accomplishments such as the launching/splash down of the SpaceX Crew Dragon and the launch of the next Mars rover.

reliability↗

NASA Electronic Parts & Packaging (NEPP) Program

The purpose of this presentation is to familiarize the people attending the JEDEC work meetings about the NEPP Program, and recent tasks we have undertaken. There is a description of the policy and testing guidelines in development and an explanation of the Government Working Group, a collaboration of several US government space agencies that come together to discuss topics relating to the reliable use of electronics. The presentation also includes a brief description of NASA events such as the landing of the next Mars rover in Feb 2021.

reliability↗

3D X-ray CT for BGA/CGA Workmanship Defect Detection

Commercial-off-the-shelf (COTS) advanced microelectronic technologies in high-reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. One of the key drawbacks of advanced electronic packages with hidden solder joint interconnections, such as the column grid array (CGA), is that inspection can be challenging—whether visually or using X-rays. In general, inspection for solder joint integrity is poor, except for identifying shorts. The new, advanced X-ray systems, especially the 3D computer tomography version, may be able to provide the three-dimensional features that are extremely difficult to resolve under the 2D systems.This report presents both 2D and 3D X-ray images along with their representative optical photomicrographs for a number of advanced electronics package assemblies including 3D stack and CGA assemblies before and after thermal cycling.

Ghaffarian, Reza↗

Packaging for Spacecraft and Its Commercial Implications

This paper discusses aspects of electronic packaging which are critical to MEMS devices and in particular, of extreme importance to packaging devices which are intended for use aboard spacecraft.

Microeletromechanical electronic packaging MEMS↗

The NASA Electronic Parts and Packaging (NEPP) Program: NEPP Overview - Automotive Electronics

The results of NASAs studies into the appropriateness of using U.S. Automotive electronic parts in NASA spaceflight systems will be presented. The first part of the presentation provides an overview of the United States Automotive Electronics Council's AECQ standardization program, the second part provides a summary of the results of NASA's procurement and testing experiences and other lessons learned along with preliminary test results.

Reliability↗

Tool for use in lifting pin supported objects

A tool for use in lifting a pin-supported, electronic package mounted in juxtaposition with the surface of an electronic circuit board is described. The tool is configured to be received beneath a pin-supported package and is characterized by a manually operable linkage, including an elongated, rigid link is supported for axial reciprocation and a pivotal link pinned to the body and supported for oscillation induced in response to axial motion imparted to the rigid link. A lifting plate is pivotally coupled to the distal end of the pivotal link so that oscillatory motion imparted to the pivotal link serves to move the plate vertically for elevating the plate into lifting engagement with the electronic package positioned thereabove.

Marzek, R. A.↗

System Miniaturization Via Heterogeneous Integration of Electronic Devices for Deep Space Missions

The scientific devices designed for each of the Outer Planets Program Focuses will likely be groundbreaking not only with respect to their scientific role but also regarding the electronics required to perform such investigations. In the past, the performance of packaged electronics was limited by the components themselves, with minimal influence of the packaging technology. The rapid development of integrated circuit technology, however, has drastically increased the importance of packaging technology in the ultimate performance of devices. If not carefully considered in the overall design, the packaging may become the limiting factor in the operation of the system. Although industry is responsible for several significant accomplishments in the field of electronics packaging, deep space/outer planet missions must take into account additional requirements such as extremely low temperatures, high radiation levels, hermetic sealing, and severe size and weight limitations. Therefore, the present investigation has been designed to meet the needs of NASA's sensor intensive outer planets program by combining (using flip chip technology) an array of devices (including analog, digital, power volt-age, passives, and MEMS) into a miniaturized heterogeneous system and utilizing optical buses to enable autonomy. Additional information is contained in the original extended abstract.

DelCastillo, L.↗

JTEC Panel report on electronic manufacturing and packaging in Japan

This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies.

Kelly, Michael J.↗

Electronic manufacturing and packaging in Japan

This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies. Japan has established this marked competitive advantage in electronics as a consequence of developing low-cost, high-volume consumer products. Japan's infrastructure, and the remarkable cohesiveness of vision and purpose in government and industry, are key factors in the success of Japan's electronics industry. Although Japan will continue to dominate consumer electronics in the foreseeable future, opportunities exist for the United States and other industrial countries to capture an increasingly large part of the market. The JTEC panel has identified no insurmountable barriers that would prevent the United States from regaining a significant share of the consumer electronics market; in fact, there is ample evidence that the United States needs to aggressively pursue high-volume, low-cost electronic assembly, because it is a critical path leading to high-performance electronic systems.

Kelly, Michael J.↗