CSPs Assembly Reliability
Availability of board solder joint reliability information is critical to the wider implementation of Chip Scale Packages (CSPs).
Reliability↗
SEARCH · Engineering Papers
Results for “SOLDERED JOINT”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Column Grid Array Rework for High Reliability
Due to requirements for reduced size and weight, use of grid array packages in space applications has become common place. To meet the requirement of high reliability and high number of I/Os, ceramic column grid array packages (CCGA) were selected for major electronic components used in next MARS Rover mission (specifically high density Field Programmable Gate Arrays). ABSTRACT The probability of removal and replacement of these devices on the actual flight printed wiring board assemblies is deemed to be very high because of last minute discoveries in final test which will dictate changes in the firmware. The questions and challenges presented to the manufacturing organizations engaged in the production of high reliability electronic assemblies are, Is the reliability of the PWBA adversely affected by rework (removal and replacement) of the CGA package? and How many times can we rework the same board without destroying a pad or degrading the lifetime of the assembly? To answer these questions, the most complex printed wiring board assembly used by the project was chosen to be used as the test vehicle, the PWB was modified to provide a daisy chain pattern, and a number of bare PWB s were acquired to this modified design. Non-functional 624 pin CGA packages with internal daisy chained matching the pattern on the PWB were procured. The combination of the modified PWB and the daisy chained packages enables continuity measurements of every soldered contact during subsequent testing and thermal cycling. Several test vehicles boards were assembled, reworked and then thermal cycled to assess the reliability of the solder joints and board material including pads and traces near the CGA. The details of rework process and results of thermal cycling are presented in this paper.
high reliability↗
NASA-DoD Lead-Free Electronics Project
Original Equipment Manufacturers (OEMs), depots, and support contract ors have to be prepared to deal with an electronics supply chain that increasingly provides parts with lead-free finishes, some labeled no differently and intermingled with their SnPb counterparts. Allowance of lead-free components presents one of the greatest risks to the r eliability of military and aerospace electronics. The introduction of components with lead-free terminations, termination finishes, or cir cuit boards presents a host of concerns to customers, suppliers, and maintainers of aerospace and military electronic systems such as: 1. Electrical shorting due to tin whiskers 2. Incompatibility of lead-f ree processes and parameters (including higher melting points of lead -free alloys) with other materials in the system 3. Unknown material properties and incompatibilities that could reduce solder joint reli ability As the transition to lead-free becomes a certain reality for military and aerospace applications, it will be critical to fully un derstand the implications of reworking lead-free assemblies.
Kessel, Kurt↗
NASA TEERM Hexavalent Chrome Alternatives Projects
The overall objective of the Hex Chrome Free Coatings for Electronics project is to evaluate and test pretreatment coating systems not containing hexavalent chrome in avionics and electronics housing applications. This objective will be accomplished by testing strong performing coating systems from prior NASA and DoD testing or new coating systems as determined by the stakeholders. The technical stakeholders have agreed that this protocol will focus specifically on Class 3 coatings. Original Equipment Manufacturers (OEMs), depots, and support contractors have to be prepared to deal with an electronics supply chain that increasingly provides parts with lead-free finishes, some labeled no differently and intermingled with their SnPb counterparts. Allowance of lead-free components presents one of the greatest risks to the reliability of military and aerospace electronics. The introduction of components with lead-free terminations, termination finishes, or circuit boards presents a host of concerns to customers, suppliers, and maintainers of aerospace and military electronic systems such as: 1. Electrical shorting due to tin whiskers 2. Incompatibility of lead-free processes and parameters (including higher melting points of lead-free alloys) with other materials in the system 3. Unknown material properties and incompatibilities that could reduce solder joint reliability
Kessel, Kurt R.↗
NASA-DoD Lead-Free Electronics Project
Original Equipment Manufacturers (OEMs). depots. and support contractors have to be prepared to deal with an electronics supply chain thaI increasingly provides parts with lead-free finishes. some labeled no differently and intenningled with their SnPb counterparts. Allowance oflead-free components presents one of the greatest risks to the reliability of military and aerospace electronics. The introduction of components with lead-free lenninations, tennination finishes, or circuit boards presents a host of concerns to customers. suppliers, and maintainers of aerospace and military electronic systems such as: 1. Electrical shorting due to tin whiskers; 2. Incompatibility oflead-free processes and parameters (including higher melting points of lead-free alloys) with other materials in the system; and 3. Unknown material properties and incompatibilities that could reduce solder joint re liability.
Kessel, Kurt↗
Soldering in a Reduced Gravity Environment (SoRGE)
Future long-duration human exploration missions will be challenged by constraints on mass and volume allocations available for spare parts. Addressing this challenge will be critical to the success of these missions. As a result, it is necessary to consider new approaches to spacecraft maintenance and repair that reduce the need for large replacement components. Currently, crew members on the International Space Station (ISS) recover from faults by removing and replacing, using backup systems, or living without the function of Orbital Replacement Units (ORUs). These ORUs are returned to a depot where the root cause of the failure is determined and the ORU is repaired. The crew has some limited repair capability with the Modulation/DeModulation (MDM) ORU, where circuit cards are removed and replace in faulty units. The next step to reducing the size of the items being replaced would be to implement component-level repair. This mode of repair has been implemented by the U.S. Navy in an operational environment and is now part of their standard approach for maintenance. It is appropriate to consider whether this approach can be adapted for future spaceflight operations. To this end, the Soldering in a Reduced Gravity Environment (SoRGE) experiment studied the effect of gravity on the formation of solder joints on electronic circuit boards. This document describes the SoRGE experiment, the analysis methods, and results to date. This document will also contain comments from the crew regarding their experience conducting the SoRGE experiment as well as recommendations for future improvements. Finally, this document will discuss the plans for the SoRGE samples which remain on ISS.
Easton, John W.↗
Lead-Free Experiment in a Space Environment
This Technical Memorandum addresses the Lead-Free Technology Experiment in Space Environment that flew as part of the seventh Materials International Space Station Experiment outside the International Space Station for approximately 18 months. Its intent was to provide data on the performance of lead-free electronics in an actual space environment. Its postflight condition is compared to the preflight condition as well as to the condition of an identical package operating in parallel in the laboratory. Some tin whisker growth was seen on a flight board but the whiskers were few and short. There were no solder joint failures, no tin pest formation, and no significant intermetallic compound formation or growth on either the flight or ground units.
Blanche, J. F.↗
Reliability of CCGA 1152 and CCGA 1272 Interconnect Packages for Extreme Thermal Environments
Ceramic column grid array (CCGA) packages have been increasing in use based on their advantages of high interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount packaging assembly processes. CCGA packages are used in space applications such as in logics and microprocessor functions, telecommunications, flight avionics, and payload electronics. As these packages tend to have less solder joint strain relief than leaded packages, the reliability of CCGA packages is very important for short- and long-term space missions. Certain planetary satellites require operations of thermally uncontrolled hardware under extremely cold and hot temperatures with large diurnal temperature change from day to night. The planetary protection requires the hardware to be baked at +125 C for 72 hours to kill microbugs to avoid any biological contamination, especially for sample return missions. Therefore, the present CCGA package reliability research study has encompassed the temperature range of 185 to +125 C to cover various NASA deep space missions. Advanced 1152 and 1272 CCGA packaging interconnects technology test hardware objects have been subjected to ex treme temperature thermal cycles from 185 to +125 C. X-ray inspections of CCGA packages have been made before thermal cycling. No anomalous behavior and process problems were observed in the x-ray images. The change in resistance of the daisy-chained CCGA interconnects was measured as a function of increasing number of thermal cycles. Electrical continuity measurements of daisy chains have shown no anomalies, even until 596 thermal cycles. Optical inspections of hardware have shown a significant fatigue for CCGA 1152 packages over CCGA 1272 packages. No catastrophic failures have been observed yet in the results. Process qualification and assembly are required to optimize the CCGA assembly processes. Optical inspections of CCGA boards have been made after 258 and 596 thermal cycles. Corner columns have started showing significant fatigue per optical inspection results.
Ramesham, Rajeshuni↗
Enabling More than Moore: Accelerated Reliability Testing and Risk Analysis for Advanced Electronics Packaging
For five decades, the semiconductor industry has distinguished itself by the rapid pace of improvement in miniaturization of electronics products-Moore's Law. Now, scaling hits a brick wall, a paradigm shift. The industry roadmaps recognized the scaling limitation and project that packaging technologies will meet further miniaturization needs or ak.a "More than Moore". This paper presents packaging technology trends and accelerated reliability testing methods currently being practiced. Then, it presents industry status on key advanced electronic packages, factors affecting accelerated solder joint reliability of area array packages, and IPC/JEDEC/Mil specifications for characterizations of assemblies under accelerated thermal and mechanical loading. Finally, it presents an examples demonstrating how Accelerated Testing and Analysis have been effectively employed in the development of complex spacecraft thereby reducing risk. Quantitative assessments necessarily involve the mathematics of probability and statistics. In addition, accelerated tests need to be designed which consider the desired risk posture and schedule for particular project. Such assessments relieve risks without imposing additional costs. and constraints that are not value added for a particular mission. Furthermore, in the course of development of complex systems, variances and defects will inevitably present themselves and require a decision concerning their disposition, necessitating quantitative assessments. In summary, this paper presents a comprehensive view point, from technology to systems, including the benefits and impact of accelerated testing in offsetting risk.
Ghaffarian, Reza↗
Body of Knowledge (BOK) for Leadless Quad Flat No-Lead/Bottom Termination Components (QFN/BTC) Package Trends and Reliability
Bottom terminated components and quad flat no-lead (BTC/QFN) packages have been extensively used by commercial industry for more than a decade. Cost and performance advantages and the closeness of the packages to the boards make them especially unique for radio frequency (RF) applications. A number of high-reliability parts are now available in this style of package configuration. This report presents a summary of literature surveyed and provides a body of knowledge (BOK) gathered on the status of BTC/QFN and their advanced versions of multi-row QFN (MRQFN) packaging technologies. The report provides a comprehensive review of packaging trends and specifications on design, assembly, and reliability. Emphasis is placed on assembly reliability and associated key design and process parameters because they show lower life than standard leaded package assembly under thermal cycling exposures. Inspection of hidden solder joints for assuring quality is challenging and is similar to ball grid arrays (BGAs). Understanding the key BTC/QFN technology trends, applications, processing parameters, workmanship defects, and reliability behavior is important when judicially selecting and narrowing the follow-on packages for evaluation and testing, as well as for the low risk insertion in high-reliability applications.
Ghaffarian, Reza↗
A Tale of Three Capacitor Problems
This talk will make a connection among several capacitor-related anomalies and failures that tie to some of the following conditions: reverse bias installation, cracked ceramic, and to minimal extent, elevated equivalent series resistance (ESR). In particular, we will briefly discuss anomalies we have experienced (1) in ground testing involving ceramic capacitors that had been hand soldered or had had touched-up solder joints, (2) in reverse-biased capacitors that have been operating for years on-orbit but that have experienced failures in ground operation and testing, and (3) in ceramic capacitors that exhibited an on-orbit latent defect resulting from cracks, and how these have come together. The talk will provide some lessons learned for recognizing and understanding anomalous behavior involving capacitors.
Anomalies↗
Thermal cycling testing to failure of a ceramic column grid array package for space applications
Ceramic column grid array (CCGA) packages have been used increasingly in logic and microprocessor functions, telecommunications, flight avionics boards, payload electronics boards, engineering navigational and science cameras, electronic assemblies, and other applications, because of their inherent advantages such as high electrical interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount technology (SMT) packaging assembly processes. Because these advanced electronic packages tend to have less solder-joint strain-relief than do leaded flat-pack electronic packages, the reliability of CCGA packages in challenging thermal environments is a very important consideration for their short- and long-term use in JPL-NASA space missions. In this study, we assembled daisy chains of polyimide printed wiring boards from CCGA-interconnect packages, inspected the boards nondestructively, and then subjected them to thermal cycling to assess their reliability in thermal environments from +125°C to -40°C±25°C. The test hardware consists of a CCGA 1752 package (CN version). The package was divided into four daisy-chained sections that were electrically monitored for their continuity during thermal cycling. The CCGA 1752 package is roughly 45 mm × 45 mm with a 42-mm × 42-mm array of 80%/20% Pb/Sn columns on a 1.00-mm pitch. The resistance of the daisy-chained CCGA interconnects was continuously monitored during thermal cycling in a gaseous nitrogen environment. Electrical continuity resistance measurements as a function of thermal cycling are reported here; tests to date have shown significant change to an open circuit in daisy-chain resistance as a function of thermal cycling. The change in interconnect resistance becomes increasingly noticeable with increasing number of thermal cycles. This paper describes the experimental thermal-cycling test results of CCGA 1752 package reliability testing under an extremely wide temperature range. The first failure was observed at 1479th thermal cycle. We report the thermal-cycle reliability test data for ~2500 thermal cycles.
Ramesham, Rajeshuni↗
Design of Rigid-Flex PCB Robotics Leveraging Validated Finite Element Simulations
The use of rigid-flex printed circuit board (PCB) as primary structure has the potential to reduce the weight and volume of robotic systems. In the case of robotics for interplanetary exploration, these systems can leverage origami-inspired folding for increased mobility options and reduced storage volume. Folding rigid-flex PCB robotics can be constructed with rigid PCB connected by short Nomex fabric hinges coupled with flex PCB ribbon cables that permits enhanced system flexibility and energy dissipation to promote impact survivability. This paper presents a design methodology of rigid-flex PCB systems with an emphasis on impact resistance. The design process considers solder joint adequacy, panel bending, and fracture using a finite element (FE) model. The proposed design methodology is developed using a case study with NASA JPL's Pop-Up Folding Flat Explorer Robot (PUFFER). First, the finite-element (FE) modeling methodology is presented with consideration to both frequency and time-domain modeling applications, which include operational self-contact analysis and high impact scenarios. The time-domain impact modeling methodology utilizes hyperelastic material properties for the Nomex hinges. This modeling method is validated using image correlation of PUFFER drop tests. A flowchart is presented to guide users through a validated Abaqus modeling procedure for highly flexible rigid-flex systems. Next, a case study is presented in which PUFFER is subject to drop heights representative of falls into Lunar pits and then the design is refined for a more optimum impact performance. Finally, the results of the case study are used to inform a generalized design methodology for rigid-flex PCB robotics subject to high-impact loads with the considerations presented.
John Bell↗
Design of Rigid-Flex PCB Robotics Leveraging Validated Finite Element Simulations
The use of rigid-flex printed circuit board (PCB) as primary structure has the potential to reduce the weight and volume of robotic systems. In the case of robotics for interplanetary exploration, these systems can leverage origamiinspired folding for increased mobility options and reduced storage volume. Folding rigid-flex PCB robotics can be constructed with rigid PCB connected by short Nomex fabric hinges coupled with flex PCB ribbon cables that permits enhanced system flexibility and energy dissipation to promote impact survivability. This paper presents a design methodology of rigidflex PCB systems with an emphasis on impact resistance. The design process considers solder joint adequacy, panel bending, and fracture using a finite element (FE) model. The proposed design methodology is developed using a case study with NASA JPL’s Pop-Up Folding Flat Explorer Robot (PUFFER). First, the finite-element (FE) modeling methodology is presented with consideration to both frequency and time-domain modeling applications, which include operational self-contact analysis and high impact scenarios. The time-domain impact modeling methodology utilizes hyperelastic material properties for the Nomex hinges. This modeling method is validated using image correlation of PUFFER drop tests. A flowchart is presented to guide users through a validated Abaqus modeling procedure for highly flexible rigid-flex systems. Next, a case study is presented in which PUFFER is subject to drop heights representative of falls into Lunar pits and then the design is refined for a more optimum impact performance. Finally, the results of the case study are used to inform a generalized design methodology for rigid-flex PCB robotics subject to high-impact loads with the considerations presented.
de la Croix, Jean-Pierre↗
Sterilizable electronic packaging, connectors, wires, and cabling accessories
Sterilization effects on soldered and welded joints, electronic equipment processes and materials, electric connectors, and wiring and cabling accessories
ELECTRONIC PACKAGING↗
Soldering tool heats workpieces and applies solder in one operation
Fountain-pen type soldering iron heats workpieces and applies solder to joints in densely packed electronics assemblies. The basic soldering tool is used with different-sized orifice tips, eliminating the need for an assortment of conventional soldering guns.
Gudkese, V. W.↗
NASA-DoD Lead-Free Electronics Project: Vibration Test
Vibration testing was conducted by Boeing Research and Technology (Seattle) for the NASA-DoD Lead-Free Electronics Solder Project. This project is a follow-on to the Joint Council on Aging Aircraft/Joint Group on Pollution Prevention (JCAA/JG-PP) Lead-Free Solder Project which was the first group to test the reliability of lead-free solder joints against the requirements of the aerospace/miLItary community. Twenty seven test vehicles were subjected to the vibration test conditions (in two batches). The random vibration Power Spectral Density (PSD) input was increased during the test every 60 minutes in an effort to fail as many components as possible within the time allotted for the test. The solder joints on the components were electrically monitored using event detectors and any solder joint failures were recorded on a Labview-based data collection system. The number of test minutes required to fail a given component attached with SnPb solder was then compared to the number of test minutes required to fail the same component attached with lead-free solder. A complete modal analysis was conducted on one test vehicle using a laser vibrometer system which measured velocities, accelerations, and displacements at one . hundred points. The laser vibrometer data was used to determine the frequencies of the major modes of the test vehicle and the shapes of the modes. In addition, laser vibrometer data collected during the vibration test was used to calculate the strains generated by the first mode (using custom software). After completion of the testing, all of the test vehicles were visually inspected and cross sections were made. Broken component leads and other unwanted failure modes were documented.
Woodrow, Thomas A.↗
Chip Scale Package and Assembly Joint Reliability
The popularity of emerging miniaturized Chip Scale Packages (CSPs) is rapidly growing because of their benefits and smaller size.
CSP Solder joint Reliability Thermal aging chip Sc↗