Neurophysiology
Neurophysiological research on contrast detectors, and insight into neuronal closed loops from shift register theory
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Results for “SHIFT REGISTER”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Selective video blanking technique
Adverse viewing effects caused by faulty photosensitive elements are eliminated. A linear maximal /or nonmaximal/ sequence generator gives a pseudorandom pulse train to selectively blank the display monitor during specified mosaic interrogation times. The outputs minimize the length of the required shift register generator.
Saboe, M. M.↗
Communications systems research - Combinatorial communication
Cross correlation of reverse maximal length shift register sequences
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Space applications of a minimization algorithm.
Minimization algorithm for switching systems synthesis, describing design of mass spectrometer curve function generator and autonomous shift register
Perlman, M.↗
Digital-voltage curve generator
Curve generator capable of producing precisely repeatable curve for any single-valued function of voltage versus time uses digital approach, implemented by means of clocked feedback shift register, large scale integrated circuit diode matrix comprising about 12,000 diodes, counter, and digital-to-analog converter.
Perlman, M.↗
Experiments with digital computer simulations of pseudo-random noise generators
Digital computer simulation of shift register pseudo-random noise generators
White, R. C., Jr.↗
Binary to binary-coded-decimal converter Patent
Binary to binary-coded decimal converter using single set of logic circuits notwithstanding number of shift register decades
Imlay, E. H.↗
A manually set magnetic wire counter
Magnetic storage wire counter design principles are given. Magnetic storage wire was coupled with two phase propagational driver in manual set counter shift register. Time delay between magnetic counter domain insertion and corresponding output pulse provides counting functions.
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Digital circuits for computer applications: A compilation
The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.
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An organization of a digital subsystem for generating spacecraft timing and control signals
A modulo-M counter (of clock pulses) is decomposed into parallel modulo-m sub i counters, where each m sub i is a prime power divisor of M. The modulo-p sub i counters are feedback shift registers which cycle through p sub i distinct states. By this organization, every possible nontrivial data frame subperiod and delayed subperiod may be derived. The number of clock pulses required to bring every modulo-p sub i counter to a respective designated state or count is determined by the Chinese remainder theorem. This corresponds to the solution of simultaneous congruences over relatively prime moduli.
Perlman, M.↗
Minimal hardware, binary sequence pseudonoise generator and detector
General purpose sequence generator which includes 35-stage field shift register determines mathematical properties of polynomials such as divisibility, period, order of roots, and other parameters that effect desirability of various sequences for specific applications; for example, irreducible polynomials which characterize sequences with randomness properties.
Perlman, M.↗
Experimental investigation of a shielded complementary Metal-Oxide Semiconductor (MOS) structure
A shielded integrated complimentary MOS transistor structure is described which is used to prevent field inversion in the region not occupied by the gates and which permits the use of a thinner field oxide, reduces the chip area, and has provision for simplified multilayer connections. The structure is used in the design of a static shift register and results in a 20% reduction in area.
Lin, H. C.↗
Yield analysis of large capacity magnetic bubble circuits with redundancy design
The fabrication yield of an on-chip modifiable redundant circuit design for a 100M bit serial shift register is evaluated. The yield model is a redundancy design in which there is a primary loop and a set of secondary loops which can be enabled/disabled without introducing blanks to the data stream. This function has a finite yield, the loop-modification yield factor, which must be greater than 0.9 to make the system more economical than the simple nonredundant design. It is further established that small loop capacities greatly degrade the yield because of the effect of the modification yield factor, while large loop capacities degrade the yield because of defects in the operating area. As the modification yield increases the optimum loop capacity decreases. An optimum value for the number of redundant loops exists for each loop capacity. Other factors that affect the yield are the garnet film and the processed circuit.
Bailey, R. F.↗
Fourier waveform analyzer
Real-time Fourier analysis is provided by "bucket brigade' charge-transfer shift register. Device is small, inexpensive integrated circuit which does analog-to-digital-to-analog conversion, data processing, and time delay.
Sutton, J. F.↗
System for generating timing and control signals
A system capable of generating every possible data frame subperiod and delayed subperiod of a data frame of length of M clock pulse intervals (CPIs) comprised of parallel modulo-m sub i counters is presented. Each m sub i is a prime power divisor of M and a cascade of alpha sub i identical modulo-p sub i counters. The modulo-p sub i counters are feedback shift registers which cycle through p sub i distinct states. Every possible nontrivial data frame subperiod and delayed subperiod is derived and a specific CPI in the data frame is detected. The number of clock pulses required to bring every modulo-p sub i counter to a respective designated state or count is determined by the Chinese remainder theorem. This corresponds to the solution of simultaneous congruences over relatively prime moduli.
Perlman, M.↗
Self-scanned Digicon - A digital image tube for astronomical spectroscopy
We have successfully fabricated, tested, and operated a digital image tube consisting of a magnetically focused image intensifier tube in which a self-scanned linear array of 1024 silicon photodiodes operating in the EBS mode serves as the photoelectron image detector, amplifier, and intermediate image storage device. Integral on-chip MOS shift registers driven by an external clock sequentially interrogate the photodiodes through MOS FET multiplex switch arrays. Each output frame is a sequence of 256 analog pulses on each of four video lines. Laboratory and observing tests show that the output signal is photoelectron shot noise limited over at least a range of 1-100,000 detected photoelectrons per picture element, indicating that single photon detection is achieved. High-resolution astronomical spectroscopy has been carried out in the coude spectrograph of the 2.7-m telescope at McDonald Observatory. Examples are shown.
Tull, R. G.↗
Low-frequency sine wave hard-limiting technique
Circuit includes serial-in/parallel-out shift register and weighting network that are used to eliminate effects of noise and other nonrepetitive circuit transients. Register and weighting network average decisions from section of signal where decisions are more dependable or where differences between two consecutive samples are larger.
Anderson, T. O.↗
RAM digital filter
Modification of conventional digital counting filter is designed to store all possible combinations of filter coefficients in random access memory. Filter includes analog-to-digital coverter, X shift register, memory, accumulator, and digital-to-analog converter.
Zohar, S.↗