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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6

Radiation-Hardened Solid-State Drive

A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial off-the-shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices. Small amounts of rad-hard memory are used as error buffers and temporary caches for radiation-induced errors in the large COTS memories. The rad-hard ASIC/FPGA implements a variety of error-handling protocols to manage these radiation-induced errors. The large COTS memory is triplicated for protection, and CRC-based counters are calculated for sub-areas in each COTS NVM array. These counters are stored in the rad-hard non-volatile memory. Through monitoring, rewriting, regeneration, triplication, and long-term storage, radiation-induced errors in the large NV memory are managed. The rad-hard ASIC/FPGA also interfaces with the external computer buses.

Sheldon, Douglas J.↗

Reliability Characterization of TaOx-Based Commercial ReRAM in Combination with Radiation

We present reliability data combined with total dose gamma radiation for one of the first commercially available resistive memory devices. These Tantalum Oxide (TaOX)-based resistive memory chips demonstrate operation in dynamic program and erase testing up to ~130 Krad(Si) of 60Co gamma dose. In static and unbiased conditions, the stored data in the memory cells were able to withstand up to 50Mrad(Si) of exposure. The access circuitry, though, seemed less robust to gamma radiation and was able to operate only up to a total dose of 3Mrad(Si). Post exposure reliability as indicated by endurance, cycling error rate, and data retention tests showed no detectable impact from the combination with prior gamma irradiation. Overall, the total dose radiation tolerance of the commercial TaOx-based resistive memory chip appears to be higher than flash memory chips and in agreement with prior tests conducted with single cell resistive memories.

total ionizing dose↗

Data migration schedule prediction using machine learning

Various embodiments provide for one or more processor instructions and memory instructions that enable a memory sub-system to predict a schedule for migrating data between memory devices, which can be part of a memory sub-system.

Roberts, David Andrew↗

Influence of surface adsorption on MoS 2 memtransistor switching kinetics

Sulfur-deficient polycrystalline two-dimensional (2D) molybdenum disulfide (MoS 2 ) memtransistors exhibit gate-tunable memristive switching to implement emerging memory operations and neuromorphic computing paradigms. Grain boundaries and sulfur vacancies are critical for memristive switching; however, the underlying physical mechanisms are not fully understood. Furthermore, the adsorption of water and gaseous species strongly perturbs electronic transport in monolayer MoS 2 , and little work has been done to explore the influence of surface interactions on defect-related kinetics that produces memristive switching. Here, we study the switching kinetics of back-gated MoS 2 memtransistors using current transient measurements in a controlled atmosphere chamber. Here, we observe that adsorbed water molecules lead to suppression of the electronic trap-filling processes concomitant with the resistive switching process, resulting in altered kinetics of the resistive switching. Additionally, using the transient response from “bunched” drain voltage pulse trains performed as a function of temperature, we extract the energy of the affected trap state and find that it places the trap roughly midgap [E T = E C – 0.7 (±0.4) eV]. Our results highlight the importance of controlling for surface interactions that may affect switching kinetics in 2D memtransistors, synaptic transistors, and related memory devices.

36 MATERIALS SCIENCE↗

Impact of Random Spatial Fluctuation in Non-Uniform Crystalline Phases on the Device Variation of Ferroelectric FET

In this work, a comprehensive study of random spatial fluctuation of the ferroelectric (FE) phase and dielectric (DE) phase in FeFETs is conducted to understand its impact on device variation. It is found that: i) there exists a certain DE percentage threshold that below which the increase of the DE phase does not significantly impact the device memory window and variation and only above which evident device degradation can be observed; ii) increasing the DE phase increases the variation in the memory window and the coercive field distribution further exacerbates the variation, hence degrading the sensing margin; iii) decreasing the number of grains degrades the device variation, which calls for further grain size engineering for variation suppression.

42 ENGINEERING↗

Status of NEPP Radiation Testing 3D NAND Flash

This work provides a current update of radiation testing activities on 3D NAND flash memories in support of the NEPP program. Single-event effects data from heavy-ion and low-energy proton testing is highlighted on a state of the art memory device.

Flash↗

Status of NEPP Radiation Testing 3D NAND Flash

This work provides a current update of radiation testing activities on 3D NAND flash memories in support of the NEPP program. Single-event effects data from heavy-ion and low-energy proton testing is highlighted on a state of the art memory device.

Flash↗

Characterization of fluorite-structured ferroelectrics using transmission electron microscopy: Techniques, challenges, and recent advances

Fluorite-structured ferroelectrics, such as hafnium oxide and its alloyed variants, are key candidates for next-generation memory devices. Yet, fundamental questions about switching mechanisms, domain dynamics, and phase evolution remain open. Transmission electron microscopy (TEM) provides unique capabilities to address these challenges by simultaneously resolving the positions of anions and cations, chemical variations, and structural transformations. Recent advances—including in situ heating, electron beam-induced switching, electron energy loss spectroscopy, and differential phase contrast imaging—have revealed critical insights into phase transitions, potential switching pathways, and oxygen vacancy behavior. However, experimental barriers such as TEM sample-preparation-induced artifacts, high coercive fields, and imaging constraints persist, especially for polycrystalline films. By offering a focused overview of current TEM developments in fluorite ferroelectrics, this work outlines how TEM contributes to understanding key phenomena and proposes a roadmap for future studies.

36 MATERIALS SCIENCE↗

Displays, memories, and signal processing: A compilation

Articles on electronics systems and techniques were presented. The first section is on displays and other electro-optical systems; the second section is devoted to signal processing. The third section presented several new memory devices for digital equipment, including articles on holographic memories. The latest patent information available is also given.

Source record↗

Proton Irradiation of the 16GB Intel Optane SSD

The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).

Single-Event Effects (SEE)↗

Semiconductor-ferroelectric nonvolatile memory using anomalous high photovoltages in ferroelectric ceramics

A small ferroelectric ceramic element is used with an insulating gate transistor and two diodes as an electrically addressed, nonvolatile memory device which is read out nondestructively. The device uses the anomalous photovoltaic effect in ferroelectric ceramics, an effect in which the polarity and magnitude of photovoltages depend on the direction and magnitude of remanent polarization. Experimental results give memory characteristics. The device could be programmed with pulses as short as 200 ns. There is long-time retention of stored data.

Brody, P. S.↗

CCD Memory

CCD memory device yields over 6.4 x 10 to the eighth power levels of information on single chip. Charge-coupled device (CCD) demonstrated to operate as either read-only-memory (ROM) or photon-programmable memory with capacity of 640,000 bits, with each bit capable of being weighted to more than 1,000 discrete analog levels. Larger memory capacities now possible using proposed approach in conjunction with CCD's now being fabricated, which yield over 4 x 10 to the ninth power discrete levels of information on single chip.

Janesick, James R.↗

Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic Computing

As an emerging non-volatile memory device technology, Ferroelectric Field-Effect Transistors (FeFETs) can enable low-power, adaptive intelligent system design. However, device dimension and operating voltage dependent reliability issues of scaled FeFETs can ultimately lead to degraded performance in solving machine learning tasks. In this article, detailed experimental characterization of FeFET devices of different dimensions have been carried out to explicitly evaluate the non-ideal behavior in device conductance programming properties like number of programming states, cycle-to-cycle (C2C) variations, device-to-device (D2D) variations, and state retention. A hardware-aware software simulation approach has been adopted to capture the adversarial effects of the non-idealities on recognition accuracy through algorithm-level performance assessment by including them in NeuroSim, a popular neural network hardware simulator, to execute a neural network model considering all other hardware constraints. With the added non-idealities, significant accuracy degradation has been observed compared to the ideal scenarios where D2D variations play the most critical role. Thereafter, feasibility of a variation-aware training method has been evaluated to tackle the accuracy drop.

42 ENGINEERING↗

Study of the photovoltaic effect in thin film barium titanate

The photoelectric effect in structures consisting of metal deposited barium titanate film silicon is described. A radio frequency sputtering technique is used to deposit ferroelectric barium titantate films on silicon and quartz. Film properties are measured and correlated with the photoelectric effect characteristics of the films. It was found that to obtain good quality pin hole free films, it is necessary to reduce the substrate temperature during the last part of the deposition. The switching ability of the device with internal applied voltage is improved when applied with a ferroelectric memory device.

Grannemann, W. W.↗

Systems and methods for enhanced power system model validation

A system for enhanced power system model validation is provided. The system includes a computing device including at least one processor in communication with at least one memory device. The at least one processor is programmed to store a plurality of models for a plurality of devices and a plurality of input files associated with the plurality of models, receive, from a user, a selection of model of the plurality of models to simulate, retrieve one or more input files of the plurality of input files, perform a model validity check on the selected model, if the selected model passed the model validity check, perform a model calibration on the selected model, and if the selected model passed the model calibration, perform a post evaluation on the selected model.

Wang, Honggang↗

LC-MEMENTO: A Memory Model for Accelerated Architectures

With the advent of heterogeneous architectures, in particular, with the ubiquity of multi-GPU systems, it is becoming increasingly important to manage device memory efficiently in order to reap the benefits of the additional core count. To date, such responsibility mainly falls on the programmer where device-to-host data communication (and vice versa), if not done properly, may incur costly memory transfer operations and synchronization. The problem may be compounded by additional requirement to maintain system-wide memory consistency that may involve expensive synchronization overhead. In this paper, we present Location Consistency Memory Model for Enhanced Transfer Operations (LC-MEMENTO). This framework considers incorporating runtime techniques for multi-GPU memory management to support relaxed synchronization semantics and memory transfer operations automatically. Specifically, we implement a relaxed form of a memory consistency model based on the Location Consistency (LC) in an Asynchronous Many-Task Runtime (ARTS) and demonstrate that, this memory model enables additional optimization opportunities for the three representative applications encompassing different computational patterns (scientific computation, graphs, data streaming, etc.).

Memory Models, Accelerators, Adaptive Optimization↗