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This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users Guide. The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users Guide.
This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users' Guide. The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users' Guide.
This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users' Guide. The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users' Guide.
This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users' Guide. The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users' Guide.
This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users' Guide. The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users' Guide.
This document is a reference guide to the Xyce™ Parallel Electronic Simulator, and is a companion document to the Xyce™ Users' Guide. The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce™. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce™ Users' Guide.
Verilog-A based cryogenic bulk CMOS (complementary metal oxide semiconductor) compact models are built for state-of-the-art silicon CMOS processes. These models accurately predict device operation at cryogenic temperatures down to 4 K. The models are compatible with commercial circuit simulators. The models extend the standard BSIM4 [Berkeley Short-channel IGFET (insulated-gate field-effect transistor ) Model] type compact models by re-parameterizing existing equations, as well as adding new equations that capture the physics of device operation at cryogenic temperatures. These models will allow circuit designers to create optimized, reliable, and robust circuits operating at cryogenic temperatures.
The transport of conserved quantities like spin and charge is fundamental to characterizing the behavior of quantum many-body systems. Numerically simulating such dynamics is generically challenging, which motivates the consideration of quantum computing strategies. However, the relatively high gate errors and limited coherence times of today's quantum computers pose their own challenge, highlighting the need to be frugal with quantum resources. In this work we report simulations on quantum hardware of infinite-temperature energy transport in the mixed-field Ising chain, a paradigmatic many-body system that can exhibit a range of transport behaviors at intermediate times. We consider a chain with L = 12 sites and find results broadly consistent with those from ideal circuit simulators over 90 Trotter steps, containing up to 990 entangling gates. To obtain these results, we use two key problem-tailored insights. First, we identify a convenient basis – the Pauli Y basis – in which to sample the infinite-temperature trace and provide theoretical and numerical justifications for its efficiency relative to, e.g., the computational basis. Second, in addition to a variety of problem-agnostic error mitigation strategies, we employ a renormalization strategy that compensates for global nonconservation of energy due to device noise. We discuss the applicability of the proposed sampling approach beyond the mixed-field Ising chain and formulate a variational method to search for a sampling basis with small sample-to-sample fluctuations for an arbitrary Hamiltonian. This opens the door to applying these techniques in more general models.
Abstract In this work, we report a method that enables a standard electrostatic MEMS device to perform complex sensing functionalities, such as detecting the presence of helium without a sensing material or a conditioning circuit. Helium is a noble, odorless, non-reactive gas that is very challenging to detect. It is used in critical applications such as storing nuclear fuel waste inside a dry cask. In these applications, its leakage from the dry cask may indicate the cask's safe operation's degradation. A departure from the common practice of exciting the MEMS around its mechanical resonance, the method is based on exciting the MEMS around its electrical resonance circuit. This method shows that the tiny difference between the air dielectric constant (1.00059) and helium (1.000067) corresponding to only a few Femtofarad level capacitances produces a 25 mV difference without a conditioning circuit. Simulation results confirmed those findings and explored the sensor response at different operation conditions. This method eliminates the need for a heated microstructure and the need for absorption material. This method is not limited to gas sensing. It can be applied to other sensing mechanisms, such as acceleration and pressure measurements, and eliminate the complex circuit to read small capacitance in these applications.
Electrical power converters are critical to a wide range of applications ranging from renewable integration to transportation electrification, and can be a key factor determining the size, weight, and efficiency of energy conversion systems. Magnetic components are typically the largest and least efficient components in power electronics. While there have been major strides in the modeling and analysis of power semiconductor devices and circuit simulations, the necessary advances in the design of power magnetics have lagged. In this project, we have transformed the modeling and design of power magnetics with machine learning enabled methods and catalyze simultaneous disruptive improvements for ML-based power electronics design tools. A fully automated open-source machine learning based magnetics modeling platform – the MagNet project - with innovations in full stack have been developed to greatly accelerate the design process and provide new insights to magnetic material and geometry design. The ARPA-E funded MagNet platform contains three major building blocks: 1) a ML-Integrated Data Acquisition System (MIDAS): a highly automated data acquisition testbed which is capable of measuring a large number of magnetic cores with a wide range of electrical circuit excitations; 2) a ML-integrated Core Loss Model (MICLM): a machine-learning trained modeling method for modeling the core loss and saturation effects of magnetic materials for arbitrary excitation waveforms; 3) ML-guided Magnetics SPICE Simulation Tool (PMSPICE): a fully integrated CAD tool which can simulate the magnetics in SPICE. It can help the designers to quickly model the linear and non-linear characteristics of magnetic components and evaluate their behavior in SPICE simulations. The developed MagNet system has fully demonstrated the proposed performance target and has been open sourced to the entire power electronics community to advance the modeling and design of power magnetics from many different angles.
The Lockout/Tagout (LOTO) Simulator is a portable training aid, or demonstration tool, designed to physically illustrate real-time critical-safety concepts of electrical lockout/tagout. The objective is to prevent misinterpretations of what is off and what is on during maintenance and repair of complex electrical systems. The simulator is designed in the form of a hinged box that opens up and stands on its own as an easel for demonstrations. On the outer face of the unit is a simulated circuit breaker box housing the switches. The breakers control the main power to the unit, a light bulb, and an electrical control cabinet. The light bulb is wired so that either of two breakers can provide power to it. When power is sent to the electrical control cabinet, a red indicator light illuminates. Inside the cabinet is the power supply from a personal computer. The power supply produces a 12-V dc output that is sent over to a small fan next to it, also from a computer, and an amber light on the front of the cabinet illuminates. A separate switch powers the fan on and off. The power supply is behind a plastic shield to protect against exposure to live conductors. Electrical banana jacks are mounted in the plastic shield to allow a voltmeter to be connected safely when opening the cabinet and taking a meter reading to verify de-energization as part of a simulation exercise. This LOTO simulator prototype is designed and fabricated as an all-in-one unit. All accessories can be stored inside the hinged case, and there is a handle on top for ease of transport. The circuit breaker labels attach with hook and loop fasteners so that they may be moved and changed to fit the training or demonstration scenario. The warning signs and labels on the electrical control box are magnetic, allowing for easy reconfiguration to emulate different equipment setups. A specially designed magnetic cover was made to disguise the indicator lights for demonstrations when these indicators are not used. The cover is disguised as an arc flash safety label that would typically be found on such a cabinet. One indicator light has a separate switch that can take it offline. This is to allow for demonstration to trainees on why it is important not to completely rely on indicator lights, but that they should always take a meter reading at the exposed conductors to absolutely verify de-energization before exposure. A clear plastic barrier and banana jacks inside the cabinet provide a safe way to plug in a voltmeter for demonstrations without exposure to the hazards of energized equipment. A small remote control unit is wired into the fan circuit. The remote allows the demonstrator to turn the fan on and off, provided that all of the breakers and switches leading to it are configured on as well. The remote feature was added in order to demonstrate the importance of starting the lockout/tagout task with energized equipment, then powering it down, isolating it, and locking it out to ensure that the correct breakers have been locked out.
We present ExaTN (Exascale Tensor Networks), a scalable GPU-accelerated C++ library which can express and process tensor networks on shared- as well as distributed-memory high-performance computing platforms, including those equipped with GPU accelerators. Specifically, ExaTN provides the ability to build, transform, and numerically evaluate tensor networks with arbitrary graph structures and complexity. It also provides algorithmic primitives for the optimization of tensor factors inside a given tensor network in order to find an extremum of a chosen tensor network functional, which is one of the key numerical procedures in quantum many-body theory and quantum-inspired machine learning. Numerical primitives exposed by ExaTN provide the foundation for composing rather complex tensor network algorithms. We enumerate multiple application domains which can benefit from the capabilities of our library, including condensed matter physics, quantum chemistry, quantum circuit simulations, as well as quantum and classical machine learning, for some of which we provide preliminary demonstrations and performance benchmarks just to emphasize a broad utility of our library.
Here, a simple method commonly used in modeling of tokamak conductor and plasma response for plasma control has been extended to allow more general modeling of tokamak PF conductor circuits. This extension combines a previously existing method for integrating plasma response and tokamak circuits with a more capable circuit modeling technique derived from the theory that underlies present-day automatic circuit simulation codes. This combined method can incorporate any combination of inductors (e.g., coils), resistors, capacitors, voltage sources, and current sources, while retaining the same model structure and ease of interpretation as the simple method. For many tokamaks, use of this extended method would not be the preferred approach, but for certain devices or for specialized models of a device, it is useful and occasionally essential. For example, the method has enabled fast and automated modeling of the complicated and daily-changing circuit topology used in the DIII-D tokamak. This automated modeling is essential to the support of controller design for the frequently changing requirements for DIII-D plasmas. It is likely to also find application in the workflows for new device designs.
The external quantum efficiency (EQE) or associated spectral response is widely used to evaluate the performance of photovoltaics, light emitting diodes, photodetectors, photodiodes, semiconductor lasers, laser-induced refrigeration of solids etc. For photovoltaic (PV) devices, The EQE is used to determine the spectral mismatch correction that is used to convert a performance measurement from a non-ideal simulator spectrum to a standard spectrum in PV device calibrations. Moreover, EQE can provide important insight into the physics of a PV device. For instance, the EQE shape can be used to infer mechanisms limiting the performance of the device. However, EQE measurements of full-size PV modules remain a challenge in the PV community due to rare availability of reliable module QE measurement tools worldwide and the size and complexity of module architecture that comprises several cells connected in strings (series or/and parallel). Here, we use a customized nondestructive tool made of high-power light emitting diodes to perform high-throughput EQE measurements on PV modules. Circuit simulations show that the measurement system can safely be used to measure both crystalline silicon and thin film-based PV modules with series connected cells without the risk of damage through reverse bias. In addition, EQE mapping combined with electroluminescence show a strong correlation and provide a way to determine both spatial non-uniformity of the spectral response and defects/degradation effects across the module.
Next generation gas turbine engine health monitoring for high performance jet engine-powered aircraft will incorporate integrated microelectronic sensors specifically designed to enhance aircraft functionality, engine efficiency, and safety. Temperature, air flow and pressure associated with the gas path as well as emissions from the engine correlate to the state of the combustor and other engine health conditions. Monitoring these parameters accurately requires positioning electronic sensors in the hot zone of the gas turbine engine, which exposes them to temperatures in excess of 400ºC. At these temperatures, signal amplification is needed at the transducer level to distinguish the desired measured signal from the significant electronic noise generated by the harsh environment. In this presentation, we report on the simulation, development, fabrication, and testing on a high temperature Class-A amplifier which utilizes a 4H-SiC Static Induction Transistor (SIT) as the active device and input/output matching and DC bias networks comprised of thin-film spiral inductors, metal-insulator-metal capacitors, and thick film chip resistors. A small signal model that emulates the operation of the 4H-SiC SIT from 25 to 400ºC, with an emphasis on operation at 400οC, was utilized. Measurements were performed from 25 to 400ºC to generate current-voltage curves, capacitive transistor characteristics and high frequency scattering parameters (S-parameters). The measured data was used to extrapolate the transconductance, gm, as a function of temperature for model development. Circuit simulation tools were used to generate S-parameters, which were compared to the measured values. At 400οC, a maximum difference between measured and simulated S-parameters for frequencies from 20 to 100 MHz were 3.84%, 0.68%, 10.61%, and 3.26% for S21, S12, S11, and S22, respectively. The average transit frequency, ft, was calculated from measured values to be 197.8 MHz, while the simulated value from the model was found to be 200 MHz. The Amplifier’s S-parameters were recorded at 20-100 MHz over a temperature range of 25-400ºC and show a gain of approximately 15.8 and 5.80 dBm at 25 and 400ºC, respectively. The input and output reflection coefficients at 50 MHz and 400ºC were -18.5 and -15.2 dB, respectively. The noise figure and phase noise were measured over the temperature range of 25-400ºC and recorded. The noise figure increased 21% at 50 MHz over the temperature range, while the 1 kHz offset of the phase noise remained below -110 dB. The stability factor, K, calculated with measured and simulated data demonstrates unconditional stability over the frequency range at 400ºC. Lastly, the 1-dB compression point was measured at 50 MHz and 400ºC with an approximated output of 9.5 dBm.
Output-voltage total harmonic distortion (THD) of a 20-kHz, 6-kVA Mapham resonant inverter is characterized as a function of its switching-to-resonant frequency ratio, f(s)/f(r), using the EASY5 Engineering Analysis System. EASY5 circuit simulation results are compared with hardware test results to verify the accuracy of the simulations. The effects of load on the THD versus f(s)/f(r) is investigated for resistive, leading, and lagging power factor load impedances. The effect of the series output capacitor on the Mapham inverter output-voltage distortion and inherent load regulation is characterized under loads of various power factors and magnitudes. An optimum series capacitor value which improves the inherent load regulation to better than 3 percent is identified. The optimum series capacitor value is different from the value predicted from a modeled frequency domain analysis. An explanation is proposed which takes into account the conduction overlap in the inductor pairs during steady-state inverter operation, which decreases the effective inductance of a Mapham inverter. A fault protection and current limit method is discussed which allows the Mapham inverter to operate into a short circuit, even when the inverter resonant circuit becomes overdamped.
Output voltage Total Harmonic Distortion (THD) of a 20kHz, 6kVA Mapham resonant inverter is characterized as a function of its switching-to-resonant frequency ratio, f sub s/f sub r, using the EASY5 engineering analysis system. EASY5 circuit simulation results are compared with hardware test results to verify the accuracy of the simulations. The effects of load on the THD versus f sub s/f sub r ratio is investigated for resistive, leading, and lagging power factor load impedances. The effect of the series output capacitor on the Mapham inverter output voltage distortion and inherent load regulation is characterized under loads of various power factors and magnitudes. An optimum series capacitor value which improves the inherent load regulation to better than 3 percent is identified. The optimum series capacitor value is different than the value predicted from a modeled frequency domain analysis. An explanation is proposed which takes into account the conduction overlap in the inductor pairs during steady-state inverter operation, which decreases the effective inductance of a Mapham inverter. A fault protection and current limit method is discussed which allows the Mapham inverter to operate into a short circuit, even when the inverter resonant circuit becomes overdamped.
In this study, neuromorphic computing, which mimics the functions of biological brains, offers improvements in both latency and energy efficiency over typical von Neumann computing architectures. Spiking neural networks can be especially power-efficient because they encode information temporally and can use more sparse electrical inputs. Here, we study the design of volatile memristors (variable resistors with memory) for neuronal devices, with particular consideration toward the feasibility of all-on-chip oscillation using built-in capacitance. We use circuit simulations to model the behavior of oscillator neurons with a range of realistic material properties. We find that energy inputs increase with insulating-phase resistivity, thermal conductivity, and device aspect ratio. However, we also find that the minimum capacitance needed for oscillation decreases with increasing insulating-phase resistivity, which opposes the constraints for power efficiency. Based on published data on NbO 2 , VO 2 , and EuNiO 3 , we find that existing materials can be engineered for all-on-chip spiking using their parasitic capacitance.